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Wed, 23 Aug 2017 20:19:40 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.183]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.98]) with mapi id 14.03.0319.002; Thu, 24 Aug 2017 11:19:38 +0800 From: "Guo, Mang" To: "edk2-devel@lists.01.org" Thread-Topic: [Patch][edk2-platforms/devel-MinnowBoard3-UDK2017 10/1 BroxtonPlatformPkg: Disable NPK based on DciEn Thread-Index: AdMch9FAnPGDPu/BRteRb3Ab/DIc0w== Date: Thu, 24 Aug 2017 03:19:38 +0000 Message-ID: <22D2C85ED001C54AA20BFE3B0E4751D15253FC95@shsmsx102.ccr.corp.intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: <22D2C85ED001C54AA20BFE3B0E4751D15253FC95@shsmsx102.ccr.corp.intel.com> x-originating-ip: [10.239.127.40] MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.22 Subject: [Patch][edk2-platforms/devel-MinnowBoard3-UDK2017 10/1 BroxtonPlatformPkg: Disable NPK based on DciEn X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 24 Aug 2017 03:17:06 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Disable NPK based on DciEn Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang --- .../BensonGlacier/BoardInitPreMem/BoardInitMiscs.c | 56 ++++++++++++++----= ---- 1 file changed, 37 insertions(+), 19 deletions(-) diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPreMe= m/BoardInitMiscs.c b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardI= nitPreMem/BoardInitMiscs.c index 0b602bd..afad081 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPreMem/Board= InitMiscs.c +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPreMem/Board= InitMiscs.c @@ -36,14 +36,16 @@ BgUpdateFspmUpd ( IN FSPM_UPD *FspUpdRgn ) { - EFI_PEI_HOB_POINTERS Hob; - EFI_PLATFORM_INFO_HOB *PlatformInfo =3D NULL; - DRAM_POLICY_PPI *DramPolicy; - EFI_STATUS Status; - MRC_NV_DATA_FRAME *MrcNvData; - - MRC_PARAMS_SAVE_RESTORE *MrcParamsHob; - BOOT_VARIABLE_NV_DATA *BootVariableNvDataHob; + EFI_PEI_HOB_POINTERS Hob; + EFI_PLATFORM_INFO_HOB *PlatformInfo =3D NULL; + DRAM_POLICY_PPI *DramPolicy; + EFI_STATUS Status; + MRC_NV_DATA_FRAME *MrcNvData; + MRC_PARAMS_SAVE_RESTORE *MrcParamsHob; + BOOT_VARIABLE_NV_DATA *BootVariableNvDataHob; + SYSTEM_CONFIGURATION SystemConfiguration; + UINTN VariableSize; + EFI_PEI_READ_ONLY_VARIABLE2_PPI *VariablePpi; =20 Status =3D (*PeiServices)->LocatePpi ( PeiServices, @@ -115,7 +117,7 @@ BgUpdateFspmUpd ( FspUpdRgn->FspmConfig.Profile =3D 0x0B; // LPDDR4_2400_24_= 22_22 FspUpdRgn->FspmConfig.MemoryDown =3D 0x01; FspUpdRgn->FspmConfig.DualRankSupportEnable =3D 0x01; - =20 + FspUpdRgn->FspmConfig.Ch0_RankEnable =3D 0x03; // [0]: Rank 0 [1]= : Rank 1 FspUpdRgn->FspmConfig.Ch0_DeviceWidth =3D 0x01; // x16 FspUpdRgn->FspmConfig.Ch0_DramDensity =3D 0x02; // 8Gb @@ -146,6 +148,31 @@ BgUpdateFspmUpd ( CopyMem (&(FspUpdRgn->FspmConfig.Ch3_Bit_swizzling), ChSwizzle_BG[3], = DRAM_POLICY_NUMBER_BITS * sizeof(UINT8)); } =20 + // + // Disable NPK based on DciEn + // + Status =3D PeiServicesLocatePpi (&gEfiPeiReadOnlyVariable2PpiGuid, 0, NU= LL, (VOID **) &VariablePpi); + if (!EFI_ERROR (Status)) { + VariableSize =3D sizeof (SYSTEM_CONFIGURATION); + Status =3D VariablePpi->GetVariable ( + VariablePpi, + PLATFORM_SETUP_VARIABLE_NAME, + &gEfiSetupVariableGuid, + NULL, + &VariableSize, + &SystemConfiguration + ); + if (!EFI_ERROR (Status)) { + if (SystemConfiguration.DciEn =3D=3D 0) { + FspUpdRgn->FspmConfig.NpkEn =3D 0; + } else if (SystemConfiguration.DciAutoDetect =3D=3D 1) { + FspUpdRgn->FspmConfig.NpkEn =3D 3; + } else { + FspUpdRgn->FspmConfig.NpkEn =3D 1; + } + } + } + return EFI_SUCCESS; } =20 @@ -290,16 +317,7 @@ BgDramCreatePolicyDefaults ( CopyMem (DramPolicy->ChSwizzle, ChSwizlePtr, sizeof (DramPolicy->ChSwi= zzle)); } =20 - Status =3D VariablePpi->GetVariable ( - VariablePpi, - PLATFORM_SETUP_VARIABLE_NAME, - &gEfiSetupVariableGuid, - NULL, - &VariableSize, - &SystemConfiguration - ); - - if (!EFI_ERROR (Status)) { + if (ReadSetupVars) { if (SystemConfiguration.Max2G =3D=3D 0) { DramPolicy->SystemMemorySizeLimit =3D 0x800; } --=20 2.10.1.windows.1