From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 18E9820945B9C for ; Fri, 15 Sep 2017 22:40:13 -0700 (PDT) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga104.jf.intel.com with ESMTP; 15 Sep 2017 22:43:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,400,1500966000"; d="dat'59?scan'59,208,59";a="900812482" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by FMSMGA003.fm.intel.com with ESMTP; 15 Sep 2017 22:43:13 -0700 Received: from fmsmsx113.amr.corp.intel.com (10.18.116.7) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.319.2; Fri, 15 Sep 2017 22:43:13 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by FMSMSX113.amr.corp.intel.com (10.18.116.7) with Microsoft SMTP Server (TLS) id 14.3.319.2; Fri, 15 Sep 2017 22:43:12 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.213]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.98]) with mapi id 14.03.0319.002; Sat, 16 Sep 2017 13:43:10 +0800 From: "Guo, Mang" To: "edk2-devel@lists.01.org" CC: "Wei, David" Thread-Topic: [Patch][edk2-platforms/minnowboard-max-udk2017] Vlv2TbltDevicePkg: Changed value of PcdFlashAreaBaseAddress Thread-Index: AdMurq3Z6Ym9ygClSkeD0TYN0aB0IA== Date: Sat, 16 Sep 2017 05:43:10 +0000 Message-ID: <22D2C85ED001C54AA20BFE3B0E4751D15256774E@SHSMSX103.ccr.corp.intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: <22D2C85ED001C54AA20BFE3B0E4751D15256774E@SHSMSX103.ccr.corp.intel.com> x-originating-ip: [10.239.127.40] MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.22 Subject: [Patch][edk2-platforms/minnowboard-max-udk2017] Vlv2TbltDevicePkg: Changed value of PcdFlashAreaBaseAddress X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 16 Sep 2017 05:40:13 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable The PCD PcdFlashAreaBaseAddress should be 0xFF800000, but it's 0xFFC00000 d= ue to wrong value assignment in platform fdf. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Guo Mang --- Vlv2TbltDevicePkg/PlatformDxe/Platform.c | 8 ++++---- Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.inf | 2 +- Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf | 4 +--- Vlv2TbltDevicePkg/PlatformPkg.fdf | 4 ++-- Vlv2TbltDevicePkg/PlatformPkgGcc.fdf | 4 ++-- 5 files changed, 10 insertions(+), 12 deletions(-) diff --git a/Vlv2TbltDevicePkg/PlatformDxe/Platform.c b/Vlv2TbltDevicePkg/P= latformDxe/Platform.c index 3d8cbe0..ad18da5 100644 --- a/Vlv2TbltDevicePkg/PlatformDxe/Platform.c +++ b/Vlv2TbltDevicePkg/PlatformDxe/Platform.c @@ -1,6 +1,6 @@ /** @file =20 - Copyright (c) 2004 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2004 - 2017, Intel Corporation. All rights reserved.
= =20 =20 This program and the accompanying materials are licensed and made availa= ble under @@ -442,13 +442,13 @@ SpiBiosProtectionFunction( UINTN BiosFlaLimit1; =20 =20 =20 - BiosFlaLower0 =3D PcdGet32(PcdFlashMicroCodeAddress)-PcdGet32(PcdFlashAr= eaBaseAddress); + BiosFlaLower0 =3D PcdGet32(PcdFlashMicroCodeAddress)-PcdGet32(PcdBiosIma= geBase); BiosFlaLimit0 =3D PcdGet32(PcdFlashMicroCodeSize)-1; =20 #ifdef MINNOW2_FSP_BUILD - BiosFlaLower1 =3D PcdGet32(PcdFlashFvFspBase)-PcdGet32(PcdFlashAreaBaseA= ddress); + BiosFlaLower1 =3D PcdGet32(PcdFlashFvFspBase)-PcdGet32(PcdBiosImageBase)= ; BiosFlaLimit1 =3D (PcdGet32(PcdFlashFvRecoveryBase)-PcdGet32(PcdFlashFvF= spBase)+PcdGet32(PcdFlashFvRecoverySize))-1; #else - BiosFlaLower1 =3D PcdGet32(PcdFlashFvMainBase)-PcdGet32(PcdFlashAreaBase= Address); + BiosFlaLower1 =3D PcdGet32(PcdFlashFvMainBase)-PcdGet32(PcdBiosImageBase= ); BiosFlaLimit1 =3D (PcdGet32(PcdFlashFvRecoveryBase)-PcdGet32(PcdFlashFvM= ainBase)+PcdGet32(PcdFlashFvRecoverySize))-1; #endif =20 diff --git a/Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.inf b/Vlv2TbltDevice= Pkg/PlatformDxe/PlatformDxe.inf index 80bf882..f1e1d9e 100644 --- a/Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.inf +++ b/Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.inf @@ -135,7 +135,7 @@ [Pcd.common] gPlatformModuleTokenSpaceGuid.PcdPBTNDisableInterval gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress - gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress + gPlatformModuleTokenSpaceGuid.PcdBiosImageBase gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize gEfiMdeModulePkgTokenSpaceGuid.PcdFastPS2Detection diff --git a/Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf b/Vlv2TbltDevice= Pkg/PlatformPei/PlatformPei.inf index 97c8dfb..6a269fc 100644 --- a/Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf +++ b/Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf @@ -1,6 +1,6 @@ # # -# Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved +# Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved # = =20 # This program and the accompanying materials are licensed and made availa= ble under # the terms and conditions of the BSD License that accompanies this distri= bution. =20 @@ -132,8 +132,6 @@ gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress - gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress - gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize gPlatformModuleTokenSpaceGuid.PcdRtcPowerFailure [Depex] TRUE diff --git a/Vlv2TbltDevicePkg/PlatformPkg.fdf b/Vlv2TbltDevicePkg/Platform= Pkg.fdf index 3a29715..9af2f77 100644 --- a/Vlv2TbltDevicePkg/PlatformPkg.fdf +++ b/Vlv2TbltDevicePkg/PlatformPkg.fdf @@ -70,8 +70,8 @@ DEFINE FLASH_REGION_FV_RECOVERY_SIZE = =3D 0x00070000 # ##########################################################################= ###### [FD.Vlv] -BaseAddress =3D $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashArea= BaseAddress #The base address of the 3Mb FLASH Device. -Size =3D $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashArea= Size #The flash size in bytes of the 3Mb FLASH Device. +BaseAddress =3D $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdBiosImage= Base #The base address of the 3Mb FLASH Device. +Size =3D $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdBiosImage= Size #The flash size in bytes of the 3Mb FLASH Device. ErasePolarity =3D 1 BlockSize =3D $(FLASH_BLOCK_SIZE) #The block size in bytes of= the 3Mb FLASH Device. NumBlocks =3D $(FLASH_NUM_BLOCKS) #The number of blocks in 3M= b FLASH Device. diff --git a/Vlv2TbltDevicePkg/PlatformPkgGcc.fdf b/Vlv2TbltDevicePkg/Platf= ormPkgGcc.fdf index 9e0799f..e450edc 100644 --- a/Vlv2TbltDevicePkg/PlatformPkgGcc.fdf +++ b/Vlv2TbltDevicePkg/PlatformPkgGcc.fdf @@ -70,8 +70,8 @@ DEFINE FLASH_REGION_FV_RECOVERY_SIZE = =3D 0x00070000 # ##########################################################################= ###### [FD.Vlv] -BaseAddress =3D $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashArea= BaseAddress #The base address of the 3Mb FLASH Device. -Size =3D $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashArea= Size #The flash size in bytes of the 3Mb FLASH Device. +BaseAddress =3D $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdBiosImage= Base #The base address of the 3Mb FLASH Device. +Size =3D $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdBiosImage= Size #The flash size in bytes of the 3Mb FLASH Device. ErasePolarity =3D 1 BlockSize =3D $(FLASH_BLOCK_SIZE) #The block size in bytes of= the 3Mb FLASH Device. NumBlocks =3D $(FLASH_NUM_BLOCKS) #The number of blocks in 3M= b FLASH Device. --=20 2.10.1.windows.1