From: "Guo, Mang" <mang.guo@intel.com>
To: "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Cc: "Wei, David" <david.wei@intel.com>
Subject: [Patch][edk2-platforms/devel-IntelAtomProcessorE3900 8Enable module board
Date: Fri, 17 Aug 2018 09:34:07 +0000 [thread overview]
Message-ID: <22D2C85ED001C54AA20BFE3B0E4751D1526D13BF@SHSMSX103.ccr.corp.intel.com> (raw)
Change files for EEPROM and Module board.
1. Add related libraries.
2. Change build script
2. Add PCDs.
3. Correct code format.
Cc: David Wei <david.wei@intel.com>
Cc: Mike Wu <mike.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Kelly Steele <kelly.steele@intel.com>
Signed-off-by: Guo Mang <mang.guo@intel.com>
---
.../BroxtonPlatformPkg/PlatformDsc/Components.dsc | 2 +-
.../PlatformDsc/LibraryClasses.IA32.PEI.dsc | 12 ++-
.../PlatformDsc/LibraryClasses.dsc | 14 +++-
.../PlatformDsc/PcdsDynamicDefault.Default.dsc | 22 ++++-
.../PlatformDsc/PcdsFixedAtBuild.dsc | 10 ++-
Platform/BroxtonPlatformPkg/PlatformPkg.dec | 95 ++++++++++++++++------
Platform/BroxtonPlatformPkg/PlatformPkg.fdf | 12 ++-
.../BroxtonSiPkg/Include/Library/BxtPGpioLib.h | 5 +-
8 files changed, 131 insertions(+), 41 deletions(-)
diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/Components.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/Components.dsc
index 696480b..6b87a79 100644
--- a/Platform/BroxtonPlatformPkg/PlatformDsc/Components.dsc
+++ b/Platform/BroxtonPlatformPkg/PlatformDsc/Components.dsc
@@ -30,7 +30,7 @@
MdeModulePkg/Universal/PCD/Dxe/Pcd.inf {
<LibraryClasses>
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
- DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
}
!if $(SOURCE_DEBUG_ENABLE) == TRUE
diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.IA32.PEI.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.IA32.PEI.dsc
index 7fa43ea..86767bf 100644
--- a/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.IA32.PEI.dsc
+++ b/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.IA32.PEI.dsc
@@ -1,7 +1,7 @@
## @file
# IA32 PEI Library Classes Description.
#
-# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -43,7 +43,7 @@
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf
SerialPortLib|$(PLATFORM_PACKAGE_COMMON)/Library/BaseSerialPortLib/BaseSerialPortLib.inf
!if $(SOURCE_DEBUG_ENABLE) == TRUE
- DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/SecPeiDebugAgentLib.inf
+ DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/SecPeiDebugAgentLib.inf
!else
DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
@@ -64,3 +64,11 @@
DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
Tcg2PhysicalPresenceLib|SecurityPkg/Library/PeiTcg2PhysicalPresenceLib/PeiTcg2PhysicalPresenceLib.inf
+ #
+ # EEPROM binary libs
+ #
+ BaseCryptLib | CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf
+ EepromDataLib | $(PLATFORM_PACKAGE_COMMON)/Features/Eeprom/EepromDataLib/EepromDataPeiLib.inf
+ EepromLib | $(PLATFORM_PACKAGE_COMMON)/Features/Eeprom/EepromLib/EepromPeiLib.inf
+ EepromPlatformLib | $(PLATFORM_PACKAGE_COMMON)/Features/Eeprom/EepromPlatformLib/EepromPlatformPeiLib.inf
+
diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.dsc
index c756b38..ad5a70d 100644
--- a/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.dsc
+++ b/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.dsc
@@ -1,7 +1,7 @@
## @file
# Library classes Description.
#
-# Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -274,4 +274,14 @@
UefiBootManagerLib | MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
PlatformBootManagerLib | $(PLATFORM_PACKAGE_COMMON)/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
- BootLogoLib | MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
\ No newline at end of file
+ BootLogoLib | MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
+
+ #
+ # EEPROM binary libs
+ #
+ BaseCryptLib | CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
+ EepromDataLib | $(PLATFORM_PACKAGE_COMMON)/Features/Eeprom/EepromDataLib/EepromDataLib.inf
+ EepromLib | $(PLATFORM_PACKAGE_COMMON)/Features/Eeprom/EepromLib/EepromLib.inf
+ EepromPlatformLib | $(PLATFORM_PACKAGE_COMMON)/Features/Eeprom/EepromPlatformLib/EepromPlatformLib.inf
+ I2cLib | $(PLATFORM_SI_PACKAGE)/SouthCluster/Library/I2cLib/I2cLib.inf
+
diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/PcdsDynamicDefault.Default.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/PcdsDynamicDefault.Default.dsc
index 3db4dc3..3005fca 100644
--- a/Platform/BroxtonPlatformPkg/PlatformDsc/PcdsDynamicDefault.Default.dsc
+++ b/Platform/BroxtonPlatformPkg/PlatformDsc/PcdsDynamicDefault.Default.dsc
@@ -1,7 +1,7 @@
## @file
# Platform Dynamic Pcd Description.
#
-# Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -61,3 +61,23 @@
# @Prompt A physical presence user status
gEfiSecurityPkgTokenSpaceGuid.PcdUserPhysicalPresence|TRUE
+ ##
+ ## EEPROM binary PCDs
+ ##
+ ## Used to store the EEPROM memory buffer pointer
+ gPlatformModuleTokenSpaceGuid.PcdEepromMemoryPointer|0
+ ## Used to store the EEPROM memory buffer size
+ gPlatformModuleTokenSpaceGuid.PcdEepromMemorySize|0
+ ## Used to store the EEPROM data library valid flags
+ gPlatformModuleTokenSpaceGuid.PcdEepromLibraryValid|{0x00, 0x00, 0x00, 0x00}
+ ## Flag to indicate that a HOB exists with EEPROM_MEMORY data
+ gPlatformModuleTokenSpaceGuid.PcdEepromMemoryHobPresent|FALSE
+ ## Pointer to the Part head link
+ gPlatformModuleTokenSpaceGuid.PcdEepromPartsHeadLink|0
+ ## Pointer to the Parts table
+ gPlatformModuleTokenSpaceGuid.PcdEepromParts|0
+ ## Flag to tell if EEPROM Map is in memory
+ gPlatformModuleTokenSpaceGuid.PcdEepromInMemoryFlag|0
+ ## Flag to tell if EEPROM Map is in HOB
+ gPlatformModuleTokenSpaceGuid.PcdEepromMapHobValid|0
+
diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/PcdsFixedAtBuild.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/PcdsFixedAtBuild.dsc
index 8aca735..5a162d6 100644
--- a/Platform/BroxtonPlatformPkg/PlatformDsc/PcdsFixedAtBuild.dsc
+++ b/Platform/BroxtonPlatformPkg/PlatformDsc/PcdsFixedAtBuild.dsc
@@ -1,7 +1,7 @@
## @file
# Platform Fixed At Build Pcd Description.
#
-# Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -86,8 +86,12 @@
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x3000
- !if $(UP2_BOARD) == TRUE
+ !if $(UP2_BOARD) == TRUE || $(MODULE_BOARD) == TRUE
gPlatformModuleTokenSpaceGuid.PcdSerialIoUartNumber|0
!else
gPlatformModuleTokenSpaceGuid.PcdSerialIoUartNumber|2
- !endif
\ No newline at end of file
+ !endif
+ #
+ # EEPROM GPIO Whitelist
+ gPlatformModuleTokenSpaceGuid.PcdGpioWhiteList | {0x08, 0x05, 0xC0, 0x00, 0x78, 0x05, 0xC0, 0x00, 0x80, 0x05, 0xC0, 0x00, 0x88, 0x05, 0xC0, 0x00, 0x90, 0x05, 0xC0, 0x00, 0xA0, 0x05, 0xC0, 0x00, 0xC8, 0x05, 0xC0, 0x00, 0xD0, 0x05, 0xC0, 0x00, 0xE0, 0x05, 0xC0, 0x00, 0xF0, 0x05, 0xC0, 0x00, 0xF8, 0x05, 0xC0, 0x00, 0x30, 0x05, 0xC4, 0x00, 0x48, 0x05, 0xC4, 0x00, 0x50, 0x05, 0xC4, 0x00, 0x58, 0x05, 0xC4, 0x00, 0x60, 0x05, 0xC4, 0x00, 0x68, 0x05, 0xC4, 0x00, 0x80, 0x05, 0xC4, 0x00, 0x88, 0x05, 0xC4, 0x00, 0x98, 0x05, 0xC4, 0x00, 0x60, 0x06, 0xC4, 0x00, 0x60, 0x06, 0xC4, 0x00, 0x68, 0x06, 0xC4, 0x00, 0x70, 0x06, 0xC4, 0x00, 0x78, 0x06, 0xC4, 0x00, 0x80, 0x06, 0xC4, 0x00, 0xA8, 0x06, 0xC4, 0x00, 0xB0, 0x06, 0xC4, 0x00, 0xB8, 0x06, 0xC4, 0x00, 0xC0, 0x06, 0xC4, 0x00, 0xD8, 0x06, 0xC4, 0x00, 0xE8, 0x06, 0xC4, 0x00, 0xF0, 0x06, 0xC4, 0x00, 0xF8, 0x06, 0xC4, 0x00, 0x00, 0x07, 0xC4, 0x00, 0x08, 0x07, 0xC4, 0x00, 0x18, 0x07, 0xC4, 0x00, 0x20, 0x07, 0xC4, 0x00, 0x10, 0x05, 0xC5, 0x00, 0x18, 0x05, 0xC5, 0x00, 0x20, 0x05, 0xC5, 0x00, 0x30, 0x05, 0xC5, 0x00, 0x38, 0x05, 0xC5, 0x00, 0x68, 0x05, 0xC5, 0x00, 0x70, 0x05, 0xC5, 0x00, 0xA8, 0x05, 0xC5, 0x00, 0xB0, 0x05, 0xC5, 0x00, 0xB8, 0x05, 0xC5, 0x00, 0xC0, 0x05, 0xC5, 0x00, 0xC8, 0x05, 0xC5, 0x00, 0xD0, 0x05, 0xC5, 0x00, 0x30, 0x06, 0xC5, 0x00, 0x38, 0x06, 0xC5, 0x00, 0x40, 0x06, 0xC5, 0x00, 0x48, 0x06, 0xC5, 0x00, 0x50, 0x06, 0xC5, 0x00, 0x58, 0x06, 0xC5, 0x00, 0x70, 0x06, 0xC5, 0x00, 0x78, 0x06, 0xC5, 0x00, 0x80, 0x06, 0xC5, 0x00, 0x88, 0x06, 0xC5, 0x00, 0xA0, 0x06, 0xC5, 0x00, 0xA8, 0x06, 0xC5, 0x00, 0xB0, 0x06, 0xC5, 0x00, 0xB8, 0x06, 0xC5, 0x00, 0x10, 0x05, 0xC7, 0x00, 0x18, 0x05, 0xC7, 0x00, 0x40, 0x05, 0xC7, 0x00, 0x48, 0x05, 0xC7, 0x00, 0x50, 0x05, 0xC7, 0x00, 0x58, 0x05, 0xC7, 0x00, 0x60, 0x05, 0xC7, 0x00, 0x68, 0x05, 0xC7, 0x00, 0x70, 0x05, 0xC7, 0x00, 0x78, 0x05, 0xC7, 0x00, 0x80, 0x05, 0xC7, 0x00, 0x88, 0x05, 0xC7, 0x00, 0x90, 0x05, 0xC7, 0x00, 0x98, 0x05, 0xC7, 0x00, 0xF0, 0x05, 0xC7, 0x00, 0x18, 0x06, 0xC7, 0x00, 0x20, 0x06, 0xC7, 0x00, 0x28, 0x06, 0xC7, 0x00, 0x48, 0x06, 0xC7, 0x00, 0xFF, 0xFF, 0xFF, 0xFF}
+
diff --git a/Platform/BroxtonPlatformPkg/PlatformPkg.dec b/Platform/BroxtonPlatformPkg/PlatformPkg.dec
index 2438906..7ca8f4c 100644
--- a/Platform/BroxtonPlatformPkg/PlatformPkg.dec
+++ b/Platform/BroxtonPlatformPkg/PlatformPkg.dec
@@ -26,6 +26,7 @@
Common/Include/Library
Common/SampleCode/IntelFsp2WrapperPkg/Include
Common
+ Common/Features/Eeprom/Include
[LibraryClasses]
@@ -61,7 +62,7 @@
gPeiLeafHillVbtGuid = { 0x6ae80680, 0x5e3f, 0x4e63, { 0xa5, 0xf5, 0x78, 0xe5, 0x21, 0x4f, 0x13, 0xfe } }
gPeiMinnowBoard3VbtGuid = { 0xE08CA6D5, 0x8D02, 0x43ae, { 0xAB, 0xB1, 0x95, 0x2C, 0xC7, 0x87, 0xC9, 0x33 } }
gPeiBensonGlacierVbtGuid = { 0xbfde308e, 0x2d5a, 0x4ca7, { 0xaa, 0x76, 0x19, 0x93, 0x8a, 0xaa, 0xe4, 0xda } }
- gPeiMinnow3NextVbtGuid = { 0x1f9cbb42, 0x107e, 0x46a4, { 0xa2, 0xcb, 0x92, 0xf5, 0x86, 0xf9, 0xfb, 0x31 } }
+ gPeiMinnow3ModuleVbtGuid = { 0x1f9cbb42, 0x107e, 0x46a4, { 0xa2, 0xcb, 0x92, 0xf5, 0x86, 0xf9, 0xfb, 0x31 } }
gPeiAuroraGlacierVbtGuid = { 0xaa80b0b1, 0xba1e, 0x4d4f, { 0x83, 0xe0, 0xcc, 0xf4, 0x7a, 0xaa, 0x3c, 0xd8 } }
gPeiUp2VbtGuid = { 0x16667736, 0xb2fe, 0x49b3, { 0xa0, 0xeb, 0xd6, 0xb9, 0xd7, 0xf9, 0x65, 0x7b } }
gPeiLogoGuid = { 0x7BB28B99, 0x61BB, 0x11d5, { 0x9A, 0x5D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D } }
@@ -84,7 +85,7 @@
gEfiCapsuleCrashGuid = { 0x0e1d2972, 0x65af, 0x4ac1, { 0xbf, 0xa3, 0xce, 0xf4, 0xab, 0x0c, 0x38, 0xfe } }
gEfiDeviceFirmwareGuid = { 0x9a5c9a15, 0xb821, 0x469a, { 0x8b, 0x7b, 0xe9, 0x66, 0xd4, 0x6c, 0xe1, 0xfe } }
gEfiBiosCapsuleFromAfuGuid = { 0xcd193840, 0x2881, 0x9567, { 0x39, 0x28, 0x38, 0xc5, 0x97, 0x53, 0x49, 0x77 } }
- gPlatformSsdtImageGuid = { 0x8041f38b, 0xa34, 0x49d7, { 0xa9, 0x05, 0x03, 0xae, 0xef, 0x48, 0x26, 0xf7 } }
+ gPlatformSsdtImageGuid = { 0x8041f38b, 0x0a34, 0x49d7, { 0xa9, 0x05, 0x03, 0xae, 0xef, 0x48, 0x26, 0xf7 } }
gObbyFirmwareFileSystemFvGuid = { 0xb723eff4, 0xee4a, 0x40bd, { 0xbd, 0x7b, 0x22, 0x27, 0x2e, 0x36, 0xb3, 0xe7 } }
gFspSFirmwareFileSystemFvGuid = { 0x1B5C27FE, 0xF01C, 0x4fbc, { 0xAE, 0xAE, 0x34, 0x1B, 0x2E, 0x99, 0x2A, 0x17 } }
gIbbrFirmwareFileSystemFvGuid = { 0xB73FE497, 0xB92E, 0x416e, { 0x83, 0x26, 0x45, 0xAD, 0x0D, 0x27, 0x00, 0x92 } }
@@ -95,31 +96,34 @@
gFspTempRamExitGuid = { 0x204c3d37, 0xd83f, 0x49ab, { 0x88, 0x3f, 0x9b, 0x5d, 0x6c, 0x64, 0x77, 0x62 } }
gUndiDriverImageGuid = { 0x2E561D56, 0x4863, 0x44F7, { 0x96, 0x0D, 0xEF, 0x2D, 0x7F, 0x2D, 0x35, 0xBB } }
- gClientSiliconPkgTokenSpaceGuid = {0xddf913cf, 0x8c2e, 0x449d, {0x8f, 0x6b, 0xd6, 0x44, 0xd2, 0xb6, 0x22, 0xf6}}
- gSmbiosFirmwareVersionInfoHobGuid = {0x947c974a, 0xc5aa, 0x48a2, {0xa4, 0x77, 0x1a, 0x4c, 0x9f, 0x52, 0xe7, 0x82}}
- gSmbiosProcessorInfoHobGuid = {0xe6d73d92, 0xff56, 0x4146, {0xaf, 0xac, 0x1c, 0x18, 0x81, 0x7d, 0x68, 0x71}}
- gSmbiosCacheInfoHobGuid = {0xd805b74e, 0x1460, 0x4755, {0xbb, 0x36, 0x1e, 0x8c, 0x8a, 0xd6, 0x78, 0xd7}}
-
- gClientCommonModuleTokenSpaceGuid = { 0x6239f660, 0x54dc, 0x4cf2, { 0xb2, 0x07, 0x45, 0xdb, 0x9c, 0x4d, 0x22, 0xeb }}
- gFastBootExceptionInfoHobGuid = { 0x4ed88276, 0xd4df, 0x4d03, { 0x86, 0x61, 0x29, 0x58, 0x01, 0xb2, 0xda, 0x58 }}
- gFastBootFunctionEnabledHobGuid = { 0x019fb1ca, 0xd411, 0x4948, { 0xb7, 0x3c, 0x4c, 0x05, 0x4a, 0xba, 0x9e, 0x8e }}
- gPeiFirmwarePerformanceGuid = { 0x55765e8f, 0x021a, 0x41f9, { 0x93, 0x2d, 0x4c, 0x49, 0xc5, 0xb7, 0xef, 0x5d }}
- gRamDebugTokenSpaceGuid = { 0x93adad6a, 0x60d1, 0x47f7, { 0xab, 0xdb, 0x20, 0x32, 0xf4, 0xa8, 0x8e, 0xa6 }}
- gSystemConfigGuid = { 0x0bb533de, 0xc8d9, 0x4e21, { 0x93, 0x42, 0xc4, 0x9c, 0x05, 0xb5, 0xe7, 0x89 }}
- gSetupEnterGuid = { 0x71202EEE, 0x5F53, 0x40d9, { 0xAB, 0x3D, 0x9E, 0x0C, 0x26, 0xD9, 0x66, 0x57 }}
- gHiiExportDatabaseGuid = { 0x1b838190, 0x4625, 0x4ead, { 0xab, 0xc9, 0xcd, 0x5e, 0x6a, 0xf1, 0x8f, 0xe0 }}
-
- gEfiHtBistHobGuid = { 0xBE644001, 0xE7D4, 0x48B1, { 0xB0, 0x96, 0x8B, 0xA0, 0x47, 0xBC, 0x7A, 0xE7 }}
+ gClientSiliconPkgTokenSpaceGuid = { 0xddf913cf, 0x8c2e, 0x449d, { 0x8f, 0x6b, 0xd6, 0x44, 0xd2, 0xb6, 0x22, 0xf6 } }
+ gSmbiosFirmwareVersionInfoHobGuid = { 0x947c974a, 0xc5aa, 0x48a2, { 0xa4, 0x77, 0x1a, 0x4c, 0x9f, 0x52, 0xe7, 0x82 } }
+ gSmbiosProcessorInfoHobGuid = { 0xe6d73d92, 0xff56, 0x4146, { 0xaf, 0xac, 0x1c, 0x18, 0x81, 0x7d, 0x68, 0x71 } }
+ gSmbiosCacheInfoHobGuid = { 0xd805b74e, 0x1460, 0x4755, { 0xbb, 0x36, 0x1e, 0x8c, 0x8a, 0xd6, 0x78, 0xd7 } }
+
+ gClientCommonModuleTokenSpaceGuid = { 0x6239f660, 0x54dc, 0x4cf2, { 0xb2, 0x07, 0x45, 0xdb, 0x9c, 0x4d, 0x22, 0xeb } }
+ gFastBootExceptionInfoHobGuid = { 0x4ed88276, 0xd4df, 0x4d03, { 0x86, 0x61, 0x29, 0x58, 0x01, 0xb2, 0xda, 0x58 } }
+ gFastBootFunctionEnabledHobGuid = { 0x019fb1ca, 0xd411, 0x4948, { 0xb7, 0x3c, 0x4c, 0x05, 0x4a, 0xba, 0x9e, 0x8e } }
+ gPeiFirmwarePerformanceGuid = { 0x55765e8f, 0x021a, 0x41f9, { 0x93, 0x2d, 0x4c, 0x49, 0xc5, 0xb7, 0xef, 0x5d } }
+ gRamDebugTokenSpaceGuid = { 0x93adad6a, 0x60d1, 0x47f7, { 0xab, 0xdb, 0x20, 0x32, 0xf4, 0xa8, 0x8e, 0xa6 } }
+ gSystemConfigGuid = { 0x0bb533de, 0xc8d9, 0x4e21, { 0x93, 0x42, 0xc4, 0x9c, 0x05, 0xb5, 0xe7, 0x89 } }
+ gSetupEnterGuid = { 0x71202EEE, 0x5F53, 0x40d9, { 0xAB, 0x3D, 0x9E, 0x0C, 0x26, 0xD9, 0x66, 0x57 } }
+ gHiiExportDatabaseGuid = { 0x1b838190, 0x4625, 0x4ead, { 0xab, 0xc9, 0xcd, 0x5e, 0x6a, 0xf1, 0x8f, 0xe0 } }
+
+ gEfiHtBistHobGuid = { 0xBE644001, 0xE7D4, 0x48B1, { 0xB0, 0x96, 0x8B, 0xA0, 0x47, 0xBC, 0x7A, 0xE7 } }
gEfiTscFrequencyGuid = { 0xdba6a7e3, 0xbb57, 0x4be7, { 0x8a, 0xf8, 0xd5, 0x78, 0xdb, 0x7e, 0x56, 0x87 }}
+ # GUID for EEPROM variables - {EE96CA33-5F59-4594-9869-07F79AA3C06F}
+ gEepromVariableGuid = { 0xEE96CA33, 0x5F59, 0x4594, { 0x98, 0x69, 0x07, 0xF7, 0x9A, 0xA3, 0xC0, 0x6F } }
+
[Ppis]
- gDebugServicePpiGuid = { 0xb781df4c, 0xdc36, 0x4230, { 0xb5, 0x6d, 0xa0, 0x1, 0xb6, 0x8c, 0x15, 0xc7 } }
+ gDebugServicePpiGuid = { 0xb781df4c, 0xdc36, 0x4230, { 0xb5, 0x6d, 0xa0, 0x01, 0xb6, 0x8c, 0x15, 0xc7 } }
gPeiMfgMemoryTestPpiGuid = { 0xab294a92, 0xeaf5, 0x4cf3, { 0xab, 0x2b, 0x2d, 0x4b, 0xed, 0x4d, 0xb6, 0x3d } }
- gBoardPreMemInitPpiGuid = { 0x202bd97a, 0x3255, 0x4277, { 0x89, 0x8f, 0xa0, 0x3c, 0x6a, 0x63, 0x64, 0x1 } }
+ gBoardPreMemInitPpiGuid = { 0x202bd97a, 0x3255, 0x4277, { 0x89, 0x8f, 0xa0, 0x3c, 0x6a, 0x63, 0x64, 0x01 } }
gBoardPreMemInitDoneGuid = { 0x74dbd885, 0xa9ab, 0x4502, { 0xbb, 0x9a, 0xa6, 0x70, 0xb5, 0xec, 0x96, 0x66 } }
- gBoardPostMemInitStartGuid = { 0xcecd3556, 0x24f1, 0x478f, { 0x94, 0x78, 0xe5, 0xcf, 0x2b, 0x62, 0x5e, 0xb } }
- gBoardPostMemInitDoneGuid = { 0xa2f2192f, 0xb51e, 0x492d, { 0xb6, 0x8, 0xad, 0x7d, 0xa0, 0x5, 0xb6, 0x99 } }
- gPeiCachePpiGuid = { 0xC153205A, 0xE898, 0x4C24, { 0x86, 0x89, 0xA4, 0xB4, 0xBC, 0xC5, 0xC8, 0xA2 }}
+ gBoardPostMemInitStartGuid = { 0xcecd3556, 0x24f1, 0x478f, { 0x94, 0x78, 0xe5, 0xcf, 0x2b, 0x62, 0x5e, 0x0b } }
+ gBoardPostMemInitDoneGuid = { 0xa2f2192f, 0xb51e, 0x492d, { 0xb6, 0x08, 0xad, 0x7d, 0xa0, 0x05, 0xb6, 0x99 } }
+ gPeiCachePpiGuid = { 0xC153205A, 0xE898, 0x4C24, { 0x86, 0x89, 0xA4, 0xB4, 0xBC, 0xC5, 0xC8, 0xA2 } }
[Protocols]
gEfiUsbFnIoProtocolGuid = { 0x32d2963a, 0xfe5d, 0x4f30, { 0xb6, 0x33, 0x6e, 0x5d, 0xc5, 0x58, 0x03, 0xcc } }
@@ -151,13 +155,13 @@
gEfiPssVerificationProtocolGuid = { 0x6fbb9473, 0xcb45, 0x4b0f, { 0x85, 0xac, 0x29, 0xbe, 0xa7, 0x86, 0xad, 0x80 } }
gEfiTcoResetProtocolGuid = { 0xa6a79162, 0xe325, 0x4c30, { 0xbc, 0xc3, 0x59, 0x37, 0x30, 0x64, 0xef, 0xb3 } }
gEfiEcAccessProtocolGuid = { 0x70eeecbe, 0x727a, 0x4244, { 0x90, 0x4c, 0xdb, 0x6b, 0xf0, 0x05, 0x53, 0x92 } }
- gPlatformConfigChangeProtocolGuid = {0xf429c00a, 0x9640, 0x46b3, {0x95, 0x44, 0xf8, 0xf8, 0x6a, 0x28, 0xf3, 0x0f}}
+ gPlatformConfigChangeProtocolGuid = { 0xf429c00a, 0x9640, 0x46b3, { 0x95, 0x44, 0xf8, 0xf8, 0x6a, 0x28, 0xf3, 0x0f } }
- gSmmThunkProtocolGuid = { 0x2a82fce6, 0x8bb6, 0x413e, { 0xb9, 0xeb, 0x45, 0xdf, 0xc0, 0x52, 0x2d, 0xf3 }}
- gEfiTrEEPlatformProtocolGuid = { 0x77ef4b99, 0x1186, 0x48ab, { 0x9d, 0x0b, 0x0b, 0x78, 0x12, 0xe5, 0xe6, 0xab }}
- gLegacyUsbProtocolGuid = { 0x2ad8e2d2, 0x2e91, 0x4cd1, { 0x95, 0xf5, 0xe7, 0x8f, 0xe5, 0xeb, 0xe3, 0x16 }}
+ gSmmThunkProtocolGuid = { 0x2a82fce6, 0x8bb6, 0x413e, { 0xb9, 0xeb, 0x45, 0xdf, 0xc0, 0x52, 0x2d, 0xf3 } }
+ gEfiTrEEPlatformProtocolGuid = { 0x77ef4b99, 0x1186, 0x48ab, { 0x9d, 0x0b, 0x0b, 0x78, 0x12, 0xe5, 0xe6, 0xab } }
+ gLegacyUsbProtocolGuid = { 0x2ad8e2d2, 0x2e91, 0x4cd1, { 0x95, 0xf5, 0xe7, 0x8f, 0xe5, 0xeb, 0xe3, 0x16 } }
- gEdkiiGpioProtocolGuid = { 0x239a4037, 0x5231, 0x44d6, {0xa2, 0xab, 0x51, 0x74, 0xcd, 0x81, 0xff, 0x85 }}
+ gEdkiiGpioProtocolGuid = { 0x239a4037, 0x5231, 0x44d6, { 0xa2, 0xab, 0x51, 0x74, 0xcd, 0x81, 0xff, 0x85 } }
[PcdsDynamic,PcdsDynamicEx] # 0x00000000
gMinnowModuleTokenSpaceGuid.PcdMinnowBoardDetectionRun|FALSE|BOOLEAN|0x00000001
@@ -230,6 +234,25 @@
## The PCD is used to specify whether or not Tpm command will wait for Response to come back.
gClientCommonModuleTokenSpaceGuid.PcdTpmSkipResponseWait|FALSE|BOOLEAN|0x00010028
+ ##
+ ## EEPROM PCDs
+ ##
+ ## Used to store the EEPROM memory buffer pointer
+ gPlatformModuleTokenSpaceGuid.PcdEepromMemoryPointer|0|UINT64|0xEEEE0000
+ ## Used to store the EEPROM memory buffer size
+ gPlatformModuleTokenSpaceGuid.PcdEepromMemorySize|0|UINT32|0xEEEE0001
+ ## Used to store the EEPROM data library valid flags
+ gPlatformModuleTokenSpaceGuid.PcdEepromLibraryValid|{0x00, 0x00, 0x00, 0x00}|VOID*|0xEEEE0002
+ ## Flag to indicate that a HOB exists with EEPROM_MEMORY data
+ gPlatformModuleTokenSpaceGuid.PcdEepromMemoryHobPresent|FALSE|BOOLEAN|0xEEEE0003
+ ## Pointer to the Part head link
+ gPlatformModuleTokenSpaceGuid.PcdEepromPartsHeadLink|0|UINT64|0xEEEE0004
+ ## Pointer to the Parts table
+ gPlatformModuleTokenSpaceGuid.PcdEepromParts|0|UINT64|0xEEEE0005
+ ## Flag to tell if EEPROM Map is in memory
+ gPlatformModuleTokenSpaceGuid.PcdEepromInMemoryFlag|0|BOOLEAN|0xEEEE0006
+ ## Flag to tell if EEPROM Map is in HOB
+ gPlatformModuleTokenSpaceGuid.PcdEepromMapHobValid|0|BOOLEAN|0xEEEE0007
[PcdsFeatureFlag] # 0x10000000
## This PCD specifies whether StatusCode is reported via ISA Serial port.
gEfiSerialPortTokenSpaceGuid.PcdStatusCodeUseIsaSerial|TRUE|BOOLEAN|0x00000020
@@ -318,6 +341,24 @@
gClientCommonModuleTokenSpaceGuid.PcdSmbiosDefaultPartNumber|"To Be Filled By O.E.M."|VOID*|0x0000030A
gPlatformModuleTokenSpaceGuid.PcdPerfPkgAcpiIoPortBaseAddress|0x400|UINT16|1
+ ##
+ ## EEPROM PCDs
+ ##
+ ## I2C bus the master EEPROM is hanging on
+ gPlatformModuleTokenSpaceGuid.PcdEepromBus|0x06|UINT8|0xEEEE2000
+ ## 7-bit address of the master EEPROM
+ gPlatformModuleTokenSpaceGuid.PcdEepromAddress|0x50|UINT8|0xEEEE2001
+ ## Priority order of EEPROM data libraries
+ ## 00 - Null; 01 - EEPROM; 02 - FV; 03 - Memory; FF - End of list
+ ## Memory should be first
+ gPlatformModuleTokenSpaceGuid.PcdEepromAutoPriority|{0x03, 0x01, 0x02, 0x00, 0xFF}|VOID*|0xEEEE2002
+ ## Public key file GUID - 5D8A38A3-FBBD-4077-8105-11170C2AF54D
+ gPlatformModuleTokenSpaceGuid.PcdEepromPublicKeyFile|{0xA3, 0x38, 0x8A, 0x5D, 0xBD, 0xFB, 0x77, 0x40, 0x81, 0x05, 0x11, 0x17, 0x0C, 0x2A, 0xF5, 0x4D}|VOID*|0xEEEE2003
+ ## FV EEPROM Image file GUID - BFBD3DAC-01EB-4FEB-A9DE-BCC9D1BA5531
+ gPlatformModuleTokenSpaceGuid.PcdEepromFvImageFile|{0xAC, 0x3D, 0xBD, 0xBF, 0xEB, 0x01, 0xEB, 0x4F, 0xA9, 0xDE, 0xBC, 0xC9, 0xD1, 0xBA, 0x55, 0x31}|VOID*|0xEEEE2004
+ ## GPIO PAD whitelist | END OF ARRAY |
+ gPlatformModuleTokenSpaceGuid.PcdGpioWhiteList|{0xFF, 0xFF, 0xFF, 0xFF}|VOID*|0xEEEE2005
+
[PcdsPatchableInModule]
## MemoryCheck value for checking memory before boot OS.
diff --git a/Platform/BroxtonPlatformPkg/PlatformPkg.fdf b/Platform/BroxtonPlatformPkg/PlatformPkg.fdf
index 055193d..05cf299 100644
--- a/Platform/BroxtonPlatformPkg/PlatformPkg.fdf
+++ b/Platform/BroxtonPlatformPkg/PlatformPkg.fdf
@@ -260,12 +260,12 @@
SECTION UI = "IntelGopVbt1"
}
- # VBT For Minnowboard 3 Next (File Guid is gPeiMinnow3NextVbtGuid)
+ # VBT For Minnowboard 3 Module (File Guid is gPeiMinnow3ModuleVbtGuid)
FILE FREEFORM = 1F9CBB42-107E-46A4-A2CB-92F586F9FB31 {
- SECTION RAW = $(PLATFORM_NAME)/Board/MinnowBoard3Next/Vbt/VbtBxtMipi.bin
+ SECTION RAW = $(PLATFORM_NAME)/Board/MinnowBoard3Module/Vbt/VbtBxtMipi.bin
SECTION UI = "IntelGopVbt1"
}
-
+
# VBT For Benson Glacier (File Guid is gPeiBensonGlacierVbtGuid)
FILE FREEFORM = BFDE308E-2D5A-4CA7-AA76-19938AAAE4DA {
SECTION RAW = $(PLATFORM_NAME)/Board/BensonGlacier/Vbt/VbtBxtMipi.bin
@@ -365,6 +365,9 @@ APRIORI PEI {
INF $(PLATFORM_PACKAGE_COMMON)/SampleCode/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
INF RuleOverride = RESET_VECTOR USE = IA32 BroxtonSiPkg/Cpu/ResetVector/Vtf1/Bin/ResetVector.inf
+ FILE FREEFORM = PCD (gPlatformModuleTokenSpaceGuid.PcdEepromFvImageFile) {
+ SECTION RAW = $(PLATFORM_NAME)/Board/MinnowBoard3Module/Eeprom/MB3-Eeprom.bin
+ }
[FV.FVIBBL]
BlockSize = $(FLASH_BLOCK_SIZE)
FvAlignment = 16 #FV alignment and FV attributes setting.
@@ -432,6 +435,9 @@ APRIORI DXE {
!if $(SOURCE_DEBUG_ENABLE) == TRUE
INF SourceLevelDebugPkg/DebugAgentDxe/DebugAgentDxe.inf
!endif
+ FILE FREEFORM = PCD (gPlatformModuleTokenSpaceGuid.PcdEepromPublicKeyFile) {
+ SECTION RAW = $(PLATFORM_NAME)/Board/MinnowBoard3Module/Eeprom/RSA-keys/MB3-public.bin
+ }
INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/Include/Library/BxtPGpioLib.h b/Silicon/BroxtonSoC/BroxtonSiPkg/Include/Library/BxtPGpioLib.h
index 26790ed..c00313f 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/Include/Library/BxtPGpioLib.h
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/Include/Library/BxtPGpioLib.h
@@ -1,7 +1,7 @@
/** @file
This library provides the BxtP GPIO library definitions.
- Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 1999 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -22,6 +22,7 @@
#define GPIO_NORTHWEST_COMMUNITY_LENGTH 0x764
#define GPIO_WEST_COMMUNITY_LENGTH 0x674
#define GPIO_SOUTHWEST_COMMUNITY_LENGTH 0x654
+#define GPIO_SOUTH_COMMUNITY_LENGTH 0
// GPIO pad and offset definition as GPIO HAS
// North community GPIO pad definition
@@ -254,13 +255,13 @@
#define SW_GPIO_170 (((UINT32)GPIO_MMIO_OFFSET_SW)<<16)+GPIO_PADBAR+0x0090 //SDIO_D3
#define SW_GPIO_171 (((UINT32)GPIO_MMIO_OFFSET_SW)<<16)+GPIO_PADBAR+0x0098 //SDIO_CMD
#define SW_GPIO_172 (((UINT32)GPIO_MMIO_OFFSET_SW)<<16)+GPIO_PADBAR+0x00A0 //SDCARD_CLK
-#define SW_GPIO_179 (((UINT32)GPIO_MMIO_OFFSET_SW)<<16)+GPIO_PADBAR+0x00D8 //SDCARD_CMD
#define SW_GPIO_173 (((UINT32)GPIO_MMIO_OFFSET_SW)<<16)+GPIO_PADBAR+0x00A8 //SDCARD_CLK_FB
#define SW_GPIO_174 (((UINT32)GPIO_MMIO_OFFSET_SW)<<16)+GPIO_PADBAR+0x00B0 //SDCARD_D0
#define SW_GPIO_175 (((UINT32)GPIO_MMIO_OFFSET_SW)<<16)+GPIO_PADBAR+0x00B8 //SDCARD_D1
#define SW_GPIO_176 (((UINT32)GPIO_MMIO_OFFSET_SW)<<16)+GPIO_PADBAR+0x00C0 //SDCARD_D2
#define SW_GPIO_177 (((UINT32)GPIO_MMIO_OFFSET_SW)<<16)+GPIO_PADBAR+0x00C8 //SDCARD_D3
#define SW_GPIO_178 (((UINT32)GPIO_MMIO_OFFSET_SW)<<16)+GPIO_PADBAR+0x00D0 //SDCARD_CD_B
+#define SW_GPIO_179 (((UINT32)GPIO_MMIO_OFFSET_SW)<<16)+GPIO_PADBAR+0x00D8 //SDCARD_CMD
#define SW_GPIO_186 (((UINT32)GPIO_MMIO_OFFSET_SW)<<16)+GPIO_PADBAR+0x00E0 //SDCARD_LVL_WP
#define SW_GPIO_182 (((UINT32)GPIO_MMIO_OFFSET_SW)<<16)+GPIO_PADBAR+0x00E8 //EMMC0_STROBE
#define SW_GPIO_183 (((UINT32)GPIO_MMIO_OFFSET_SW)<<16)+GPIO_PADBAR+0x00F0 //SDIO_PWR_DOWN_B
--
2.10.1.windows.1
reply other threads:[~2018-08-17 9:34 UTC|newest]
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