From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.151; helo=mga17.intel.com; envelope-from=mang.guo@intel.com; receiver=edk2-devel@lists.01.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id ED05F210FCF69 for ; Wed, 22 Aug 2018 22:33:01 -0700 (PDT) X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 22 Aug 2018 22:33:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,277,1531810800"; d="dat'59?scan'59,208,59";a="251223213" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by orsmga005.jf.intel.com with ESMTP; 22 Aug 2018 22:32:56 -0700 Received: from fmsmsx115.amr.corp.intel.com (10.18.116.19) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 22 Aug 2018 22:32:56 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by fmsmsx115.amr.corp.intel.com (10.18.116.19) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 22 Aug 2018 22:32:55 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.240]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.185]) with mapi id 14.03.0319.002; Thu, 23 Aug 2018 13:32:54 +0800 From: "Guo, Mang" To: "edk2-devel@lists.01.org" Thread-Topic: [Patch][edk2-platforms/devel-IntelAtomProcessorE3900 3Add NULL checking for some pointers Thread-Index: AdQ6or0o3kY6ResZSsu7kP6JVtxC6w== Date: Thu, 23 Aug 2018 05:32:53 +0000 Message-ID: <22D2C85ED001C54AA20BFE3B0E4751D1526D396A@SHSMSX103.ccr.corp.intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: <22D2C85ED001C54AA20BFE3B0E4751D1526D396A@SHSMSX103.ccr.corp.intel.com> x-originating-ip: [10.239.127.40] MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [Patch][edk2-platforms/devel-IntelAtomProcessorE3900 3Add NULL checking for some pointers X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 23 Aug 2018 05:33:02 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Cc: David Wei Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Guo Mang Reviewed-by: David Wei --- .../SmBiosMiscDxe/MiscSystemManufacturerFunction.c | 16 +++++++++---= ---- .../DxeSmbiosProcessorLib/DxeSmbiosProcessorLib.c | 7 ++++++- .../Library/PeiFspPolicyInitLib/PeiFspSaPolicyInitLib.c | 10 +++++++++- .../FspsWrapperPeim/FspsWrapperPeim.c | 6 +++++- 4 files changed, 29 insertions(+), 10 deletions(-) diff --git a/Platform/BroxtonPlatformPkg/Common/Features/Smbios/SmBiosMiscD= xe/MiscSystemManufacturerFunction.c b/Platform/BroxtonPlatformPkg/Common/Fe= atures/Smbios/SmBiosMiscDxe/MiscSystemManufacturerFunction.c index 0000e12..1c611f5 100644 --- a/Platform/BroxtonPlatformPkg/Common/Features/Smbios/SmBiosMiscDxe/Misc= SystemManufacturerFunction.c +++ b/Platform/BroxtonPlatformPkg/Common/Features/Smbios/SmBiosMiscDxe/Misc= SystemManufacturerFunction.c @@ -418,13 +418,15 @@ AddSmbiosManuCallback ( // //ForType1InputData->SystemUuid.Data1 =3D PcdGet32 (PcdProductSerialNumb= er); //ForType1InputData->SystemUuid.Data4[0] =3D PcdGet8 (PcdEmmcManufacture= rId); - ForType1InputData->SystemUuid.Data1 =3D (UINT32)MacAddressString [0] + (= ((UINT32)MacAddressString [1]) << 16); - ForType1InputData->SystemUuid.Data2 =3D (UINT16)MacAddressString [2]; - ForType1InputData->SystemUuid.Data3 =3D (UINT16)MacAddressString [3]; - ForType1InputData->SystemUuid.Data4[0] =3D (UINT8)MacAddressString [4]; - ForType1InputData->SystemUuid.Data4[1] =3D (UINT8)(MacAddressString [4] = >> 8); - ForType1InputData->SystemUuid.Data4[2] =3D (UINT8)MacAddressString [5]; - ForType1InputData->SystemUuid.Data4[3] =3D (UINT8)(MacAddressString [5] = >> 8); + if ( MacAddressString !=3D NULL) { + ForType1InputData->SystemUuid.Data1 =3D (UINT32)MacAddressString [0] += (((UINT32)MacAddressString [1]) << 16); + ForType1InputData->SystemUuid.Data2 =3D (UINT16)MacAddressString [2]; + ForType1InputData->SystemUuid.Data3 =3D (UINT16)MacAddressString [3]; + ForType1InputData->SystemUuid.Data4[0] =3D (UINT8)MacAddressString [4]= ; + ForType1InputData->SystemUuid.Data4[1] =3D (UINT8)(MacAddressString [4= ] >> 8); + ForType1InputData->SystemUuid.Data4[2] =3D (UINT8)MacAddressString [5]= ; + ForType1InputData->SystemUuid.Data4[3] =3D (UINT8)(MacAddressString [5= ] >> 8); + } =20 CopyMem ((UINT8 *) (&SmbiosRecord->Uuid),&ForType1InputData->SystemUuid,= 16); =20 diff --git a/Platform/BroxtonPlatformPkg/Common/Library/DxeSmbiosProcessorL= ib/DxeSmbiosProcessorLib.c b/Platform/BroxtonPlatformPkg/Common/Library/Dxe= SmbiosProcessorLib/DxeSmbiosProcessorLib.c index f182c8d..e4d157e 100644 --- a/Platform/BroxtonPlatformPkg/Common/Library/DxeSmbiosProcessorLib/DxeS= mbiosProcessorLib.c +++ b/Platform/BroxtonPlatformPkg/Common/Library/DxeSmbiosProcessorLib/DxeS= mbiosProcessorLib.c @@ -1,7 +1,7 @@ /** @file Smbios Processor Information Driver which produces Smbios type 4 and 7 t= ables. =20 - Copyright (c) 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -276,6 +276,11 @@ InstallSmbiosCacheInfo ( // Allocate full record, including fixed data region, and string buf= fer region. // SmbiosType7Record =3D (SMBIOS_TABLE_TYPE7 *) AllocateZeroPool (sizeo= f (SMBIOS_TABLE_TYPE7) + StringBufferLength); + if (SmbiosType7Record =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "Fail to allocate memory\n")); + return EFI_OUT_OF_RESOURCES; + } + SmbiosStringBufferPtr =3D ((UINT8 *) SmbiosType7Record) + sizeof (SM= BIOS_TABLE_TYPE7); =20 // diff --git a/Platform/BroxtonPlatformPkg/Common/Library/PeiFspPolicyInitLib= /PeiFspSaPolicyInitLib.c b/Platform/BroxtonPlatformPkg/Common/Library/PeiFs= pPolicyInitLib/PeiFspSaPolicyInitLib.c index c76f433..aa41981 100644 --- a/Platform/BroxtonPlatformPkg/Common/Library/PeiFspPolicyInitLib/PeiFsp= SaPolicyInitLib.c +++ b/Platform/BroxtonPlatformPkg/Common/Library/PeiFspPolicyInitLib/PeiFsp= SaPolicyInitLib.c @@ -1,7 +1,7 @@ /** @file Implementation of Fsp SA Policy Initialization. =20 - Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.
+ Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -133,6 +133,10 @@ PeiFspSaPolicyInitPreMem ( =20 VariableSize =3D sizeof (SYSTEM_CONFIGURATION); SystemConfiguration =3D AllocateZeroPool (VariableSize); + if (SystemConfiguration =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "Fail to allocate memory\n")); + return EFI_OUT_OF_RESOURCES; + } =20 Status =3D VariableServices->GetVariable ( VariableServices, @@ -212,6 +216,10 @@ PeiFspSaPolicyInit ( =20 VariableSize =3D sizeof (SYSTEM_CONFIGURATION); SystemConfiguration =3D AllocateZeroPool (VariableSize); + if (SystemConfiguration =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "Fail to allocate memory\n")); + return EFI_OUT_OF_RESOURCES; + } =20 Status =3D VariableServices->GetVariable ( VariableServices, diff --git a/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2Wrapper= Pkg/FspsWrapperPeim/FspsWrapperPeim.c b/Platform/BroxtonPlatformPkg/Common/= SampleCode/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c index 7343b77..5f1f13a 100644 --- a/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/Fsp= sWrapperPeim/FspsWrapperPeim.c +++ b/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/Fsp= sWrapperPeim/FspsWrapperPeim.c @@ -3,7 +3,7 @@ register TemporaryRamDonePpi to call TempRamExit API, and register Memor= yDiscoveredPpi notify to call FspSiliconInit API. =20 - Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -228,6 +228,10 @@ PeiMasterBootModeNotify ( // Copy default FSP-S UPD data from Flash // FspsHeaderPtr =3D (FSP_INFO_HEADER *) FspFindFspHeader (PcdGet32 (PcdFsp= sBaseAddress)); + if (FspsHeaderPtr =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "Fail to get Fsps Header\n")); + return EFI_UNSUPPORTED; + } FspsHeaderPtr->ImageBase =3D (UINT32) (PcdGet32 (PcdFspsBaseAddress)); =20 FspsUpdDataPtr =3D (FSPS_UPD_COMMON *) AllocateZeroPool ((UINTN) FspsHea= derPtr->CfgRegionSize); --=20 2.10.1.windows.1