From: "Lendacky, Thomas" <thomas.lendacky@amd.com>
To: "devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: Jordan Justen <jordan.l.justen@intel.com>,
Laszlo Ersek <lersek@redhat.com>,
Ard Biesheuvel <ard.biesheuvel@linaro.org>,
Michael D Kinney <michael.d.kinney@intel.com>,
Liming Gao <liming.gao@intel.com>,
Eric Dong <eric.dong@intel.com>, Ray Ni <ray.ni@intel.com>,
"Singh, Brijesh" <brijesh.singh@amd.com>
Subject: [RFC PATCH v2 19/44] UefiCpuPkg/CpuExceptionHandler: Add support for IOIO_PROT NAE events
Date: Thu, 19 Sep 2019 19:52:46 +0000 [thread overview]
Message-ID: <22d42aa8b3d16a7a91b5f28e024917910fb62742.1568922729.git.thomas.lendacky@amd.com> (raw)
In-Reply-To: <cover.1568922728.git.thomas.lendacky@amd.com>
From: Tom Lendacky <thomas.lendacky@amd.com>
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
Under SEV-ES, a IOIO_PROT intercept generates a #VC exception. VMGEXIT
must be used to allow the hypervisor to handle this intercept.
Add support to construct the required GHCB values to support a IOIO_PROT
NAE event. Parse the instruction that generated the #VC exception,
setting the required register values in the GHCB and creating the proper
SW_EXITINFO1 value in the GHCB.
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
---
.../X64/AMDSevVcCommon.c | 434 +++++++++++++++++-
1 file changed, 433 insertions(+), 1 deletion(-)
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c
index a56dcffe1d5d..16091fe38f83 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c
@@ -4,6 +4,425 @@
#include <Library/DebugLib.h>
#include "AMDSevVcCommon.h"
+typedef enum {
+ LongMode64Bit = 0,
+ LongModeCompat32Bit,
+ LongModeCompat16Bit,
+} SEV_ES_INSTRUCTION_MODE;
+
+typedef enum {
+ Size8Bits = 0,
+ Size16Bits,
+ Size32Bits,
+ Size64Bits,
+} SEV_ES_INSTRUCTION_SIZE;
+
+typedef enum {
+ SegmentEs = 0,
+ SegmentCs,
+ SegmentSs,
+ SegmentDs,
+ SegmentFs,
+ SegmentGs,
+} SEV_ES_INSTRUCTION_SEGMENT;
+
+typedef enum {
+ RepNone = 0,
+ RepZ,
+ RepNZ,
+} SEV_ES_INSTRUCTION_REP;
+
+typedef union {
+ struct {
+ UINT8 B:1;
+ UINT8 X:1;
+ UINT8 R:1;
+ UINT8 W:1;
+ UINT8 REX:4;
+ } Bits;
+
+ UINT8 Uint8;
+} SEV_ES_INSTRUCTION_REX_PREFIX;
+
+typedef union {
+ struct {
+ UINT8 Rm:3;
+ UINT8 Reg:3;
+ UINT8 Mod:2;
+ } Bits;
+
+ UINT8 Uint8;
+} SEV_ES_INSTRUCTION_MODRM;
+
+typedef union {
+ struct {
+ UINT8 Base:3;
+ UINT8 Index:3;
+ UINT8 Scale:2;
+ } Bits;
+
+ UINT8 Uint8;
+} SEV_ES_INSTRUCTION_SIB;
+
+typedef struct {
+ struct {
+ UINT8 Rm;
+ UINT8 Reg;
+ UINT8 Mod;
+ } ModRm;
+
+ struct {
+ UINT8 Base;
+ UINT8 Index;
+ UINT8 Scale;
+ } Sib;
+
+ UINTN RegData;
+ UINTN RmData;
+} SEV_ES_INSTRUCTION_OPCODE_EXT;
+
+typedef struct {
+ GHCB *Ghcb;
+
+ SEV_ES_INSTRUCTION_MODE Mode;
+ SEV_ES_INSTRUCTION_SIZE DataSize;
+ SEV_ES_INSTRUCTION_SIZE AddrSize;
+ BOOLEAN SegmentSpecified;
+ SEV_ES_INSTRUCTION_SEGMENT Segment;
+ SEV_ES_INSTRUCTION_REP RepMode;
+
+ UINT8 *Begin;
+ UINT8 *End;
+
+ UINT8 *Prefixes;
+ UINT8 *OpCodes;
+ UINT8 *Displacement;
+ UINT8 *Immediate;
+
+ SEV_ES_INSTRUCTION_REX_PREFIX RexPrefix;
+
+ BOOLEAN ModRmPresent;
+ SEV_ES_INSTRUCTION_MODRM ModRm;
+
+ BOOLEAN SibPresent;
+ SEV_ES_INSTRUCTION_SIB Sib;
+
+ UINT8 PrefixSize;
+ UINT8 OpCodeSize;
+ UINT8 DisplacementSize;
+ UINT8 ImmediateSize;
+
+ SEV_ES_INSTRUCTION_OPCODE_EXT Ext;
+} SEV_ES_INSTRUCTION_DATA;
+
+typedef
+UINTN
+(*NAE_EXIT) (
+ GHCB *Ghcb,
+ EFI_SYSTEM_CONTEXT_X64 *Regs,
+ SEV_ES_INSTRUCTION_DATA *InstructionData
+ );
+
+
+STATIC
+BOOLEAN
+GhcbIsRegValid (
+ GHCB *Ghcb,
+ GHCB_REGISTER Reg
+ )
+{
+ UINT32 RegIndex = Reg / 8;
+ UINT32 RegBit = Reg & 0x07;
+
+ return (Ghcb->SaveArea.ValidBitmap[RegIndex] & (1 << RegBit));
+}
+
+STATIC
+VOID
+GhcbSetRegValid (
+ GHCB *Ghcb,
+ GHCB_REGISTER Reg
+ )
+{
+ UINT32 RegIndex = Reg / 8;
+ UINT32 RegBit = Reg & 0x07;
+
+ Ghcb->SaveArea.ValidBitmap[RegIndex] |= (1 << RegBit);
+}
+
+STATIC
+VOID
+DecodePrefixes (
+ EFI_SYSTEM_CONTEXT_X64 *Regs,
+ SEV_ES_INSTRUCTION_DATA *InstructionData
+ )
+{
+ SEV_ES_INSTRUCTION_MODE Mode;
+ SEV_ES_INSTRUCTION_SIZE ModeDataSize;
+ SEV_ES_INSTRUCTION_SIZE ModeAddrSize;
+ UINT8 *Byte;
+
+ /*TODO: Determine current mode - 64-bit for now */
+ Mode = LongMode64Bit;
+ ModeDataSize = Size32Bits;
+ ModeAddrSize = Size64Bits;
+
+ InstructionData->Mode = Mode;
+ InstructionData->DataSize = ModeDataSize;
+ InstructionData->AddrSize = ModeAddrSize;
+
+ InstructionData->Prefixes = InstructionData->Begin;
+
+ Byte = InstructionData->Prefixes;
+ for ( ; ; Byte++, InstructionData->PrefixSize++) {
+ switch (*Byte) {
+ case 0x26:
+ case 0x2E:
+ case 0x36:
+ case 0x3E:
+ if (Mode != LongMode64Bit) {
+ InstructionData->SegmentSpecified = TRUE;
+ InstructionData->Segment = (*Byte >> 3) & 3;
+ }
+ break;
+
+ case 0x40 ... 0x4F:
+ InstructionData->RexPrefix.Uint8 = *Byte;
+ if (*Byte & 0x08)
+ InstructionData->DataSize = Size64Bits;
+ break;
+
+ case 0x64:
+ InstructionData->SegmentSpecified = TRUE;
+ InstructionData->Segment = *Byte & 7;
+ break;
+
+ case 0x66:
+ if (!InstructionData->RexPrefix.Uint8) {
+ InstructionData->DataSize =
+ (Mode == LongMode64Bit) ? Size16Bits :
+ (Mode == LongModeCompat32Bit) ? Size16Bits :
+ (Mode == LongModeCompat16Bit) ? Size32Bits : 0;
+ }
+ break;
+
+ case 0x67:
+ InstructionData->AddrSize =
+ (Mode == LongMode64Bit) ? Size32Bits :
+ (Mode == LongModeCompat32Bit) ? Size16Bits :
+ (Mode == LongModeCompat16Bit) ? Size32Bits : 0;
+ break;
+
+ case 0xF0:
+ break;
+
+ case 0xF2:
+ InstructionData->RepMode = RepZ;
+ break;
+
+ case 0xF3:
+ InstructionData->RepMode = RepNZ;
+ break;
+
+ default:
+ InstructionData->OpCodes = Byte;
+ InstructionData->OpCodeSize = (*Byte == 0x0F) ? 2 : 1;
+
+ InstructionData->End = Byte + InstructionData->OpCodeSize;
+ InstructionData->Displacement = InstructionData->End;
+ InstructionData->Immediate = InstructionData->End;
+ return;
+ }
+ }
+}
+
+UINT64
+InstructionLength (
+ SEV_ES_INSTRUCTION_DATA *InstructionData
+ )
+{
+ return (UINT64) (InstructionData->End - InstructionData->Begin);
+}
+
+STATIC
+VOID
+InitInstructionData (
+ SEV_ES_INSTRUCTION_DATA *InstructionData,
+ GHCB *Ghcb,
+ EFI_SYSTEM_CONTEXT_X64 *Regs
+ )
+{
+ SetMem (InstructionData, sizeof (*InstructionData), 0);
+ InstructionData->Ghcb = Ghcb;
+ InstructionData->Begin = (UINT8 *) Regs->Rip;
+ InstructionData->End = (UINT8 *) Regs->Rip;
+
+ DecodePrefixes (Regs, InstructionData);
+}
+
+STATIC
+UINTN
+UnsupportedExit (
+ GHCB *Ghcb,
+ EFI_SYSTEM_CONTEXT_X64 *Regs,
+ SEV_ES_INSTRUCTION_DATA *InstructionData
+ )
+{
+ UINTN Status;
+
+ Status = VmgExit (Ghcb, SvmExitUnsupported, Regs->ExceptionData, 0);
+ ASSERT (0);
+
+ return Status;
+}
+
+#define IOIO_TYPE_STR (1 << 2)
+#define IOIO_TYPE_IN 1
+#define IOIO_TYPE_INS (IOIO_TYPE_IN | IOIO_TYPE_STR)
+#define IOIO_TYPE_OUT 0
+#define IOIO_TYPE_OUTS (IOIO_TYPE_OUT | IOIO_TYPE_STR)
+
+#define IOIO_REP (1 << 3)
+
+#define IOIO_ADDR_64 (1 << 9)
+#define IOIO_ADDR_32 (1 << 8)
+#define IOIO_ADDR_16 (1 << 7)
+
+#define IOIO_DATA_32 (1 << 6)
+#define IOIO_DATA_16 (1 << 5)
+#define IOIO_DATA_8 (1 << 4)
+
+#define IOIO_SEG_ES (0 << 10)
+#define IOIO_SEG_DS (3 << 10)
+
+STATIC
+UINT64
+IoioExitInfo (
+ EFI_SYSTEM_CONTEXT_X64 *Regs,
+ SEV_ES_INSTRUCTION_DATA *InstructionData
+ )
+{
+ UINT64 ExitInfo = 0;
+
+ switch (*(InstructionData->OpCodes)) {
+ // IN immediate opcodes
+ case 0xE4:
+ case 0xE5:
+ InstructionData->ImmediateSize = 1;
+ InstructionData->End++;
+ ExitInfo |= IOIO_TYPE_IN;
+ ExitInfo |= ((*(InstructionData->OpCodes + 1)) << 16);
+ break;
+
+ // OUT immediate opcodes
+ case 0xE6:
+ case 0xE7:
+ InstructionData->ImmediateSize = 1;
+ InstructionData->End++;
+ ExitInfo |= IOIO_TYPE_OUT;
+ ExitInfo |= ((*(InstructionData->OpCodes + 1)) << 16) | IOIO_TYPE_OUT;
+ break;
+
+ // IN register opcodes
+ case 0xEC:
+ case 0xED:
+ ExitInfo |= IOIO_TYPE_IN;
+ ExitInfo |= ((Regs->Rdx & 0xffff) << 16);
+ break;
+
+ // OUT register opcodes
+ case 0xEE:
+ case 0xEF:
+ ExitInfo |= IOIO_TYPE_OUT;
+ ExitInfo |= ((Regs->Rdx & 0xffff) << 16);
+ break;
+
+ default:
+ return 0;
+ }
+
+ switch (*(InstructionData->OpCodes)) {
+ case 0xE4:
+ case 0xE6:
+ case 0xEC:
+ case 0xEE:
+ // Single-byte opcodes
+ ExitInfo |= IOIO_DATA_8;
+ break;
+
+ default:
+ // Length determined by instruction parsing
+ ExitInfo |= (InstructionData->DataSize == Size16Bits) ? IOIO_DATA_16
+ : IOIO_DATA_32;
+ }
+
+ switch (InstructionData->AddrSize) {
+ case Size16Bits:
+ ExitInfo |= IOIO_ADDR_16;
+ break;
+
+ case Size32Bits:
+ ExitInfo |= IOIO_ADDR_32;
+ break;
+
+ case Size64Bits:
+ ExitInfo |= IOIO_ADDR_64;
+ break;
+
+ default:
+ break;
+ }
+
+ if (InstructionData->RepMode) {
+ ExitInfo |= IOIO_REP;
+ }
+
+ return ExitInfo;
+}
+
+STATIC
+UINTN
+IoioExit (
+ GHCB *Ghcb,
+ EFI_SYSTEM_CONTEXT_X64 *Regs,
+ SEV_ES_INSTRUCTION_DATA *InstructionData
+ )
+{
+ UINT64 ExitInfo1;
+ UINTN Status;
+
+ ExitInfo1 = IoioExitInfo (Regs, InstructionData);
+ if (!ExitInfo1) {
+ VmgExit (Ghcb, SvmExitUnsupported, SvmExitIoioProt, 0);
+ ASSERT (0);
+ }
+
+ if (!(ExitInfo1 & IOIO_TYPE_IN)) {
+ Ghcb->SaveArea.Rax = Regs->Rax;
+ GhcbSetRegValid (Ghcb, GhcbRax);
+ }
+
+ //FIXME: This is likely needed for the merging cases (size<32 bits)
+ // Pass in zero and perform merge here (only for non-string)
+ Ghcb->SaveArea.Rax = Regs->Rax;
+ GhcbSetRegValid (Ghcb, GhcbRax);
+
+ Status = VmgExit (Ghcb, SvmExitIoioProt, ExitInfo1, 0);
+ if (Status) {
+ return Status;
+ }
+
+ if (ExitInfo1 & IOIO_TYPE_IN) {
+ if (!GhcbIsRegValid (Ghcb, GhcbRax)) {
+ VmgExit (Ghcb, SvmExitUnsupported, SvmExitIoioProt, 0);
+ ASSERT (0);
+ }
+ Regs->Rax = Ghcb->SaveArea.Rax;
+ }
+
+ return 0;
+}
+
UINTN
DoVcCommon (
GHCB *Ghcb,
@@ -11,6 +430,8 @@ DoVcCommon (
)
{
EFI_SYSTEM_CONTEXT_X64 *Regs = Context.SystemContextX64;
+ SEV_ES_INSTRUCTION_DATA InstructionData;
+ NAE_EXIT NaeExit;
UINTN ExitCode;
UINTN Status;
@@ -18,8 +439,19 @@ DoVcCommon (
ExitCode = Regs->ExceptionData;
switch (ExitCode) {
+ case SvmExitIoioProt:
+ NaeExit = IoioExit;
+ break;
+
default:
- Status = VmgExit (Ghcb, SvmExitUnsupported, ExitCode, 0);
+ NaeExit = UnsupportedExit;
+ }
+
+ InitInstructionData (&InstructionData, Ghcb, Regs);
+
+ Status = NaeExit (Ghcb, Regs, &InstructionData);
+ if (!Status) {
+ Regs->Rip += InstructionLength(&InstructionData);
}
VmgDone (Ghcb);
--
2.17.1
next prev parent reply other threads:[~2019-09-19 19:52 UTC|newest]
Thread overview: 106+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-19 19:52 [RFC PATCH v2 00/44] SEV-ES guest support Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 01/44] MdePkg: Create PCDs to be used in support of SEV-ES Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 02/44] OvmfPkg/MemEncryptSevLib: Add an SEV-ES guest indicator function Lendacky, Thomas
2019-09-24 11:53 ` [edk2-devel] " Laszlo Ersek
2019-09-19 19:52 ` [RFC PATCH v2 03/44] OvmfPkg: Add support to perform SEV-ES initialization Lendacky, Thomas
2019-09-24 11:59 ` [edk2-devel] " Laszlo Ersek
2019-09-24 14:43 ` Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 04/44] OvmfPkg/ResetVector: Add support for a 32-bit SEV check Lendacky, Thomas
2019-09-24 13:42 ` [edk2-devel] " Laszlo Ersek
2019-09-24 13:50 ` Laszlo Ersek
2019-09-24 18:57 ` Lendacky, Thomas
2019-09-25 14:45 ` Laszlo Ersek
2019-09-30 19:29 ` Laszlo Ersek
2019-09-30 19:55 ` Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 05/44] MdePkg: Add the MSR definition for the GHCB register Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 06/44] OvmfPkg: Create a GHCB page for use during Sec phase Lendacky, Thomas
2019-09-25 8:09 ` [edk2-devel] " Laszlo Ersek
2019-09-25 17:36 ` Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 07/44] OvmfPkg/PlatformPei: Reserve GHCB-related areas if S3 is supported Lendacky, Thomas
2019-09-25 8:27 ` [edk2-devel] " Laszlo Ersek
2019-09-25 17:52 ` Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 08/44] OvmfPkg: Create GHCB pages for use during Pei and Dxe phase Lendacky, Thomas
2019-09-26 8:00 ` [edk2-devel] " Laszlo Ersek
2019-09-26 14:00 ` Lendacky, Thomas
2019-09-30 18:52 ` Laszlo Ersek
2019-09-30 19:49 ` Lendacky, Thomas
2019-09-30 19:12 ` Laszlo Ersek
2019-09-30 19:51 ` Lendacky, Thomas
2019-10-02 10:23 ` Laszlo Ersek
2019-10-02 14:43 ` Lendacky, Thomas
2019-10-02 15:55 ` Laszlo Ersek
2019-09-19 19:52 ` [RFC PATCH v2 09/44] MdeModulePkg/DxeIplPeim: Support GHCB pages when creating page tables Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 10/44] OvmfPkg: A per-CPU variable area for #VC usage Lendacky, Thomas
2019-09-26 8:17 ` [edk2-devel] " Laszlo Ersek
2019-09-26 14:46 ` Lendacky, Thomas
2019-09-30 19:15 ` Laszlo Ersek
2019-09-30 19:52 ` Lendacky, Thomas
2019-10-02 11:51 ` Laszlo Ersek
2019-10-02 16:06 ` Lendacky, Thomas
2019-10-03 9:06 ` Laszlo Ersek
2019-09-19 19:52 ` [RFC PATCH v2 11/44] OvmfPkg/PlatformPei: Move early GDT into ram when SEV-ES is enabled Lendacky, Thomas
2019-10-02 12:05 ` [edk2-devel] " Laszlo Ersek
2019-10-02 16:10 ` Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 12/44] MdePkg: Add a structure definition for the GHCB Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 13/44] MdePkg/BaseLib: Add support for the VMGEXIT instruction Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 14/44] UefiCpuPkg: Implement library support for VMGEXIT Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 15/44] UefiCpuPkg/CpuExceptionHandler: Add base support for the #VC exception Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 16/44] OvmfPkg/MemEncryptSevLib: Make MemEncryptSevLib available during SEC Lendacky, Thomas
2019-10-02 12:24 ` [edk2-devel] " Laszlo Ersek
2019-10-02 12:30 ` Laszlo Ersek
2019-10-02 16:16 ` Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 17/44] UefiCpuPkg/CpuExceptionHandler: Add #VC exception handling for Sec phase Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 18/44] OvmfPkg/Sec: Enable cache early to speed up booting Lendacky, Thomas
2019-10-02 12:31 ` [edk2-devel] " Laszlo Ersek
2019-09-19 19:52 ` Lendacky, Thomas [this message]
2019-09-19 19:52 ` [RFC PATCH v2 20/44] UefiCpuPkg/CpuExceptionHandler: Support string IO for IOIO_PROT NAE events Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 21/44] MdePkg: Add support for the XGETBV instruction Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 22/44] UefiCpuPkg/CpuExceptionHandler: Add support for CPUID NAE events Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 23/44] UefiCpuPkg/CpuExceptionHandler: Add support for MSR_PROT " Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 24/44] UefiCpuPkg/CpuExceptionHandler: Add support for NPF NAE events (MMIO) Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 25/44] UefiCpuPkg/CpuExceptionHandler: Add support for WBINVD NAE events Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 26/44] UefiCpuPkg/CpuExceptionHandler: Add support for RDTSC " Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 27/44] UefiCpuPkg/CpuExceptionHandler: Add support for RDPMC " Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 28/44] UefiCpuPkg/CpuExceptionHandler: Add support for INVD " Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 29/44] UefiCpuPkg/CpuExceptionHandler: Add support for VMMCALL " Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 30/44] UefiCpuPkg/CpuExceptionHandler: Add support for RDTSCP " Lendacky, Thomas
2019-09-19 19:52 ` [RFC PATCH v2 31/44] UefiCpuPkg/CpuExceptionHandler: Add support for MONITOR/MONITORX " Lendacky, Thomas
2019-09-19 19:53 ` [RFC PATCH v2 32/44] UefiCpuPkg/CpuExceptionHandler: Add support for MWAIT/MWAITX " Lendacky, Thomas
2019-09-19 19:53 ` [RFC PATCH v2 33/44] UefiCpuPkg/CpuExceptionHandler: Add support for DR7 Read/Write " Lendacky, Thomas
2019-09-19 19:53 ` [RFC PATCH v2 34/44] UefiCpuPkg/MpInitLib: Update CPU MP data with a flag to indicate if SEV-ES is active Lendacky, Thomas
2019-09-19 19:53 ` [RFC PATCH v2 35/44] MdeModulePkg: Reserve a 16-bit protected mode code segment descriptor Lendacky, Thomas
2019-09-19 19:53 ` [RFC PATCH v2 36/44] UefiCpuPkg: Add " Lendacky, Thomas
2019-09-19 19:53 ` [RFC PATCH v2 37/44] OvmfPkg: Add support for SEV-ES AP reset vector re-directing Lendacky, Thomas
2019-10-02 14:54 ` [edk2-devel] " Laszlo Ersek
2019-10-02 17:33 ` Lendacky, Thomas
2019-10-03 9:09 ` Laszlo Ersek
2019-09-19 19:53 ` [RFC PATCH v2 38/44] UefiCpuPkg: Allow AP booting under SEV-ES Lendacky, Thomas
2019-10-02 15:15 ` [edk2-devel] " Laszlo Ersek
2019-10-02 15:26 ` Laszlo Ersek
2019-10-02 18:07 ` Lendacky, Thomas
2019-10-03 10:12 ` Laszlo Ersek
2019-10-03 10:32 ` Laszlo Ersek
2019-10-03 15:12 ` Lendacky, Thomas
2019-10-10 23:17 ` Lendacky, Thomas
2019-10-10 23:56 ` Andrew Fish
2019-10-11 8:56 ` Laszlo Ersek
2019-10-12 6:42 ` Andrew Fish
2019-10-12 7:46 ` Liming Gao
2019-10-12 18:50 ` Andrew Fish
2019-10-14 13:11 ` Laszlo Ersek
2019-10-14 19:11 ` Andrew Fish
2019-10-02 17:58 ` Lendacky, Thomas
2019-10-03 9:21 ` Laszlo Ersek
2019-09-19 19:53 ` [RFC PATCH v2 40/44] MdePkg: Add a finalization function to the CPU protocol Lendacky, Thomas
2019-09-20 13:16 ` [RFC PATCH v2 39/44] OvmfPkg: Move the GHCB allocations into reserved memory Lendacky, Thomas
2019-10-02 14:38 ` [edk2-devel] " Laszlo Ersek
2019-09-20 13:16 ` [RFC PATCH v2 41/44] UefiCpuPkg/MpInitLib: Add MP finalization interface to MpInitLib Lendacky, Thomas
2019-09-20 13:16 ` [RFC PATCH v2 42/44] UefiCpuPkg/MpInitLib: Prepare SEV-ES guest APs for OS use Lendacky, Thomas
2019-12-12 8:24 ` Ni, Ray
2019-12-13 16:35 ` Lendacky, Thomas
2019-09-20 13:16 ` [RFC PATCH v2 43/44] UefiCpuPkg/CpuDxe: Provide an DXE MP finalization routine to support SEV-ES Lendacky, Thomas
2019-09-20 13:16 ` [RFC PATCH v2 44/44] MdeModulePkg/DxeCore: Perform the CPU protocol finalization support Lendacky, Thomas
2019-09-20 19:24 ` [RFC PATCH v2 00/44] SEV-ES guest support Lendacky, Thomas
2019-09-24 1:55 ` [edk2-devel] " Dong, Eric
2019-09-24 14:31 ` Lendacky, Thomas
2019-09-25 22:31 ` Ni, Ray
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