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* [PATCH] CorebootPayloadPkg/PciHostBridgeLib: Fix the wrong PCI resource limit
@ 2016-10-17 17:50 Maurice Ma
  0 siblings, 0 replies; only message in thread
From: Maurice Ma @ 2016-10-17 17:50 UTC (permalink / raw)
  To: edk2-devel; +Cc: Maurice Ma, Prince Agyeman

The current PCI resource limit calculation in CorebootPayloadPkg
PciHostBridgeLib is wrong. Adjusted it to match the PciHostBridge
driver's expectation.

Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
---
 CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c b/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c
index 0f1c8cb1a210..6d94ff72c956 100644
--- a/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c
+++ b/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c
@@ -91,7 +91,7 @@ AdjustRootBridgeResource (
   // Align IO  resource at 4K  boundary
   //
   Mask        = 0xFFFULL;
-  Io->Limit   = (Io->Limit + Mask) & ~Mask;
+  Io->Limit   = ((Io->Limit + Mask) & ~Mask) - 1;
   if (Io->Base != MAX_UINT64) {
     Io->Base &= ~Mask;
   }
@@ -100,7 +100,7 @@ AdjustRootBridgeResource (
   // Align MEM resource at 1MB boundary
   //
   Mask        = 0xFFFFFULL;
-  Mem->Limit  = (Mem->Limit + Mask) & ~Mask;
+  Mem->Limit  = ((Mem->Limit + Mask) & ~Mask) - 1;
   if (Mem->Base != MAX_UINT64) {
     Mem->Base &= ~Mask;
   }
-- 
1.9.5.msysgit.0



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2016-10-17 17:50 [PATCH] CorebootPayloadPkg/PciHostBridgeLib: Fix the wrong PCI resource limit Maurice Ma

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