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* [PATCH edk2-platforms 3/4] Platform/SolidRun: Add Hummingboard ACPI tables
  2018-07-22  1:30 [PATCH edk2-platforms 0/4] Import Solidrun Hummingboard Edge package Chris Co
@ 2018-07-22  1:30 ` Chris Co
  0 siblings, 0 replies; 3+ messages in thread
From: Chris Co @ 2018-07-22  1:30 UTC (permalink / raw)
  To: edk2-devel@lists.01.org; +Cc: Michael D Kinney, Ard Biesheuvel, Leif Lindholm

This adds ACPI table support for Solidrun i.MX6 Hummingboard Edge.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Christopher Co <christopher.co@microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
---
 Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/AcpiTables.inf      |  51 +++
 Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/DSDT.asl            |  37 ++
 Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Audio.inc      |  66 +++
 Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-AudioCodec.inc |  29 ++
 Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Pwm.inc        |  30 ++
 Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Rhp.inc        | 201 +++++++++
 Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Sdhc.inc       | 436 ++++++++++++++++++++
 Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Spi.inc        |  42 ++
 Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Uart.inc       | 197 +++++++++
 Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Usb.inc        | 410 ++++++++++++++++++
 10 files changed, 1499 insertions(+)

diff --git a/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/AcpiTables.inf b/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/AcpiTables.inf
new file mode 100644
index 000000000000..cd62287b9767
--- /dev/null
+++ b/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/AcpiTables.inf
@@ -0,0 +1,51 @@
+## @file
+#
+#  Copyright (c) Microsoft Corporation. All rights reserved.
+#
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = PlatformAcpiTables
+  FILE_GUID                      = 7E374E25-8E01-4FEE-87F2-390C23C606CD
+  MODULE_TYPE                    = USER_DEFINED
+  VERSION_STRING                 = 1.0
+  DEFINE COMMON_ACPI_DIR         = Silicon/NXP/iMX6Pkg/AcpiTables
+
+[Sources]
+  DSDT.asl
+  $(COMMON_ACPI_DIR)/Csrt.aslc
+  $(COMMON_ACPI_DIR)/Dbg2.aslc
+  $(COMMON_ACPI_DIR)/Fadt.aslc
+  $(COMMON_ACPI_DIR)/Madt.aslc
+  $(COMMON_ACPI_DIR)/Mcfg.aslc
+  $(COMMON_ACPI_DIR)/Tpm2.aslc
+  $(COMMON_ACPI_DIR)/Spcr.aslc
+
+[Packages]
+  ArmPkg/ArmPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  Silicon/NXP/iMX6Pkg/iMX6Pkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+  Silicon/NXP/iMXPlatformPkg/iMXPlatformPkg.dec
+  Platform/Microsoft/OpteeClientPkg/OpteeClientPkg.dec
+
+[FixedPcd]
+  giMX6TokenSpaceGuid.PcdPcieHostConfigBase
+  giMX6TokenSpaceGuid.PcdPcieDeviceConfigBase
+  gArmPlatformTokenSpaceGuid.PcdCoreCount
+  gArmTokenSpaceGuid.PcdGicDistributorBase
+  gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
+  giMXPlatformTokenSpaceGuid.PcdKdUartInstance
+  gOpteeClientPkgTokenSpaceGuid.PcdTpm2AcpiBufferBase
+  gOpteeClientPkgTokenSpaceGuid.PcdTpm2AcpiBufferSize
diff --git a/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/DSDT.asl b/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/DSDT.asl
new file mode 100644
index 000000000000..e3c8b3f1a69e
--- /dev/null
+++ b/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/DSDT.asl
@@ -0,0 +1,37 @@
+/*
+*
+*  Copyright (c) Microsoft Corporation. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+*/
+#define SOC_TYPE 0x00000063  // iMX6 Quad
+
+DefinitionBlock ("DSDT.aml", "DSDT", 5, "MSFT", "EDK2", 1)
+{
+    Scope (\_SB_)
+    {
+        include("Dsdt-Common.inc")
+        include("Dsdt-Platform.inc")
+        include("Dsdt-Gpio.inc")
+        include("Dsdt-Gfx.inc")
+        include("Dsdt-Usb.inc")
+        include("Dsdt-PCIe.inc")
+        include("Dsdt-Sdhc.inc")
+        include("Dsdt-Enet.inc")
+        include("Dsdt-Audio.inc")
+        include("Dsdt-AudioCodec.inc")
+        include("Dsdt-Uart.inc")
+        include("Dsdt-I2c.inc")
+        include("Dsdt-Spi.inc")
+        include("Dsdt-Rhp.inc")
+        include("Dsdt-Pwm.inc")
+        include("Dsdt-TrEE.inc")
+    } // \_SB_
+}
diff --git a/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Audio.inc b/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Audio.inc
new file mode 100644
index 000000000000..18aabac8b4de
--- /dev/null
+++ b/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Audio.inc
@@ -0,0 +1,66 @@
+/*
+*
+*  Copyright (c) Microsoft Corporation. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+*/
+
+Device (SSI1)
+{
+    Name (_HID, "FSCL000A")
+    Name (_UID, 0x1)
+    Method (_STA)
+    {
+        Return(0xf)
+    }
+    Method (_CRS, 0x0, NotSerialized) {
+        Name (RBUF, ResourceTemplate () {
+            MEMORY32FIXED(ReadWrite, 0x02028000, 0x4000, )
+            Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 78 }
+        })
+        Return(RBUF)
+    }
+}
+
+Device (SSI2)
+{
+    Name (_HID, "FSCL000A")
+    Name (_UID, 0x2)
+    Method (_STA)
+    {
+        Return(0xf)
+    }
+    Method (_CRS, 0x0, NotSerialized) {
+        Name (RBUF, ResourceTemplate () {
+            MEMORY32FIXED(ReadWrite, 0x0202C000, 0x4000, )
+            Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 79 }
+        })
+        Return(RBUF)
+    }
+}
+
+Device (SSI3)
+{
+    Name (_HID, "FSCL000A")
+    Name (_UID, 0x3)
+    Method (_STA)
+    {
+        Return(0xf)
+    }
+    Method (_CRS, 0x0, NotSerialized) {
+        Name (RBUF, ResourceTemplate () {
+            MEMORY32FIXED(ReadWrite, 0x02030000, 0x4000, )
+            MEMORY32FIXED(ReadWrite, 0x021d8000, 0x38, )
+            Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 80 }
+            MsftFunctionConfig(Shared, PullDown, 0, "\\_SB.SSI3", 0, ResourceConsumer, ) { 7, 5 }
+        })
+        Return(RBUF)
+    }
+}
diff --git a/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-AudioCodec.inc b/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-AudioCodec.inc
new file mode 100644
index 000000000000..73374b24d616
--- /dev/null
+++ b/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-AudioCodec.inc
@@ -0,0 +1,29 @@
+/*
+*
+*  Copyright (c) Microsoft Corporation. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+*/
+
+Device (ACDK)
+{
+    Name (_HID, "SGTL5000")
+    Name (_UID, 0x0)
+    Method (_STA)
+    {
+        Return(0xf)
+    }
+    Method (_CRS, 0x0, NotSerialized) {
+        Name (RBUF, ResourceTemplate () {
+            I2CSerialBus(0x0a, ControllerInitiated, 400000, AddressingMode7Bit, "\\_SB.I2C1", 0, ResourceConsumer)
+        })
+        Return(RBUF)
+    }
+}
diff --git a/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Pwm.inc b/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Pwm.inc
new file mode 100644
index 000000000000..f6566c75a4cb
--- /dev/null
+++ b/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Pwm.inc
@@ -0,0 +1,30 @@
+/*
+*
+*  Copyright (c) Microsoft Corporation. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+*/
+
+Device (PWM1)
+{
+    Name (_HID, "FSCL000E")
+    Name (_UID, 0x1)
+    Method (_STA)
+    {
+        Return(0xf)
+    }
+    Method (_CRS, 0x0, NotSerialized) {
+        Name (RBUF, ResourceTemplate () {
+            MEMORY32FIXED(ReadWrite, 0x02080000, 0x4000, )
+            Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 115 }
+        })
+        Return(RBUF)
+    }
+}
diff --git a/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Rhp.inc b/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Rhp.inc
new file mode 100644
index 000000000000..fdba2e535058
--- /dev/null
+++ b/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Rhp.inc
@@ -0,0 +1,201 @@
+/*
+*  iMX6 Quad Resource Hub Proxy
+*
+*  Copyright (c) Microsoft Corporation. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+*/
+
+Device(RHPX)
+{
+    Name(_HID, "MSFT8000")
+    Name(_CID, "MSFT8000")
+    Name(_UID, 1)
+
+    Name(_CRS, ResourceTemplate()
+    {
+        // Index 0
+        I2CSerialBus(0xFFFF,, 0,, "\\_SB.I2C3",,,,)
+
+        // Index 1
+        SPISerialBus(              // SCKL
+                                   // MOSI
+                                   // MISO
+                                   // CE0
+            0,                     // Device selection (CE0)
+            PolarityLow,           // Device selection polarity
+            FourWireMode,          // wiremode
+            8,                     // databit len
+            ControllerInitiated,   // slave mode
+            4000000,               // connection speed
+            ClockPolarityLow,      // clock polarity
+            ClockPhaseFirst,       // clock phase
+            "\\_SB.SPI2",          // ResourceSource: SPI bus controller name
+            0,                     // ResourceSourceIndex
+                                   // Resource usage
+                                   // DescriptorName: creates name for offset of resource descriptor
+            )                      // Vendor Data
+
+        // SPDIF_IN - GPIO1_IO24 PAD_ENET_RX_ER
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 24 } // 0 * 32 + 24
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 24 }
+
+        // DISP1_DATA17 - GPIO2_IO16 PAD_EIM_ADDR22
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 48 } // 1 * 32 + 16
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 48 }
+
+        // DISP1_DATA16 - GPIO2_IO17 PAD_EIM_ADDR21
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 49 } // 1 * 32 + 17
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 49 }
+
+        // DISP1_DATA15 - GPIO2_IO18 PAD_EIM_ADDR20
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 50 } // 1 * 32 + 18
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 50 }
+
+        // DISP1_DATA14 - GPIO2_IO19 PAD_EIM_ADDR19
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 51 } // 1 * 32 + 19
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 51 }
+
+        // DISP1_DATA13 - GPIO2_IO20 PAD_EIM_ADDR18
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 52 } // 1 * 32 + 20
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 52 }
+
+        // DISP1_DATA12 - GPIO2_IO21 PAD_EIM_ADDR17
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 53 } // 1 * 32 + 21
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 53 }
+
+        // DI1_DISP_CLK - GPIO2_IO22 PAD_EIM_ADDR16
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 54 } // 1 * 32 + 22
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 54 }
+
+        // DISP1_DATA11 - GPIO2_IO28 PAD_EIM_EB0
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 60 } // 1 * 32 + 28
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 60 }
+
+        // DISP1_DATA10 - GPIO2_IO29 PAD_EIM_EB1
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 61 } // 1 * 32 + 29
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 61 }
+
+        // DISP1_DATA09 - GPIO3_IO00 PAD_EIM_AD00
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 64 } // 2 * 32 + 0
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 64 }
+
+        // DISP1_DATA08 - GPIO3_IO01 PAD_EIM_AD01
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 65 } // 2 * 32 + 1
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 65 }
+
+        // DISP1_DATA07 - GPIO3_IO02 PAD_EIM_AD02
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 66 } // 2 * 32 + 2
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 66 }
+
+        // DISP1_DATA06 - GPIO3_IO03 PAD_EIM_AD03
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 67 } // 2 * 32 + 3
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 67 }
+
+        // DISP1_DATA05 - GPIO3_IO04 PAD_EIM_AD04
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 68 } // 2 * 32 + 4
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 68 }
+
+        // DISP1_DATA04 - GPIO3_IO05 PAD_EIM_AD05
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 69 } // 2 * 32 + 5
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 69 }
+
+        // DISP1_DATA03 - GPIO3_IO06 PAD_EIM_AD06
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 70 } // 2 * 32 + 6
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 70 }
+
+        // DISP1_DATA02 - GPIO3_IO07 PAD_EIM_AD07
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 71 } // 2 * 32 + 7
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 71 }
+
+        // DISP1_DATA01 - GPIO3_IO08 PAD_EIM_AD08
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 72 } // 2 * 32 + 8
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 72 }
+
+        // DISP1_DATA00 - GPIO3_IO09 PAD_EIM_AD09
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 73 } // 2 * 32 + 9
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 73 }
+
+        // DI1_PIN15 - GPIO3_IO10 PAD_EIM_AD10
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 74 } // 2 * 32 + 10
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 74 }
+
+        // DI1_PIN02 - GPIO3_IO11 PAD_EIM_AD11
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 75 } // 2 * 32 + 11
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 75 }
+
+        // DI1_PIN03 - GPIO3_IO12 PAD_EIM_AD12
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 76 } // 2 * 32 + 12
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 76 }
+
+        // DI1_D0_CS - GPIO3_IO13 PAD_EIM_AD13
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 77 } // 2 * 32 + 13
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 77 }
+
+        // DI1_D1_CS - GPIO3_IO14 PAD_EIM_AD14
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 78 } // 2 * 32 + 14
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 78 }
+
+        // DI1_PIN01 - GPIO3_IO15 PAD_EIM_AD15
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 79 } // 2 * 32 + 15
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 79 }
+
+        // DISP1_DATA22 - GPIO3_IO26 PAD_EIM_DATA26
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 90 } // 2 * 32 + 26
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 90 }
+
+        // DISP1_DATA23 - GPIO3_IO27 PAD_EIM_DATA27
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 91 } // 2 * 32 + 27
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 91 }
+
+        // DISP1_DATA21 - GPIO3_IO30 PAD_EIM_DATA30
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 94 } // 2 * 32 + 20
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 94 }
+
+        // DISP1_DATA20 - GPIO3_IO31 PAD_EIM_DATA31
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 95 } // 2 * 32 + 31
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 95 }
+
+        // DISP1_DATA19 - GPIO5_IO04 PAD_EIM_ADDR24
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 132 } // 4 * 32 + 4
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 132 }
+
+        // DISP1_DATA18 - GPIO6_IO06 PAD_EIM_ADDR23
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 166 } // 5 * 32 + 6
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 166 }
+
+        // SPDIF_OUT - GPIO7_IO12 PAD_GPIO17
+        GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 204 } // 6 * 32 + 12
+        GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 204 }
+    })
+
+    Name(_DSD, Package()
+    {
+        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+        Package()
+        {
+            // I2C3
+            Package(2) { "bus-I2C-I2C3", Package() { 0 }},
+
+            // SPI 2
+            Package(2) { "bus-SPI-SPI2", Package() { 1 }},                        // Index 1
+            Package(2) { "SPI2-MinClockInHz", 115 },                              // 115 Hz
+            Package(2) { "SPI2-MaxClockInHz", 12000000 },                         // 12 MHz
+            Package(2) { "SPI2-SupportedDataBitLengths", Package() { 8,16,32 }},  // Data bit length
+
+            // GPIO Pin Count and supported drive modes
+            Package (2) { "GPIO-PinCount", 206 },
+            Package (2) { "GPIO-UseDescriptorPinNumbers", 1 },
+
+            // InputHighImpedance, InputPullUp, InputPullDown, OutputCmos
+            Package (2) { "GPIO-SupportedDriveModes", 0xf },
+        }
+    })
+}
diff --git a/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Sdhc.inc b/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Sdhc.inc
new file mode 100644
index 000000000000..3a46d251f931
--- /dev/null
+++ b/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Sdhc.inc
@@ -0,0 +1,436 @@
+/*
+* Description: iMX6 Quad Ultra Secured Digital Host Controllers (uSDHC)
+*
+*  Copyright (c) Microsoft Corporation. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+*/
+
+// uSDHC1: WLAN SDIO Socket
+Device (SDH1)
+{
+    Name (_HID, "FSCL0008")
+    Name (_UID, 0x1)
+
+    Method (_STA)
+    {
+        Return(0xf)
+    }
+
+    Name (_S1D, 0x1)
+    Name (_S2D, 0x1)
+    Name (_S3D, 0x1)
+    Name (_S4D, 0x1)
+
+    Method (_CRS, 0x0, NotSerialized)
+    {
+        Name (RBUF, ResourceTemplate () {
+            MEMORY32FIXED(ReadWrite, 0x02190000, 0x4000, )
+            Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 54 }
+        })
+        Return(RBUF)
+    }
+
+    Name (_DSD, Package()
+    {
+        ToUUID ("DAFFD814-6EBA-4D8C-8A91-BC9BBF4AA301"),
+        Package ()
+        {
+            Package (2) { "BaseClockFrequencyHz", 198000000 },  // SDHC Base/Input Clock: 198MHz
+            Package (2) { "Regulator1V8Exist", 0 },             // 1.8V Switching External Circuitry: Not-Implemented
+            Package (2) { "SlotCount", 1 },                     // Number of SD/MMC slots connected on the bus: 1
+            Package (2) { "RegisterBasePA", 0x02190000 }        // Register base physical address
+        }
+    })
+
+    Device (SD0)
+    {
+        Method (_ADR)
+        {
+            Return (0)
+        }
+
+        Method (_RMV)
+        {
+            Return (0)
+        }
+    }
+}
+
+// uSDHC2: SDCard Socket
+Device (SDH2)
+{
+    Name (_HID, "FSCL0008")
+    Name (_UID, 0x2)
+
+    Method (_STA) {
+        Return(0xf)
+    }
+
+    Name (_S1D, 0x1)
+    Name (_S2D, 0x1)
+    Name (_S3D, 0x1)
+    Name (_S4D, 0x1)
+
+    Method (_CRS, 0x0, NotSerialized)
+    {
+        Name (RBUF, ResourceTemplate () {
+            MEMORY32FIXED(ReadWrite, 0x02194000, 0x4000, )
+            Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 55 }
+        })
+        Return(RBUF)
+    }
+
+    Name (_DSD, Package()
+    {
+        ToUUID ("DAFFD814-6EBA-4D8C-8A91-BC9BBF4AA301"),
+        Package ()
+        {
+            Package (2) { "BaseClockFrequencyHz", 198000000 },  // SDHC Base/Input Clock: 198MHz
+                                                                // ** Temporary disable circuitry until stability is investigated. **
+            Package (2) { "Regulator1V8Exist", 0 },             // 1.8V Switching External Circuitry: Implemented
+            Package (2) { "SlotCount", 1 },                     // Number of SD/MMC slots connected on the bus: 1
+            Package (2) { "RegisterBasePA", 0x02194000 }        // Register base physical address
+        }
+    })
+
+    OperationRegion (GPI4, SystemMemory, 0x020A8000, 0x4)
+
+    // SD2_CLK
+    // IOMUXC_SW_MUX_CTL_PAD_SD2_CLK
+    OperationRegion (MXCK, SystemMemory, 0x020E0354, 0x4)
+
+    // SD2_CMD
+    // IOMUXC_SW_PAD_CTL_PAD_SD2_CMD
+    OperationRegion (PDCD, SystemMemory, 0x020E0740, 0x4)
+    // IOMUXC_SW_MUX_CTL_PAD_SD2_CMD
+    OperationRegion (MXCD, SystemMemory, 0x020E0358, 0x4)
+
+    // SD2_DATA0
+    // IOMUXC_SW_PAD_CTL_PAD_SD2_DATA0
+    OperationRegion (PDD0, SystemMemory, 0x020E0368, 0x4)
+    // IOMUXC_SW_MUX_CTL_PAD_SD2_DATA0
+    OperationRegion (MXD0, SystemMemory, 0x020E0054, 0x4)
+
+    // SD2_DATA1
+    // IOMUXC_SW_PAD_CTL_PAD_SD2_DATA1
+    OperationRegion (PDD1, SystemMemory, 0x020E0360, 0x4)
+    // IOMUXC_SW_MUX_CTL_PAD_SD2_DATA1
+    OperationRegion (MXD1, SystemMemory, 0x020E004C, 0x4)
+
+    // SD2_DATA2
+    // IOMUXC_SW_PAD_CTL_PAD_SD2_DATA2
+    OperationRegion (PDD2, SystemMemory, 0x020E0364, 0x4)
+    // IOMUXC_SW_MUX_CTL_PAD_SD2_DATA2
+    OperationRegion (MXD2, SystemMemory, 0x020E0050, 0x4)
+
+    // SD2_DATA3
+    // IOMUXC_SW_PAD_CTL_PAD_SD2_DATA3
+    OperationRegion (PDD3, SystemMemory, 0x020E0744, 0x4)
+    // IOMUXC_SW_MUX_CTL_PAD_SD2_DATA3
+    OperationRegion (MXD3, SystemMemory, 0x020E035C, 0x4)
+
+    Field (GPI4, DWordAcc, NoLock, Preserve)
+    {
+        G4DR, 32,       // GPIOx_DR
+    }
+
+    Field (MXCK, DWordAcc, NoLock, Preserve)
+    {
+        MCCK, 32,       // IOMUXC_SW_MUX_CTL_PAD_SD2_CLK
+    }
+
+    Field (MXCD, DWordAcc, NoLock, Preserve)
+    {
+        MCCD, 32,       // IOMUXC_SW_MUX_CTL_PAD_SD2_CMD
+    }
+
+    Field (MXD0, DWordAcc, NoLock, Preserve)
+    {
+        MCD0, 32,       // IOMUXC_SW_MUX_CTL_PAD_SD2_DATA0
+    }
+
+    Field (MXD1, DWordAcc, NoLock, Preserve)
+    {
+        MCD1, 32,       // IOMUXC_SW_MUX_CTL_PAD_SD2_DATA1
+    }
+
+    Field (MXD2, DWordAcc, NoLock, Preserve)
+    {
+        MCD2, 32,       // IOMUXC_SW_MUX_CTL_PAD_SD2_DATA2
+    }
+
+    Field (MXD3, DWordAcc, NoLock, Preserve)
+    {
+        MCD3, 32,       // IOMUXC_SW_MUX_CTL_PAD_SD2_DATA3
+    }
+
+    Field (PDCD, DWordAcc, NoLock, Preserve)
+    {
+        PCCD, 32,       // IOMUXC_SW_PAD_CTL_PAD_SD2_CMD
+    }
+
+    Field (PDD0, DWordAcc, NoLock, Preserve)
+    {
+        PCD0, 32,       // IOMUXC_SW_PAD_CTL_PAD_SD2_DATA0
+    }
+
+    Field (PDD1, DWordAcc, NoLock, Preserve)
+    {
+        PCD1, 32,       // IOMUXC_SW_PAD_CTL_PAD_SD2_DATA1
+    }
+
+    Field (PDD2, DWordAcc, NoLock, Preserve)
+    {
+        PCD2, 32,       // IOMUXC_SW_PAD_CTL_PAD_SD2_DATA2
+    }
+
+    Field (PDD3, DWordAcc, NoLock, Preserve)
+    {
+        PCD3, 32,       // IOMUXC_SW_PAD_CTL_PAD_SD2_DATA3
+    }
+
+    // Device Specific Method takes 4 args:
+    //  Arg0 : Buffer containing a UUID [16 bytes]
+    //  Arg1 : Integer containing the Revision ID
+    //  Arg2 : Integer containing the Function Index
+    //  Arg3 : Package that contains function-specific arguments
+    Function(_DSM,{BuffObj, IntObj},{BuffObj, IntObj, IntObj, PkgObj})
+    {
+        Name (REG, 0x0);
+
+        // UUID selector
+        switch (ToBuffer (Arg0))
+        {
+            // SDHC interface identifier
+            case (ToUUID ("D4AC1EA1-BC53-416A-9B8C-481FEE75365C"))
+            {
+                // Function selector
+                switch (Arg2)
+                {
+                // Function 0: Return supported functions, based on revision
+                case (0)
+                {
+                    // Version selector
+                    switch (Arg1)
+                    {
+                        // Revision0: functions {0,1,2} supported
+                        case (0) { Return (Buffer (){0x07}); }
+                        default { Return (Buffer (){0x01}); }
+                    }
+                }
+
+                // GPIO4_IO30 is connected to the SDSocket power MOSFET Gate
+                // Setting to HIGH turns-off power, while LOW turns-on power
+
+                // Function 1: SDSocket Power-On
+                case (1)
+                {
+                    // Power-On the SD VDD
+                    Store (G4DR, REG);
+                    And (REG, 0xBFFFFFFF, REG);
+                    Store (REG, G4DR);
+
+                    // Connect all SD2 pins by switching them to SD and
+                    // enable the pull-up resistor for CMD/DAT[0:3]
+
+                    // SD2_CLK
+                    Store (MCCK, REG);
+                    And (REG, 0xF8, REG); // ALT0 SD2_CLK
+                    Store (REG, MCCK);
+
+                    // SD2_CMD
+                    Store (MCCD, REG);
+                    And (REG, 0xF8, REG); // ALT0 SD2_CMD
+                    Store (REG, MCCD);
+
+                    Store (PCCD, REG);
+                    Or (REG, 0x1000, REG);
+                    Store (REG, PCCD);
+
+                    // SD2_DATA0
+                    Store (MCD0, REG);
+                    And (REG, 0xF8, REG); // ALT0 SD2_DATA0
+                    Store (REG, MCD0);
+
+                    Store (PCD0, REG);
+                    Or (REG, 0x1000, REG);
+                    Store (REG, PCD0);
+
+                    // SD2_DATA1
+                    Store (MCD1, REG);
+                    And (REG, 0xF8, REG); // ALT0 SD2_DATA1
+                    Store (REG, MCD1);
+
+                    Store (PCD1, REG);
+                    Or (REG, 0x1000, REG);
+                    Store (REG, PCD1);
+
+                    // SD2_DATA2
+                    Store (MCD2, REG);
+                    And (REG, 0xF8, REG); // ALT0 SD2_DATA2
+                    Store (REG, MCD2);
+
+                    Store (PCD2, REG);
+                    Or (REG, 0x1000, REG);
+                    Store (REG, PCD2);
+
+                    // SD2_DATA3
+                    Store (MCD3, REG);
+                    And (REG, 0xF8, REG); // ALT0 SD2_DATA3
+                    Store (REG, MCD3);
+
+                    Store (PCD3, REG);
+                    Or (REG, 0x1000, REG);
+                    Store (REG, PCD3);
+
+                    Return (0);
+                }
+
+                // Function 2: SDSocket Power-Off
+                case (2)
+                {
+                    // Power-Off the SD VDD
+                    Store (G4DR, REG);
+                    Or (REG, 0x40000000, REG); // Set GPIO4_IO30 value
+                    Store (REG, G4DR);
+
+                    // Disconnect all SD2 pins by switching them to GPIO Input
+                    // and disable the pull-up resistor on CMD/DAT[0:3]
+
+                    // SD2_CLK
+                    Store (MCCK, REG);
+                    Or (REG, 0x5, REG); // ALT5 GPIO1_IO10
+                    Store (REG, MCCK);
+
+                    // SD2_CMD
+                    Store (MCCD, REG);
+                    Or (REG, 0x5, REG); // ALT5 GPIO1_IO11
+                    Store (REG, MCCD);
+
+                    Store (PCCD, REG);
+                    And (REG, 0xEFFF, REG);
+                    Store (REG, PCCD);
+
+                    // SD2_DATA0
+                    Store (MCD0, REG);
+                    Or (REG, 0x5, REG); // ALT5 GPIO1_IO15
+                    Store (REG, MCD0);
+
+                    Store (PCD0, REG);
+                    And (REG, 0xEFFF, REG);
+                    Store (REG, PCD0);
+
+                    // SD2_DATA1
+                    Store (MCD1, REG);
+                    Or (REG, 0x5, REG); // ALT5 GPIO1_IO14
+                    Store (REG, MCD1);
+
+                    Store (PCD1, REG);
+                    And (REG, 0xEFFF, REG);
+                    Store (REG, PCD1);
+
+                    // SD2_DATA2
+                    Store (MCD2, REG);
+                    Or (REG, 0x5, REG); // ALT5 GPIO1_IO13
+                    Store (REG, MCD2);
+
+                    Store (PCD2, REG);
+                    And (REG, 0xEFFF, REG);
+                    Store (REG, PCD2);
+
+                    // SD2_DATA3
+                    Store (MCD3, REG);
+                    Or (REG, 0x5, REG); // ALT5 GPIO1_IO12
+                    Store (REG, MCD3);
+
+                    Store (PCD3, REG);
+                    And (REG, 0xEFFF, REG);
+                    Store (REG, PCD3);
+
+                    Return (0);
+                }
+
+                default { Return (Buffer (){0}); }
+                } // Function
+            } // {D4AC1EA1-BC53-416A-9B8C-481FEE75365C}
+
+            default { Return (Buffer (){0}); }
+        } // UUID
+    } // _DSM
+
+    Device (SD0)
+    {
+        Method (_ADR)
+        {
+            Return (0)
+        }
+
+        // Despite the SDCard is a removal device, UWF requires the
+        // boot device to be non-removable. This is required for the
+        // Windows SDCard boot scenario with UWF enabled.
+        Method (_RMV)
+        {
+            Return (0)
+        }
+    }
+}
+
+// uSDHC3: eMMC
+Device (SDH3)
+{
+    Name (_HID, "FSCL0008")
+    Name (_UID, 0x3)
+
+    Method (_STA)
+    {
+        Return(0xf)
+    }
+
+    Name (_S1D, 0x1)
+    Name (_S2D, 0x1)
+    Name (_S3D, 0x1)
+    Name (_S4D, 0x1)
+
+    Method (_CRS, 0x0, NotSerialized)
+    {
+        Name (RBUF, ResourceTemplate () {
+            MEMORY32FIXED(ReadWrite, 0x02198000, 0x4000, )
+            Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 56 }
+        })
+        Return(RBUF)
+    }
+
+    Name (_DSD, Package()
+    {
+        ToUUID ("DAFFD814-6EBA-4D8C-8A91-BC9BBF4AA301"),
+        Package ()
+        {
+            Package (2) { "BaseClockFrequencyHz", 198000000 },  // SDHC Base/Input Clock: 198MHz
+            Package (2) { "Regulator1V8Exist", 0 },             // 1.8V Switching External Circuitry: N/A
+            Package (2) { "SlotCount", 1 },                     // Number of SD/MMC slots connected on the bus: 1
+            Package (2) { "RegisterBasePA", 0x02198000 }        // Register base physical address
+        }
+    })
+
+    Device (MMC0)
+    {
+        Method (_ADR)
+        {
+            Return (0)
+        }
+
+        // eMMC is non-removable
+        Method (_RMV)
+        {
+            Return (0)
+        }
+    }
+}
diff --git a/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Spi.inc b/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Spi.inc
new file mode 100644
index 000000000000..211e4b498194
--- /dev/null
+++ b/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Spi.inc
@@ -0,0 +1,42 @@
+/*
+*
+*  Copyright (c) Microsoft Corporation. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+*/
+
+Device (SPI2)
+{
+    Name (_HID, "FSCL0005")
+    Name (_UID, 0x2)
+    Method (_STA)
+    {
+        Return(0xf)
+    }
+    Method (_CRS, 0x0, NotSerialized)
+    {
+        Name (RBUF, ResourceTemplate ()
+        {
+            MEMORY32FIXED(ReadWrite, 0x0200C000, 0x4000, )
+            Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 64 }
+
+            // CS0 (PAD_EIM_RW) GPIO2_IO26
+            GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 58 }
+            // CS1 (PAD_EIM_LBA) GPIO2_IO27
+            GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer, , ) { 59 }
+
+            // MISO: PAD_EIM_OE_B (GPIO2_IO25) Alt2
+            // MOSI: PAD_EIM_CS1_B (GPIO2_IO24) Alt2
+            // SCLK: PAD_EIM_CS0_B (GPIO2_IO23) Alt2
+            MsftFunctionConfig(Exclusive, PullDown, IMX_ALT2, "\\_SB.GPIO", 0, ResourceConsumer, ) { 57, 56, 55 }
+        })
+        Return(RBUF)
+    }
+}
diff --git a/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Uart.inc b/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Uart.inc
new file mode 100644
index 000000000000..0f73ee5d4b08
--- /dev/null
+++ b/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Uart.inc
@@ -0,0 +1,197 @@
+/*
+* Description: iMX6 Quad UART Controllers
+*
+*  Copyright (c) Microsoft Corporation. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+*/
+
+Device (UAR1)
+{
+    Name (_HID, "FSCL0006")
+    Name (_UID, 0x1)
+    Name (_DDN, "UART1")
+    Method (_STA)
+    {
+        Return(0xf)
+    }
+    Method (_CRS, 0x0, NotSerialized) {
+        Name (RBUF, ResourceTemplate () {
+            MEMORY32FIXED(ReadWrite, 0x02020000, 0x4000, )
+            Interrupt(ResourceConsumer, Level, ActiveHigh, Shared) { 58 }
+
+            // UART1_TX_DATA - CSI0_DAT10 - GPIO5_IO28 - 156
+            // UART1_RX_DATA - CSI0_DAT11 - GPIO5_IO29 - 157
+            MsftFunctionConfig(Exclusive, PullUp, IMX_ALT3, "\\_SB.GPIO", 0, ResourceConsumer, ) { 156, 157 }
+
+            // DMA channel 2, SDMA_REQ_UART1_RX for UART1 RX DMA
+            FixedDMA(SDMA_REQ_UART1_RX, 2, Width8Bit, )
+            // DMA channel 1, SDMA_REQ_UART1_TX for UART1 TX DMA
+            FixedDMA(SDMA_REQ_UART1_TX, 1, Width8Bit, )
+
+            UARTSerialBus(
+                115200,
+                DataBitsEight,
+                StopBitsOne,
+                0,                // LinesInUse
+                LittleEndian,
+                ParityTypeNone,
+                FlowControlNone,
+                0,
+                0,
+                "\\_SB.CPU0",
+                0,
+                ResourceConsumer,
+                ,)
+       })
+       Return(RBUF)
+    }
+}
+
+Device (UAR2)
+{
+    Name (_HID, "FSCL0007")
+    Name (_UID, 0x2)
+    Name (_DDN, "UART2")
+    Method (_STA)
+    {
+        Return(0xf)
+    }
+    Method (_CRS, 0x0, NotSerialized) {
+        Name (RBUF, ResourceTemplate () {
+            MEMORY32FIXED(ReadWrite, 0x021E8000, 0x4000, )
+            Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 59 }
+
+            // DMA channel 4, SDMA_REQ_UART2_RX for UART2 RX DMA
+            FixedDMA(SDMA_REQ_UART2_RX, 4, Width8Bit, )
+            // DMA channel 3, SDMA_REQ_UART2_TX for UART2 TX DMA
+            FixedDMA(SDMA_REQ_UART2_TX, 3, Width8Bit, )
+
+            // UART2_TX_DATA - SD4_DAT7 - GPIO2_IO15 - 47
+            // UART2_RX_DATA - SD4_DAT4 - GPIO2_IO12 - 44
+            // UART2_CTS_B - SD4_DAT6 - GPIO2_IO14 - 46
+            // UART2_RTSB is not pinned out because it is connected to USB
+            MsftFunctionConfig(Exclusive, PullUp, IMX_ALT2, "\\_SB.GPIO", 0, ResourceConsumer, ) { 44, 46, 47 }
+
+            UARTSerialBus(
+                115200,
+                DataBitsEight,
+                StopBitsOne,
+                0xC0,                // LinesInUse
+                LittleEndian,
+                ParityTypeNone,
+                FlowControlNone,
+                0,
+                0,
+                "\\_SB.CPU0",
+                0,
+                ResourceConsumer,
+                ,)
+        })
+        Return(RBUF)
+    }
+}
+
+Device (UAR3)
+{
+    Name (_HID, "FSCL0007")
+    Name (_UID, 0x3)
+    Name (_DDN, "UART3")
+    Method (_STA)
+    {
+       Return(0xf)
+    }
+    Method (_CRS, 0x0, NotSerialized) {
+        Name (RBUF, ResourceTemplate () {
+            MEMORY32FIXED(ReadWrite, 0x021EC000, 0x4000, )
+            Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 60 }
+
+            // DMA channel 6, SDMA_REQ_UART3_RX for UART3 RX DMA
+            FixedDMA(SDMA_REQ_UART3_RX, 6, Width8Bit, )
+            // DMA channel 5, SDMA_REQ_UART3_TX for UART3 TX DMA
+            FixedDMA(SDMA_REQ_UART3_TX, 5, Width8Bit, )
+
+            // UART3_TX - EIM_D24 - GPIO3_IO24 - 88
+            // UART3_RX - EIM_D25 - GPIO3_IO25 - 89
+            MsftFunctionConfig(Exclusive, PullUp, IMX_ALT2, "\\_SB.GPIO", 0, ResourceConsumer, ) { 88, 89 }
+
+            UARTSerialBus(
+                115200,
+                DataBitsEight,
+                StopBitsOne,
+                0,                // LinesInUse
+                LittleEndian,
+                ParityTypeNone,
+                FlowControlNone,
+                0,
+                0,
+                "\\_SB.CPU0",
+                0,
+                ResourceConsumer,
+                ,)
+        })
+        Return(RBUF)
+    }
+}
+
+// Connected to bluetooth module
+Device (UAR4)
+{
+    Name (_HID, "FSCL0007")
+    Name (_UID, 0x4)
+    Name (_DDN, "UART4")
+    Method (_STA)
+    {
+        Return(0xf)
+    }
+    Method (_CRS, 0x0, NotSerialized) {
+        Name (RBUF, ResourceTemplate () {
+            MEMORY32FIXED(ReadWrite, 0x021F0000, 0x4000, )
+            Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 61 }
+
+            // DMA channel 8, SDMA_REQ_UART4_RX for UART4 RX DMA
+            FixedDMA(SDMA_REQ_UART4_RX, 8, Width8Bit, )
+            // DMA channel 7, SDMA_REQ_UART4_TX for UART4 TX DMA
+            FixedDMA(SDMA_REQ_UART4_TX, 7, Width8Bit, )
+
+            // UART4_TX_DATA - CSI0_DAT12 - GPIO5_IO30 - 158
+            // UART4_RX_DATA - CSI0_DAT13 - GPIO5_IO31 - 159
+            MsftFunctionConfig(Exclusive, PullUp, IMX_ALT3, "\\_SB.GPIO", 0, ResourceConsumer, ) { 158, 159 }
+
+            // UART4_RTS_B - CSI0_DAT16 - GPIO6_IO02 - 162
+            // UART4_CTS_B - CSI0_DAT17 - GPIO6_IO03 - 163
+            MsftFunctionConfig(Exclusive, PullUp, IMX_ALT3, "\\_SB.GPIO", 0, ResourceConsumer, ) { 162, 163 }
+        })
+        Return(RBUF)
+    }
+}
+
+Device (UAR5)
+{
+    Name (_HID, "FSCL0007")
+    Name (_UID, 0x5)
+    Name (_DDN, "UART5")
+    Method (_STA)
+    {
+        Return(0)
+    }
+    Method (_CRS, 0x0, NotSerialized) {
+        Name (RBUF, ResourceTemplate () {
+            MEMORY32FIXED(ReadWrite, 0x021F4000, 0x4000, )
+            Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 62 }
+
+            // DMA channel 10, SDMA_REQ_UART5_RX for UART5 RX DMA
+            FixedDMA(SDMA_REQ_UART5_RX, 10, Width8Bit, )
+            // DMA channel 9, SDMA_REQ_UART5_TX for UART5 TX DMA
+            FixedDMA(SDMA_REQ_UART5_TX, 9, Width8Bit, )
+        })
+        Return(RBUF)
+    }
+}
diff --git a/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Usb.inc b/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Usb.inc
new file mode 100644
index 000000000000..23d9c499f640
--- /dev/null
+++ b/Platform/SolidRun/HummingboardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Usb.inc
@@ -0,0 +1,410 @@
+/*
+* Description: iMX6 Quad EHCI USB Controllers
+*
+*  Copyright (c) Microsoft Corporation. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+*/
+
+Device(URS0)
+{
+    Name(_HID, "PNP0C90")
+    Name(_UID, 0x0)
+
+    // URS requires device to at least be wake-able from D2 state
+    // WDF also requires that _DSW (enable & disable wake ability) to be present
+    Name(_S0W, 0x3)
+    Name(_PRW, Package() {0,0})
+    Method(_DSW, 0x3, NotSerialized) {
+
+    }
+
+    Method (_STA)
+    {
+        Return(0xf)
+    }
+
+    Method (_CRS, 0x0, NotSerialized) {
+        Name (RBUF, ResourceTemplate () {
+            // Controller register address space. URS driver would add 0x0100
+            // offset for host mode
+            MEMORY32FIXED(ReadWrite, 0x02184000, 0x200, )
+
+            // USB_OTG_ID pin, needs to be declared as *Wake as this device is
+            // expected to be wakable. The USB PHY is capable to detect
+            // USB ID changes but the interrupt cannot be acknowledge
+            // and the behaviour is undefined based on NXP feedback. So
+            // the the only way to reliably detect USB ID changed is to
+            // either to share interrupts or assign a GPIO to detect.
+            // The URS driver does not properly handle level sensitive
+            // interrupts which can lead to an interrupt storm. Therefore we use
+            // an edge sensitive GPIO interrupt.
+            //
+            // USB_OTG_ID connected to GPIO_1 (GPIO1_IO01). Use 1ms debounce.
+            GpioInt (Edge, ActiveBoth, SharedAndWake, PullDefault, 100, "\\_SB.GPIO",) { 1 }
+        })
+        Return(RBUF)
+    }
+
+    Name (OTGR, ResourceTemplate()
+    {
+        GpioIO (Shared, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0, ResourceConsumer,,) { 1 }
+    })
+
+    Scope (\_SB_.GPIO)
+    {
+        OperationRegion (OTGP, GeneralPurposeIO, Zero, One)
+    }
+
+    Field (\_SB_.GPIO.OTGP, ByteAcc, NoLock, Preserve)
+    {
+        Connection (\_SB_.URS0.OTGR),
+        OTGF, 1
+    }
+
+    // Device Specific Method takes 4 args:
+    //  Arg0 : Buffer containing a UUID [16 bytes]
+    //  Arg1 : Integer containing the Revision ID
+    //  Arg2 : Integer containing the Function Index
+    //  Arg3 : Package that contains function-specific arguments (Unused?)
+    Method (_DSM, 0x4, NotSerialized) {
+        Name (RET, 0x0); // Declare return variable
+        Name (PVAL, 0x0); // Declare pin value variable
+
+        // Check UUID
+        switch(ToBuffer(Arg0))
+        {
+            // URS UUID
+            case(ToUUID("14EB0A6A-79ED-4B37-A8C7-84604B55C5C3"))
+            {
+                // Function index
+                switch(Arg2)
+                {
+                    //
+                    // Function 0: Return supported functions, based on revision
+                    // Return value and revision ID lack documentation
+                    //
+                    case(0)
+                    {
+                        switch(Arg1)
+                        {
+                            // Revision 0: function {1,2} supported
+                            case(0)
+                            {
+                                Return(0x03);
+                            }
+                            default
+                            {
+                                Return(0x0);
+                            }
+                        }
+                    }
+
+                    //
+                    // Function 1: Read USB_OTG_ID pin value
+                    //
+                    // Return value
+                    // 0 = UrsHardwareEventIdFloat (Function)
+                    // 1 = UrsHardwareEventIdGround (Host)
+                    //
+                    case(1)
+                    {
+                        Store(OTGF, PVAL);                   // Read value of OTG_ID Pin
+                        Store(LEqual(PVAL, 0), RET);         // Complement value
+                        Return(RET);
+                    }
+
+                    //
+                    // Function 2: Read USB_OTG_ID pin value
+                    //
+                    // Return value
+                    // 0 = UrsHardwareEventIdFloat (Function)
+                    // 1 = UrsHardwareEventIdGround (Host)
+                    //
+                    case(2)
+                    {
+                        Store(OTGF, PVAL);                   // Read value of OTG_ID Pin
+                        Store(LEqual(PVAL, 0), RET);         // Complement value
+                        Return(RET);
+                    }
+
+                    //
+                    // Unknown function index
+                    //
+                    default
+                    {
+                        Return(0x0);
+                    }
+                } // Function index
+            }
+
+            //
+            // Unknown UUID
+            //
+            default
+            {
+                Return(0x0);
+            }
+        } // Check UUID
+    } // _DSM
+
+    Device (USB0)
+    {
+        //
+        // The host controller device node needs to have an address of '0'
+        //
+        Name(_ADR, 0x0)
+        Name(_UID, 0x0)
+        Name (_S0W, 0x0) // D0 is the lowest supported state to wake itself up
+        Method (_STA)
+        {
+            Return(0xf)
+        }
+        Method (_CRS, 0x0, NotSerialized) {
+            Name (RBUF, ResourceTemplate () {
+                Interrupt(ResourceConsumer, Level, ActiveHigh, SharedAndWake) { 75 }
+            })
+            Return(RBUF)
+        }
+
+        OperationRegion (OTGM, SystemMemory, 0x02184100, 0x100)
+        Field (OTGM, WordAcc, NoLock, Preserve)
+        {
+            Offset(0x84),   // skip to register 84h
+            PTSC, 32,       // port status control
+            Offset(0xA8),   // skip to register A8h
+            DSBM, 32,       // UOG_USBMOD
+        }
+
+        Name (REG, 0x0);    // Declare register read variable
+        Method (_UBF, 0x0, NotSerialized) {
+            //
+            // Reset handled by driver so no reset required here
+            //
+            Store(0x03, DSBM);          // set host mode & little endian
+            Store(PTSC, REG);           // read PORTSC status
+            Store(OR(REG,0x2),PTSC);    // clear current PORTSC status
+        }
+    }
+
+    Device(UFN0)
+    {
+        //
+        // The function controller device node needs to have an address of '1'
+        //
+        Name(_ADR, 0x1)
+
+        Method (_CRS, 0x0, NotSerialized) {
+            Name (RBUF, ResourceTemplate () {
+                Interrupt(ResourceConsumer, Level, ActiveHigh, SharedAndWake) { 75 }
+            })
+            Return(RBUF)
+        }
+
+        OperationRegion (OTGM, SystemMemory, 0x02184100, 0x100)
+        Field (OTGM, WordAcc, NoLock, Preserve)
+        {
+            Offset(0x84),   // skip to register 84h
+            PTSC, 32,       // port status control
+            Offset(0xA8),   // skip to register A8h
+            DSBM, 32,       // UOG_USBMOD
+        }
+
+        Name (REG, 0x0);    // Declare register read variable
+        Method (_UBF, 0x0, NotSerialized) {
+            //
+            // Reset handled by driver so no reset required here
+            //
+            Store(0x02, DSBM);          // set device mode & little endian
+            Store(PTSC, REG);           // read PORTSC status
+            Store(OR(REG,0x2),PTSC);    // clear current PORTSC status
+        }
+
+        //
+        // Device Specific Method takes 4 args:
+        //  Arg0 : Buffer containing a UUID [16 bytes]
+        //  Arg1 : Integer containing the Revision ID
+        //  Arg2 : Integer containing the Function Index
+        //  Arg3 : Package that contains function-specific arguments
+        //
+        Method (_DSM, 0x4, NotSerialized) {
+
+            switch(ToBuffer(Arg0))
+            {
+                // UFX Chipidea interface identifier
+                case(ToUUID("732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"))
+                {
+                    // Function selector
+                    switch(Arg2)
+                    {
+                        //
+                        // Function 0: Query support
+                        //   Bit  Description
+                        //   ---  -------------------------------
+                        //     0  Get property
+                        //     1  Get properties (Function 1)
+                        //     2  Set USB device state
+                        //
+                        case(0)
+                        {
+                            switch(Arg1)
+                            {
+                                // Revision 0: functions {0,1} supported
+                                case(0)
+                                {
+                                    Return(Buffer(){0x03});
+                                }
+                                default
+                                {
+                                    Return(Buffer(){0x01});
+                                }
+                            }
+                        }
+
+                        //
+                        // Function 1: Return device capabilities bitmap
+                        //   Bit  Description
+                        //   ---  -------------------------------
+                        //     0  Attach detach
+                        //     1  Software charging
+                        //
+                        case(1)
+                        {
+                            Return(0x01);
+                        }
+
+                        //
+                        // Function 2: Get port type
+                        //     0x00  Unknown port
+                        //     0x01  Standard downstream
+                        //     0x02  Charging downstream
+                        //     0x03  Dedicated charging
+                        //
+                        case(2)
+                        {
+                            Return(0x01);
+                        }
+
+                        //
+                        // Function 3: Set device state
+                        //
+                        case(3)
+                        {
+                            Return (Buffer(){0x0});
+                        }
+
+                        //
+                        // Unknown function
+                        //
+                        default
+                        {
+                             Return (Buffer(){0x0});
+                        }
+                    }
+                }
+
+                // UFX interface identifier
+                case(ToUUID("FE56CFEB-49D5-4378-A8A2-2978DBE54AD2"))
+                {
+                    // Function selector
+                    switch(Arg2)
+                    {
+                        // Function 1: Return number of supported USB PHYSICAL endpoints
+                        // Up to 8 bidirectional endpoints
+                        case(1)
+                        {
+                            Return(8);
+                        }
+                        default
+                        {
+                            Return (Buffer(){0x0});
+                        }
+                    }
+                }
+
+                //
+                // Unknown UUID
+                //
+                default
+                {
+                    Return(0x0);
+                }
+            } // UUID
+        } // _DSM
+    }
+}
+
+Device (USB1)
+{
+    Name (_HID, "FSCL000C")
+    Name (_CID, "PNP0D20")
+    Name (_UID, 0x1)
+    Name (_S0W, 0x0)
+
+    // USB Host controller registers
+    OperationRegion (USBH, SystemMemory, 0x02184000, 0x1000)
+    Field (USBH, DWordAcc, NoLock, Preserve)
+    {
+        Offset(0x00000344),
+        USTS, 32,             // USB_UH1_USBSTS
+        Offset(0x00000348),
+        INTR, 32,             // USB_UH1_USBINTR
+        Offset(0x00000384),   // skip to register 0x384
+        PSC1, 32,             // USB_UH1_PORTSC1
+        Offset(0x00000804),   // skip to register 0x804
+        NCTL, 32,             // USBNC_USB_UH1_CTRL
+    }
+
+    // USBPHY2 Registers
+    OperationRegion (PHY2, SystemMemory, 0x020CA000, 0x1000)
+    Field (PHY2, DWordAcc, NoLock, Preserve)
+    {
+        Offset(0x0000000),      // skip to register 0
+        PPWD, 32,               // USBPHY2_PWD
+        Offset(0x00000030),     // skip to register 0x30
+        PCTL, 32,               // USBPHY2_CTRL
+        Offset(0x00000034),     // skip to register 0x34
+        PCTS, 32,               // USBPHY2_CTRL_SET
+        Offset(0x00000038),     // skip to register 0x38
+        PCTC, 32,               // USBPHY2_CTRL_CLR
+        Offset(0x00000050),     // skip to register 0x50
+        PDBG, 32,               // USBPHY2_DEBUG
+        Offset(0x00000054),     // skip to register 0x54
+        PDBS, 32,               // USBPHY2_DEBUG_SET
+        Offset(0x00000058),     // skip to register 0x58
+        PDBC, 32,               // USBPHY2_DEBUG_CLR
+    }
+
+    // Anatop Registers
+    OperationRegion (ANAT, SystemMemory, 0x020C8000, 0x1000)
+    Field (ANAT, DWordAcc, NoLock, Preserve)
+    {
+        Offset(0x0000244),      // skip to register 0x244
+        LPBS, 32,               // ANADIG_USB2_LOOPBACK_SET
+        Offset(0x0000248),      // skip to register 0x248
+        LPBC, 32,               // ANADIG_USB2_LOOPBACK_CLR
+    }
+
+    Method (_STA)
+    {
+        Return(0xf)
+    }
+    Method (_CRS, 0x0, NotSerialized) {
+        Name (RBUF, ResourceTemplate () {
+            MEMORY32FIXED(ReadWrite, 0x02184300, 0x100, )
+            Interrupt(ResourceConsumer, Level, ActiveHigh, ExclusiveAndWake) { 72 }
+        })
+        Return(RBUF)
+    }
+
+    Method (_UBF, 0x0, NotSerialized)
+    {
+    }
+}
-- 
2.16.2.gvfs.1.33.gf5370f1



^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH edk2-platforms 3/4] Platform/SolidRun: Add Hummingboard ACPI tables
@ 2018-07-23 12:04 Mark Kettenis
  2018-07-23 22:09 ` Chris Co
  0 siblings, 1 reply; 3+ messages in thread
From: Mark Kettenis @ 2018-07-23 12:04 UTC (permalink / raw)
  To: edk2-devel

Hi Chris,

I noticed that in the DSDT for this platform, the _DSD for some
devices uses the Device Porperties UUID.  Existing uses of this UUID
on ARM platforms within the edk2 use device properties aligned with
the DeviceTree specification (https://www.devicetree.org/).  The
device properties in this patch clearly are not, even though existing
bindings for the i.MX6 hardware you're targetting exist.

I also noted that the "RegisterBasePA" property duplicates information
provided by _CRS, which is something that the Device Properties UUID
specification explicitly forbids.

Cheers,

Mark



^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH edk2-platforms 3/4] Platform/SolidRun: Add Hummingboard ACPI tables
  2018-07-23 12:04 [PATCH edk2-platforms 3/4] Platform/SolidRun: Add Hummingboard ACPI tables Mark Kettenis
@ 2018-07-23 22:09 ` Chris Co
  0 siblings, 0 replies; 3+ messages in thread
From: Chris Co @ 2018-07-23 22:09 UTC (permalink / raw)
  To: Mark Kettenis, edk2-devel@lists.01.org

Hi Mark,

> -----Original Message-----
> From: Mark Kettenis <mark.kettenis@xs4all.nl>
> Sent: Monday, July 23, 2018 5:04 AM
> To: edk2-devel@lists.01.org
> Cc: Chris Co <Christopher.Co@microsoft.com>
> Subject: Re: [edk2] [PATCH edk2-platforms 3/4] Platform/SolidRun: Add
> Hummingboard ACPI tables
> 
> Hi Chris,
> 
> I noticed that in the DSDT for this platform, the _DSD for some devices uses
> the Device Porperties UUID.  Existing uses of this UUID on ARM platforms
> within the edk2 use device properties aligned with the DeviceTree
> specification
> (https://na01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww
> .devicetree.org%2F&amp;data=02%7C01%7CChristopher.Co%40microsoft.co
> m%7C99f29cc6aea24ed8683908d5f0946b33%7C72f988bf86f141af91ab2d7cd0
> 11db47%7C1%7C0%7C636679442587755527&amp;sdata=77ZJN%2F%2B0aeoj
> so4KgyxwyvtEjlsF1uTMSCkCVPai5s0%3D&amp;reserved=0).  The device
> properties in this patch clearly are not, even though existing bindings for the
> i.MX6 hardware you're targetting exist.
> 
> I also noted that the "RegisterBasePA" property duplicates information
> provided by _CRS, which is something that the Device Properties UUID
> specification explicitly forbids.

Thank you for the feedback!
We use _DSD methods in two locations:
1. SDHC - We can remove this _DSD.  It is an artifact from initial development and is no longer needed.  I will remove it in the next version of this patch.

2. Rhproxy - This is a Windows-specific software device to expose I/O to user applications.  We have documented our required format for this _DSD here - https://docs.microsoft.com/en-us/windows/uwp/devices-sensors/enable-usermode-access  I don't expect any other operating systems to use this rhproxy device.

Thanks,
Chris

> 
> Cheers,
> 
> Mark



^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2018-07-23 22:09 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-07-23 12:04 [PATCH edk2-platforms 3/4] Platform/SolidRun: Add Hummingboard ACPI tables Mark Kettenis
2018-07-23 22:09 ` Chris Co
  -- strict thread matches above, loose matches on Subject: below --
2018-07-22  1:30 [PATCH edk2-platforms 0/4] Import Solidrun Hummingboard Edge package Chris Co
2018-07-22  1:30 ` [PATCH edk2-platforms 3/4] Platform/SolidRun: Add Hummingboard ACPI tables Chris Co

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