Hi Ard,<br /><br />Thanks for these important updates!<br /><br />On Thu, Mar 30, 2023 at 02:21 PM, Ard Biesheuvel wrote:<br />
<blockquote>Recent versions of the XCODE linker can be instructed to permit text<br />relocations, so we no longer have to work around this, which is<br />especially nice as our workaround assumes that the .text section is<br />mapped both writable and executable at the same time.<br /><br />So remove the runtime fixups and instead, just emit the absolute<br />references into the .text section.<br /><br />While at it, rename the Xcode5ExceptionHandlerAsm.nasm source file and<br />drop the Xcode5 prefix: this code is used by other toolchains too.<br /><br />Signed-off-by: Ard Biesheuvel &lt;ardb@...&gt;<br />---<br />UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf =<br />| 2 +-<br />UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf =<br />| 2 +-<br />UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf =<br />| 2 +-<br />UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/{Xcode5ExceptionHandlerAsm.n=<br />asm =3D&gt; ExceptionHandlerAsm.nasm} | 18 ++----------------<br />4 files changed, 5 insertions(+), 19 deletions(-)<br /><br />diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandl=<br />erLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandle=<br />rLib.inf<br />index d0f82095cf926e99..1b2dde746d154706 100644<br />--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.i=<br />nf<br />+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.i=<br />nf<br />@@ -28,7 +28,7 @@ [Sources.Ia32]<br />Ia32/ArchInterruptDefs.h=0D<br />=0D<br />[Sources.X64]=0D<br />- X64/Xcode5ExceptionHandlerAsm.nasm=0D<br />+ X64/ExceptionHandlerAsm.nasm=0D<br />X64/ArchExceptionHandler.c=0D<br />X64/ArchInterruptDefs.h=0D<br />=0D<br />diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandl=<br />erLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandle=<br />rLib.inf<br />index 5339f8e604045801..86248cea3e97cedb 100644<br />--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.i=<br />nf<br />+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.i=<br />nf<br />@@ -28,7 +28,7 @@ [Sources.Ia32]<br />Ia32/ArchInterruptDefs.h=0D<br />=0D<br />[Sources.X64]=0D<br />- X64/Xcode5ExceptionHandlerAsm.nasm=0D<br />+ X64/ExceptionHandlerAsm.nasm=0D<br />X64/ArchExceptionHandler.c=0D<br />X64/ArchInterruptDefs.h=0D<br />=0D<br />diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandl=<br />erLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandle=<br />rLib.inf<br />index 8f8a5dab79303f87..0eed594be8660302 100644<br />--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.i=<br />nf<br />+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.i=<br />nf<br />@@ -28,7 +28,7 @@ [Sources.Ia32]<br />Ia32/ArchInterruptDefs.h=0D<br />=0D<br />[Sources.X64]=0D<br />- X64/Xcode5ExceptionHandlerAsm.nasm=0D<br />+ X64/ExceptionHandlerAsm.nasm=0D<br />X64/ArchExceptionHandler.c=0D<br />X64/ArchInterruptDefs.h=0D<br />=0D<br />diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/Xcode5ExceptionH=<br />andlerAsm.nasm b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHan=<br />dlerAsm.nasm<br />similarity index 92%<br />rename from UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/Xcode5ExceptionHa=<br />ndlerAsm.nasm<br />rename to UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm=<br />.nasm<br />index 957478574253e619..10af4cfcdb6b1ea2 100644<br />--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/Xcode5ExceptionHandlerA=<br />sm.nasm<br />+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm<br />@@ -59,7 +59,7 @@ AsmIdtVectorBegin:<br />%rep 256=0D<br />push strict dword %[Vector] ; This instruction pushes sign-extended=<br />8-byte value on stack=0D<br />push rax=0D<br />- mov rax, strict qword 0 ; mov rax, ASM_PFX(CommonInterruptE=<br />ntry)=0D<br />+ mov rax, ASM_PFX(CommonInterruptEntry)=0D</blockquote>
<p>I'm fairly certain this can be a relative reference, as the code doesn't seem to be copied away (as opposed to&nbsp;HookAfterStubHeaderBegin). If true, this would save 256 relocs, which sounds quite nice. Would you mind verifying? Thanks!<br /><br />If you want to take things a step further, this is how we merged the SEC/PEI and DXE/SMM variants:<a href="https://github.com/acidanthera/audk/commit/9646f2c4bc0475e0635b60b7c7828999a1d40dcb">&nbsp;https://github.com/acidanthera/audk/commit/9646f2c4bc0475e0635b60b7c7828999a1d40dcb</a><br />(There is a bug visible in the changes, which was fixed only later, so take this only as a PoC).<br /><br />Best regards,<br />Marvin</p>
<blockquote>jmp rax=0D<br />%assign Vector Vector+1=0D<br />%endrep=0D<br />@@ -69,8 +69,7 @@ HookAfterStubHeaderBegin:<br />push strict dword 0 ; 0 will be fixed=0D<br />VectorNum:=0D<br />push rax=0D<br />- mov rax, strict qword 0 ; mov rax, HookAfterStubHeaderEnd=<br />=0D<br />-JmpAbsoluteAddress:=0D<br />+ mov rax, HookAfterStubHeaderEnd=0D<br />jmp rax=0D<br />HookAfterStubHeaderEnd:=0D<br />mov rax, rsp=0D<br />@@ -456,19 +455,6 @@ ASM_PFX(AsmGetTemplateAddressMap):<br />mov qword [rcx + 0x8], (AsmIdtVectorEnd - AsmIdtVectorBegin) / 25=<br />6=0D<br />lea rax, [HookAfterStubHeaderBegin]=0D<br />mov qword [rcx + 0x10], rax=0D<br />-=0D<br />-; Fix up CommonInterruptEntry address=0D<br />- lea rax, [ASM_PFX(CommonInterruptEntry)]=0D<br />- lea rcx, [AsmIdtVectorBegin]=0D<br />-%rep 256=0D<br />- mov qword [rcx + (JmpAbsoluteAddress - 8 - HookAfterStubHeaderBegin=<br />)], rax=0D<br />- add rcx, (AsmIdtVectorEnd - AsmIdtVectorBegin) / 256=0D<br />-%endrep=0D<br />-; Fix up HookAfterStubHeaderEnd=0D<br />- lea rax, [HookAfterStubHeaderEnd]=0D<br />- lea rcx, [JmpAbsoluteAddress]=0D<br />- mov qword [rcx - 8], rax=0D<br />-=0D<br />ret=0D<br />=0D<br />;-------------------------------------------------------------------------=<br />------------=0D<br />--=20<br />2.39.2</blockquote>