On Fri, Jul 3, 2020 at 11:30 AM, Andrew Fish wrote:

At the same time, the platform's PciHostBridgeLib instance reported a
root bridge with an MMIO aperture at [D4000000, FE100000), with
capabilities 1.

This is a conflict. The capabilities don't even matter (we don't even
check whether the existent GCD descriptor's capabilities are a superset
of the aperture's), because the aperture requires GCD memory type
EfiGcdMemoryTypeMemoryMappedIo, but the GCD descriptor has type
EfiGcdMemoryTypeReserved.

In brief, the failure is due to the platform reporting a PCI root bridge
aperture such that it overlaps an area that is already listed as
"reserved" in the GCD memory space map. So this is a platform bug;
either in the "PciHostBridgeLib" instance, or in the module that
populates the GCD memory space map.

Thanks Andrew and Laszlo!

The map (E0000000, F0000000) is the PCIE Base Address, maybe BlSupportPeim of UefiPayloadPkg have added this in the GCD - I'm not sure if this is correct / normal. Looks like BlSupportPeim is adding to GCD several memory regions during the initialization.

Anyway, the PCIe root bridge MMIO aperture (D4000000, FE100000) looks pretty weird, I'll double check if coreboot is configuring the root port correctly.

Thanks,
Sumo