From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [63.128.21.124]) by mx.groups.io with SMTP id smtpd.web10.577.1605296667162546596 for ; Fri, 13 Nov 2020 11:44:27 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=Tj4sCfte; spf=pass (domain: redhat.com, ip: 63.128.21.124, mailfrom: lersek@redhat.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1605296666; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ubmAH3ueiL11RCeUjjR9V7cmzZQmkRqiNGJ1I/Pl41w=; b=Tj4sCfte1Fk35Nn4f6S58rKRKIuqIvTtfaoii0XDvlZpwEw6VGyJM2pOrtmxmrCqKkYHf+ 2zPvN06IZ2AGeLWkwve4vTD1HKq07XPjvijYGA0y+mie3aO6IRqnjR9SHgcii/L6TVGyc4 Ol9eKeAG+Yrik/urVz0CAHLJ1UJYKYA= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-36-tMra-GpSOEmeviZZE2CpZQ-1; Fri, 13 Nov 2020 14:44:21 -0500 X-MC-Unique: tMra-GpSOEmeviZZE2CpZQ-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 89AEC1019627; Fri, 13 Nov 2020 19:44:19 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-112-113.ams2.redhat.com [10.36.112.113]) by smtp.corp.redhat.com (Postfix) with ESMTP id C536860C15; Fri, 13 Nov 2020 19:44:17 +0000 (UTC) Subject: Re: [PATCH v2 0/4] Add extra pci roots support for Arm To: Ard Biesheuvel , Jiahui Cen , devel@edk2.groups.io Cc: jordan.l.justen@intel.com, leif@nuviainc.com, xieyingtai@huawei.com, miaoyubo@huawei.com References: <20201109130511.5946-1-cenjiahui@huawei.com> From: "Laszlo Ersek" Message-ID: <286c4d14-82f4-6238-2fb1-15e6072fad07@redhat.com> Date: Fri, 13 Nov 2020 20:44:16 +0100 MIME-Version: 1.0 In-Reply-To: X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=lersek@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit On 11/12/20 09:49, Ard Biesheuvel wrote: > On 11/9/20 2:05 PM, Jiahui Cen wrote: >> Changes with v1 >> v1->v2: >> Separated into four patches. >> Factor the same logic parts into a new library. >> >> v1: https://edk2.groups.io/g/devel/topic/72723351#56901 >> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059 >> QEMU: >> https://lore.kernel.org/qemu-devel/20201103120157.2286-1-cenjiahui@huawei.com/ >> >> >> This patch series adds support for extra pci roots for ARM. >> > > Why? I don't know Jiahui Cen's particular reasons; on x86, pxb-pcie is useful for associating PCIe hierarchies with particular NUMA nodes. See "docs/pci_expander_bridge.txt" in the QEMU tree. Also, in Jiahui Cen's QEMU blurb linked above, the following is included: > Currently pxb-pcie is not supported by arm, > the reason for it is pxb-pcie is not described in DSDT table > and only one main host bridge is described in acpi tables, > which means it is not impossible to present different io numas > for different devices. So I guess this work aims to extend the same PCI(e)<->NUMA association feature, from x86 to ARM. Thanks, Laszlo