From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from loongson.cn (loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web12.3228.1663987582220500891 for ; Fri, 23 Sep 2022 19:46:23 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: loongson.cn, ip: 114.242.206.163, mailfrom: lichao@loongson.cn) Received: from lichao-PC (unknown [10.40.24.149]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Bxnmt5by5jbgkhAA--.44391S2; Sat, 24 Sep 2022 10:46:17 +0800 (CST) Date: Sat, 24 Sep 2022 10:46:17 +0800 From: "Chao Li" To: =?utf-8?Q?=22Kinney=2C_Michael_D=22?= Cc: "=?utf-8?Q?=22=5C=22devel=40edk2.groups.io=5C=22=22?=" , =?utf-8?Q?=22Gao=2C_Liming=22?= , =?utf-8?Q?=22Liu=2C_Zhiguang=22?= Message-ID: <2FEFCC0C-E036-4A96-88F3-7A6236E9606F@getmailspring.com> In-Reply-To: References: Subject: Re: [edk2-devel] [PATCH v2 22/34] MdePkg/Include: LoongArch definitions. X-Mailer: Mailspring MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Bxnmt5by5jbgkhAA--.44391S2 X-Coremail-Antispam: 1UD129KBjvAXoWfGrW5GF48Aw1rJFy3Jw47Jwb_yoW8GF1rto W7Gana9347Aw4YkrWDWw47Wayjkryvkw45Jr4SgFWkGa1xt3Z8K3y8Jw4xZr1rtry0qws8 GFyqqas5ZFW8Jwn5n29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3 AaLaJ3UjIYCTnIWjp_UUUY_7k0a2IF6w4kM7kC6x804xWl14x267AKxVWUJVW8JwAFc2x0 x2IEx4CE42xK8VAvwI8IcIk0rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj4 1l84x0c7CEw4AK67xGY2AK021l84ACjcxK6xIIjxv20xvE14v26r1j6r1xM28EF7xvwVC0 I7IYx2IY6xkF7I0E14v26r1j6r4UM28EF7xvwVC2z280aVAFwI0_Cr0_Gr1UM28EF7xvwV C2z280aVCY1x0267AKxVW8Jr0_Cr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVAY j202j2C_Jr0_Gr1l5I8CrVACY4xI64kE6c02F40Ex7xfMc02F40Ew4AK048IF2xKxVW8JV W5JwAv7VC0I7IYx2IY67AKxVWUJVWUGwAv7VC2z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCj c4AY6r1j6r4UM4x0Y48IcxkI7VAKI48JMx8GjcxK6IxK0xIIj40E5I8CrwCY02Avz4vE-s yl42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWU GVWUWwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7V AKI48JMIIF0xvE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r1j 6r4UMIIF0xvE42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42 IY6I8E87Iv6xkF7I0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjxUgAsgDUUUU X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQASCGMtod0D2QAjsQ Content-Type: multipart/alternative; boundary="632e6f79_78ffb058_19a0" --632e6f79_78ffb058_19a0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline Mike, Do you mean patches 0001 and 0002=3F If yes, I have tried removing both t= he two patches, but the Azure CI always produces the ECC errors, I have n= o idea how to fix them, so modify the CI YAM file to fix them, and Liming= also recommends this way. Thanks, Chao -------- On 9=E6=9C=88 24 2022, at 10:33 =E4=B8=8A=E5=8D=88, =22Kinney, Michael D=22= wrote: > > If it is in spec, then the comment about =E2=80=9Ccoding convenience=E2= =80=9D is not required. > > > Mike > > =46rom: chao li > Sent: =46riday, September 23, 2022 7:17 PM > To: Kinney, Michael D > Cc: =22devel=40edk2.groups.io=22 ; Gao, Liming = ; Liu, Zhiguang > Subject: Re: =5Bedk2-devel=5D =5BPATCH v2 22/34=5D MdePkg/Include: Loon= gArch definitions. > > > > > > Hi Mkie, > I responded to your comment below. > > > > > Thanks, > Chao > -------- > > > On 9=E6=9C=88 23 2022, at 11:46 =E6=99=9A=E4=B8=8A, =22Kinney, Michael = D=22 = wrote: > > > One comment below. > > > > > > > > Mike > > > > > > > -----Original Message----- > > > =46rom: devel=40edk2.groups.io (mailto:devel=40edk2.groups.io) On Behalf Of Chao Li= > > > > > Sent: Wednesday, September 14, 2022 2:41 AM > > > > > To: devel=40edk2.groups.io (mailto:devel=40edk2.groups.io) > > > > > Cc: Kinney, Michael D ; Gao, Liming ; Liu, Zhiguang > > > > > Subject: =5Bedk2-devel=5D =5BPATCH v2 22/34=5D MdePkg/Include: Loon= gArch definitions. > > > > > > > > > > RE=46: https://bugzilla.tianocore.org/show=5Fbug.cgi=3Fid=3D4053 > > > > > > > > > > Add LoongArch processor related definitions. > > > > > > > > > > =46or the Http boot and PXE boot types seeing this URL section =22P= rocessor > > > > > Architecture Type=22 for the LOONGARCH values: > > > > > https://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameter= s.xhtml > > > > > > > > > > =46or definitions of PE/CO=46=46 and LOONGARCH relocation types, se= e the > > > > > =22Machine Types=22 and =22Basic Relocation Types=22 sections of th= is URL for > > > > > LOONGARCH values: > > > > > https://docs.microsoft.com/en-us/windows/win32/debug/pe-format > > > > > > > > > > =46or the register definitions of exceptions context, see the UE=46= I V2.10 > > > > > 18.2.2, 18.2.4 and 18.2.5 sections of this URL for LOONGARCH > > > > > definitions: > > > > > https://uefi.org/specs/UE=46I/2.10/18=5FProtocols=5FDebugger=5FSupp= ort.html > > > > > > > > > > Cc: Michael D Kinney > > > > > Cc: Liming Gao > > > > > Cc: Zhiguang Liu > > > > > > > > > > Signed-off-by: Chao Li > > > > > --- > > > > > MdePkg/Include/IndustryStandard/PeImage.h =7C 9 ++ > > > > > MdePkg/Include/Protocol/DebugSupport.h =7C 107 ++++++++++++++++++++= -- > > > > > MdePkg/Include/Protocol/PxeBaseCode.h =7C 3 + > > > > > MdePkg/Include/Uefi/UefiBaseType.h =7C 14 +++ > > > > > MdePkg/Include/Uefi/UefiSpec.h =7C 16 ++-- > > > > > 5 files changed, 136 insertions(+), 13 deletions(-) > > > > > > > > > > diff --git a/MdePkg/Include/IndustryStandard/PeImage.h b/MdePkg/Inc= lude/IndustryStandard/PeImage.h > > > > > index 3109dc20f8..dd4cc25483 100644 > > > > > --- a/MdePkg/Include/IndustryStandard/PeImage.h > > > > > +++ b/MdePkg/Include/IndustryStandard/PeImage.h > > > > > =40=40 -10,6 +10,7 =40=40 > > > > > Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<= BR> > > > > > > > > > > Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.=
> > > > > > > > > > Portions Copyright (c) 2016 - 2020, Hewlett Packard Enterprise Deve= lopment LP. All rights reserved.
> > > > > > > > > > +Portions Copyright (c) 2022, Loongson Technology Corporation Limit= ed. All rights reserved.
> > > > > > > > > > > > > > > > > > > > SPDX-License-Identifier: BSD-2-Clause-Patent > > > > > > > > > > > > > > > > > > > > =40=40 -38,6 +39,8 =40=40 SPDX-License-Identifier: BSD-2-Clause-Pat= ent > > > > > =23define IMAGE=5F=46ILE=5FMACHINE=5FRISCV32 0x5032 > > > > > > > > > > =23define IMAGE=5F=46ILE=5FMACHINE=5FRISCV64 0x5064 > > > > > > > > > > =23define IMAGE=5F=46ILE=5FMACHINE=5FRISCV128 0x5128 > > > > > > > > > > +=23define IMAGE=5F=46ILE=5FMACHINE=5FLOONGARCH32 0x6232 > > > > > > > > > > +=23define IMAGE=5F=46ILE=5FMACHINE=5FLOONGARCH64 0x6264 > > > > > > > > > > > > > > > > > > > > // > > > > > > > > > > // EXE file formats > > > > > > > > > > =40=40 -503,6 +506,12 =40=40 typedef struct =7B > > > > > =23define E=46I=5FIMAGE=5FREL=5FBASED=5FRISCV=5FLOW12I 7 > > > > > > > > > > =23define E=46I=5FIMAGE=5FREL=5FBASED=5FRISCV=5FLOW12S 8 > > > > > > > > > > > > > > > > > > > > +// > > > > > > > > > > +// Relocation types of LoongArch processor. > > > > > > > > > > +// > > > > > > > > > > +=23define E=46I=5FIMAGE=5FREL=5FBASED=5FLOONGARCH32=5FMARK=5FLA 8 > > > > > > > > > > +=23define E=46I=5FIMAGE=5FREL=5FBASED=5FLOONGARCH64=5FMARK=5FLA 8 > > > > > > > > > > + > > > > > > > > > > /// > > > > > > > > > > /// Line number format. > > > > > > > > > > /// > > > > > > > > > > diff --git a/MdePkg/Include/Protocol/DebugSupport.h b/MdePkg/Includ= e/Protocol/DebugSupport.h > > > > > index ec5b92a5c5..2b0ae2d157 100644 > > > > > --- a/MdePkg/Include/Protocol/DebugSupport.h > > > > > +++ b/MdePkg/Include/Protocol/DebugSupport.h > > > > > =40=40 -654,17 +654,110 =40=40 typedef struct =7B > > > > > UINT64 X31; > > > > > > > > > > =7D E=46I=5FSYSTEM=5FCONTEXT=5FRISCV64; > > > > > > > > > > > > > > > > > > > > +// > > > > > > > > > > +// LoongArch processor exception types. > > > > > > > > > > +// > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FINT 0 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FPIL 1 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FPIS 2 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FPI=46 3 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FPME 4 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FPNR 5 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FPNX 6 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FPPI 7 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FADE 8 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FALE 9 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FBCE 10 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FSYS 11 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FBRK 12 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FINE 13 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FIPE 14 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5F=46PD 15 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FSXD 16 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FASXD 17 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5F=46PE 18 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FTBR 64 // =46or code only, there is= no such type in the ISA spec, the TLB refill is defined for an > > > > > independent exception. > > > > > > > > > > + > > > > > > > > > > +// > > > > > > > > > > +// LoongArch processor Interrupt types. > > > > > > > > > > +// > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FSIP0 0 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FSIP1 1 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP0 2 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP1 3 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP2 4 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP3 5 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP4 6 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP5 7 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP6 8 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP7 9 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FPMC 10 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FTIMER 11 > > > > > > > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FIPI 12 > > > > > > > > > > + > > > > > > > > > > +// > > > > > > > > > > +// =46or coding convenience, define the maximum valid > > > > > > > > > > +// LoongArch interrupt. > > > > > > > > > > +// > > > > > > > > > > +=23define MAX=5FLOONGARCH=5FINTERRUPT 14 > > > > > > > > Should this define be moved into the libs/modules that uses > > this define=3F Prefer to only see definitions from specs in > > > > this file. > > > > > > Chao Li: Yes, this macro is defined in the UE=46I Spec V2.10 section 18= .2.5. > > If you insist on your opinion, I can remove it in this file. So what's = your opinion now=3F > > > > > > > + > > > > > > +typedef struct =7B > > > > > > + UINT64 R0; > > > > > > + UINT64 R1; > > > > > > + UINT64 R2; > > > > > > + UINT64 R3; > > > > > > + UINT64 R4; > > > > > > + UINT64 R5; > > > > > > + UINT64 R6; > > > > > > + UINT64 R7; > > > > > > + UINT64 R8; > > > > > > + UINT64 R9; > > > > > > + UINT64 R10; > > > > > > + UINT64 R11; > > > > > > + UINT64 R12; > > > > > > + UINT64 R13; > > > > > > + UINT64 R14; > > > > > > + UINT64 R15; > > > > > > + UINT64 R16; > > > > > > + UINT64 R17; > > > > > > + UINT64 R18; > > > > > > + UINT64 R19; > > > > > > + UINT64 R20; > > > > > > + UINT64 R21; > > > > > > + UINT64 R22; > > > > > > + UINT64 R23; > > > > > > + UINT64 R24; > > > > > > + UINT64 R25; > > > > > > + UINT64 R26; > > > > > > + UINT64 R27; > > > > > > + UINT64 R28; > > > > > > + UINT64 R29; > > > > > > + UINT64 R30; > > > > > > + UINT64 R31; > > > > > > + > > > > > > + UINT64 CRMD; // CuRrent MoDe information > > > > > > + UINT64 PRMD; // PRe-exception MoDe information > > > > > > + UINT64 EUEN; // Extended component Unit ENable > > > > > > + UINT64 MISC; // MISCellaneous controller > > > > > > + UINT64 EC=46G; // Exception Con=46iGuration > > > > > > + UINT64 ESTAT; // Exception STATus > > > > > > + UINT64 ERA; // Exception Return Address > > > > > > + UINT64 BADV; // BAD Virtual address > > > > > > + UINT64 BADI; // BAD Instruction > > > > > > +=7D E=46I=5FSYSTEM=5FCONTEXT=5FLOONGARCH64; > > > > > > + > > > > > > /// > > > > > > /// Universal E=46I=5FSYSTEM=5FCONTEXT definition. > > > > > > /// > > > > > > typedef union =7B > > > > > > - E=46I=5FSYSTEM=5FCONTEXT=5FEBC *SystemContextEbc; > > > > > > - E=46I=5FSYSTEM=5FCONTEXT=5FIA32 *SystemContextIa32; > > > > > > - E=46I=5FSYSTEM=5FCONTEXT=5FX64 *SystemContextX64; > > > > > > - E=46I=5FSYSTEM=5FCONTEXT=5FIP=46 *SystemContextIpf; > > > > > > - E=46I=5FSYSTEM=5FCONTEXT=5FARM *SystemContextArm; > > > > > > - E=46I=5FSYSTEM=5FCONTEXT=5FAARCH64 *SystemContextAArch64; > > > > > > - E=46I=5FSYSTEM=5FCONTEXT=5FRISCV64 *SystemContextRiscV64; > > > > > > + E=46I=5FSYSTEM=5FCONTEXT=5FEBC *SystemContextEbc; > > > > > > + E=46I=5FSYSTEM=5FCONTEXT=5FIA32 *SystemContextIa32; > > > > > > + E=46I=5FSYSTEM=5FCONTEXT=5FX64 *SystemContextX64; > > > > > > + E=46I=5FSYSTEM=5FCONTEXT=5FIP=46 *SystemContextIpf; > > > > > > + E=46I=5FSYSTEM=5FCONTEXT=5FARM *SystemContextArm; > > > > > > + E=46I=5FSYSTEM=5FCONTEXT=5FAARCH64 *SystemContextAArch64; > > > > > > + E=46I=5FSYSTEM=5FCONTEXT=5FRISCV64 *SystemContextRiscV64; > > > > > > + E=46I=5FSYSTEM=5FCONTEXT=5FLOONGARCH64 *SystemContextLoongArch64; > > > > > > =7D E=46I=5FSYSTEM=5FCONTEXT; > > > > > > > > > > > > // > > > > > > diff --git a/MdePkg/Include/Protocol/PxeBaseCode.h b/MdePkg/Include/P= rotocol/PxeBaseCode.h > > > index 11872d602d..6787941a5d 100644 > > > --- a/MdePkg/Include/Protocol/PxeBaseCode.h > > > +++ b/MdePkg/Include/Protocol/PxeBaseCode.h > > > =40=40 -4,6 +4,7 =40=40 > > > > > > > > > Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved. > > > > > > Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All ri= ghts reserved.
> > > > > > +Copyright (c) 2022, Loongson Technology Corporation Limited. All rig= hts reserved.
> > > > > > > > > > > > SPDX-License-Identifier: BSD-2-Clause-Patent > > > > > > > > > > > > =40=40 -158,6 +159,8 =40=40 typedef UINT16 E=46I=5FPXE=5FBASE=5FCODE=5F= UDP=5FPORT; > > > =23define E=46I=5FPXE=5FCLIENT=5FSYSTEM=5FARCHITECTURE 0x000B > > > > > > =23elif defined (MDE=5FCPU=5FRISCV64) > > > > > > =23define E=46I=5FPXE=5FCLIENT=5FSYSTEM=5FARCHITECTURE 0x001B > > > > > > +=23elif defined (MDE=5FCPU=5FLOONGARCH64) > > > > > > +=23define E=46I=5FPXE=5FCLIENT=5FSYSTEM=5FARCHITECTURE 0x0027 > > > > > > =23endif > > > > > > > > > > > > /// > > > > > > diff --git a/MdePkg/Include/Uefi/UefiBaseType.h b/MdePkg/Include/Uefi= /UefiBaseType.h > > > index 4a34ce8e25..83975a08eb 100644 > > > --- a/MdePkg/Include/Uefi/UefiBaseType.h > > > +++ b/MdePkg/Include/Uefi/UefiBaseType.h > > > =40=40 -4,6 +4,7 =40=40 > > > Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved. > > > > > > Portions copyright (c) 2011 - 2016, ARM Ltd. All rights reserved.
= > > > > > > Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All ri= ghts reserved.
> > > > > > +Copyright (c) 2022, Loongson Technology Corporation Limited. All rig= hts reserved.
> > > > > > > > > > > > SPDX-License-Identifier: BSD-2-Clause-Patent > > > > > > > > > > > > =40=40 -246,6 +247,12 =40=40 typedef union =7B > > > =23define E=46I=5FIMAGE=5FMACHINE=5FRISCV64 0x5064 > > > > > > =23define E=46I=5FIMAGE=5FMACHINE=5FRISCV128 0x5128 > > > > > > > > > > > > +/// > > > > > > +/// PE32+ Machine type for LoongArch 32/64 images. > > > > > > +/// > > > > > > +=23define E=46I=5FIMAGE=5FMACHINE=5FLOONGARCH32 0x6232 > > > > > > +=23define E=46I=5FIMAGE=5FMACHINE=5FLOONGARCH64 0x6264 > > > > > > + > > > > > > =23if =21defined (E=46I=5FIMAGE=5FMACHINE=5FTYPE=5FVALUE) && =21defin= ed (E=46I=5FIMAGE=5FMACHINE=5FCROSS=5FTYPE=5FVALUE) > > > > > > =23if defined (MDE=5FCPU=5FIA32) > > > > > > > > > > > > =40=40 -278,6 +285,13 =40=40 typedef union =7B > > > =23define E=46I=5FIMAGE=5FMACHINE=5FTYPE=5FSUPPORTED(Machine) =5C > > > > > > ((Machine) =3D=3D E=46I=5FIMAGE=5FMACHINE=5FRISCV64) > > > > > > > > > > > > +=23define E=46I=5FIMAGE=5FMACHINE=5FCROSS=5FTYPE=5FSUPPORTED(Machine= ) (=46ALSE) > > > > > > + > > > > > > + =23elif defined (MDE=5FCPU=5FLOONGARCH64) > > > > > > + > > > > > > +=23define E=46I=5FIMAGE=5FMACHINE=5FTYPE=5FSUPPORTED(Machine) =5C > > > > > > + ((Machine) =3D=3D E=46I=5FIMAGE=5FMACHINE=5FLOONGARCH64) > > > > > > + > > > > > > =23define E=46I=5FIMAGE=5FMACHINE=5FCROSS=5FTYPE=5FSUPPORTED(Machine)= (=46ALSE) > > > > > > > > > > > > =23elif defined (MDE=5FCPU=5FEBC) > > > > > > diff --git a/MdePkg/Include/Uefi/UefiSpec.h b/MdePkg/Include/Uefi/Uef= iSpec.h > > > index 2b38b100f6..3abebbb8d9 100644 > > > --- a/MdePkg/Include/Uefi/UefiSpec.h > > > +++ b/MdePkg/Include/Uefi/UefiSpec.h > > > =40=40 -7,6 +7,7 =40=40 > > > > > > > > > Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved. > > > > > > Portions Copyright (c) 2020, Hewlett Packard Enterprise Development L= P. All rights reserved.
> > > > > > +Copyright (c) 2022, Loongson Technology Corporation Limited. All rig= hts reserved.
> > > > > > > > > > > > SPDX-License-Identifier: BSD-2-Clause-Patent > > > > > > > > > > > > =40=40 -2195,12 +2196,13 =40=40 typedef struct =7B > > > // > > > > > > // E=46I =46ile location to boot from on removable media devices > > > > > > // > > > > > > -=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FIA32 L=22=5C=5C= E=46I=5C=5CBOOT=5C=5CBOOTIA32.E=46I=22 > > > > > > -=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FIA64 L=22=5C=5C= E=46I=5C=5CBOOT=5C=5CBOOTIA64.E=46I=22 > > > > > > -=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FX64 L=22=5C=5C= E=46I=5C=5CBOOT=5C=5CBOOTX64.E=46I=22 > > > > > > -=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FARM L=22=5C=5C= E=46I=5C=5CBOOT=5C=5CBOOTARM.E=46I=22 > > > > > > -=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FAARCH64 L=22=5C= =5CE=46I=5C=5CBOOT=5C=5CBOOTAA64.E=46I=22 > > > > > > -=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FRISCV64 L=22=5C= =5CE=46I=5C=5CBOOT=5C=5CBOOTRISCV64.E=46I=22 > > > > > > +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FIA32 L=22=5C=5C= E=46I=5C=5CBOOT=5C=5CBOOTIA32.E=46I=22 > > > > > > +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FIA64 L=22=5C=5C= E=46I=5C=5CBOOT=5C=5CBOOTIA64.E=46I=22 > > > > > > +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FX64 L=22=5C=5C= E=46I=5C=5CBOOT=5C=5CBOOTX64.E=46I=22 > > > > > > +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FARM L=22=5C=5C= E=46I=5C=5CBOOT=5C=5CBOOTARM.E=46I=22 > > > > > > +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FAARCH64 L=22=5C= =5CE=46I=5C=5CBOOT=5C=5CBOOTAA64.E=46I=22 > > > > > > +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FRISCV64 L=22=5C= =5CE=46I=5C=5CBOOT=5C=5CBOOTRISCV64.E=46I=22 > > > > > > +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FLOONGARCH64 L=22= =5C=5CE=46I=5C=5CBOOT=5C=5CBOOTLOONGARCH64.E=46I=22 > > > > > > > > > > > > =23if =21defined (E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME) > > > > > > =23if defined (MDE=5FCPU=5FIA32) > > > > > > =40=40 -2214,6 +2216,8 =40=40 typedef struct =7B > > > =23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME E=46I=5FREMOVABLE= =5FMEDIA=5F=46ILE=5FNAME=5FAARCH64 > > > > > > =23elif defined (MDE=5FCPU=5FRISCV64) > > > > > > =23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME E=46I=5FREMOVABLE= =5FMEDIA=5F=46ILE=5FNAME=5FRISCV64 > > > > > > + =23elif defined (MDE=5FCPU=5FLOONGARCH64) > > > > > > +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME E=46I=5FREMOVABL= E=5FMEDIA=5F=46ILE=5FNAME=5FLOONGARCH64 > > > > > > =23else > > > > > > =23error Unknown Processor Type > > > > > > =23endif > > > > > > -- > > > 2.27.0 > > > > > > > > > > > > -=3D-=3D-=3D-=3D-=3D-=3D > > > Groups.io Links: You receive all messages sent to this group. > > > View/Reply Online (=2393766): https://edk2.groups.io/g/devel/message/= 93766 > > > Mute This Topic: https://groups.io/mt/93674237/1643496 > > > Group Owner: devel+owner=40edk2.groups.io (mailto:devel+owner=40edk2.= groups.io) > > > Unsubscribe: https://edk2.groups.io/g/devel/unsub =5Bmichael.d.kinney= =40intel.com=5D > > > -=3D-=3D-=3D-=3D-=3D-=3D > > > > > > > --632e6f79_78ffb058_19a0 Content-Type: text/html; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline
Mike,
Do you mean patches 0001 and 0002=3F If yes, I have = tried removing both the two patches, but the Azure CI always produces the= ECC errors, I have no idea how to fix them, so modify the CI YAM file to= fix them, and Liming also recommends this way.


Thanks,
Chao
--------

On 9=E6=9C=88 24 2022, at 10:33 =E4=B8=8A= =E5=8D=88, =22Kinney, Michael D=22 <michael.d.kinney=40intel.com> w= rote:
    
If it is in spec, then the c= omment about =E2=80=9Ccoding convenience=E2=80=9D is not required.
<= br>
 

Mike

 

=
=46rom: chao= li <lichao=40loongson.cn>
Sent: =46= riday, September 23, 2022 7:17 PM
To: Kin= ney, Michael D <michael.d.kinney=40intel.com>
Cc:=  =22devel=40edk2.groups.io=22 <devel=40edk2.groups.io>= ;; Gao, Liming <gaoliming=40byosoft.com.cn>; Liu, Zhiguang <zhig= uang.liu=40intel.com>
Subject: Re: =5B= edk2-devel=5D =5BPATCH v2 22/34=5D MdePkg/Include: LoongArch definitions.=
 

Hi Mkie,
I responded to your comment below.
 


Thanks,
Chao<= /font>
--------
On 9=E6=9C=88 23 2022, at 11:46 =E6=99=9A=E4=B8=8A, =22Kinney, Michael D=22= <michael.d.kinney=40intel.com> wr= ote:
One co= mment below.
 

Mike
 

> -----Original Mes= sage-----
> =46rom: devel=40edk2.groups.io <devel=40= edk2.groups.io> On Behalf Of Chao Li
> Sent: Wednesday, September 14, 2022 2:41 AM
> Cc: Kin= ney, Michael D <michael.d.kinney=40intel.= com>; Gao, Liming <gaoliming=40byosoft= .com.cn>; Liu, Zhiguang <zhiguang.liu=40in= tel.com>
> Subject= : =5Bedk2-devel=5D =5BPATCH v2 22/34=5D MdePkg/Include: LoongArch definit= ions.
> 
=
> 
> Add L= oongArch processor related definitions.
> 
> = =46or the Http boot and PXE boot types seeing this URL section =22Process= or
> Architecture Type=22= for the LOONGARCH values:
> 
&= gt; =46or definitions of PE/CO=46=46 and LOONGARCH relocation types, see = the
> =22Machine Types=22= and =22Basic Relocation Types=22 sections of this URL for
> LOONGARCH values:
> 
> =46or= the register definitions of exceptions context, see the UE=46I V2.10
> 18.2.2, 18.2.4 and 18.2.5 = sections of this URL for LOONGARCH
> definitions:
> 
&= gt; Cc: Michael D Kinney <michael.d.kinne= y=40intel.com>
> C= c: Liming Gao <gaoliming=40byosoft.com.cn= >
> Cc: Zhiguang Liu &= lt;zhiguang.liu=40intel.com>
=
> 
> Signed-off-by: Chao Li <lichao=40loongso= n.cn>
> ---
<= /div>
> MdePkg/Include/IndustryStanda= rd/PeImage.h =7C 9 ++
> M= dePkg/Include/Protocol/DebugSupport.h =7C 107 ++++++++++++++++++++--
> MdePkg/Include/Protocol/Pxe= BaseCode.h =7C 3 +
> MdeP= kg/Include/Uefi/UefiBaseType.h =7C 14 +++
> MdePkg/Include/Uefi/UefiSpec.h =7C 16 ++--
<= div>
> 5 files changed, 136 insertions(+),= 13 deletions(-)
> <= /div>
> diff --git a/MdePkg/Inc= lude/IndustryStandard/PeImage.h b/MdePkg/Include/IndustryStandard/PeImage= .h
> index 3109dc20f8..dd= 4cc25483 100644
> --- a/M= dePkg/Include/IndustryStandard/PeImage.h
> +++ b/MdePkg/Include/IndustryStandard/PeImage.h
> =40=40 -10,6 +10,7 =40=40
> Copyright (c) 2006 - 2018, = Intel Corporation. All rights reserved.<BR>
> 
> Portions copyright (c) 2008 - 2009, Apple Inc. All rights reser= ved.<BR>
> 
> Portions Copyright (c) 20= 16 - 2020, Hewlett Packard Enterprise Development LP. All rights reserved= .<BR>
> 
=
> +Portions Copyright (c) 2022= , Loongson Technology Corporation Limited. All rights reserved.<BR>=
> 
=
> 
> 
> = SPDX-License-Identifier: BSD-2-Clause-Patent
> 
&= gt; 
> 
> =40=40 -38,6 +39,8 =40=40 SPDX= -License-Identifier: BSD-2-Clause-Patent
> =23define IMAGE=5F=46ILE=5FMACHINE=5FRISCV32 0x5032
> 
> =23define IMAGE=5F=46ILE=5FMACHINE=5FRISCV6= 4 0x5064
> 
> =23define IMAGE=5F=46ILE=5FMACH= INE=5FRISCV128 0x5128
>&n= bsp;
> +=23define IMAGE=5F= =46ILE=5FMACHINE=5FLOONGARCH32 0x6232
> 
> +=23= define IMAGE=5F=46ILE=5FMACHINE=5FLOONGARCH64 0x6264
> 
> 
> = ;
> //
> 
> // EXE file formats
> 
> =40=40= -503,6 +506,12 =40=40 typedef struct =7B
> =23define E=46I=5FIMAGE=5FREL=5FBASED=5FRISCV=5FLOW12I = 7
> 
> =23define E=46I=5FIMAGE=5FREL=5FBASED=5F= RISCV=5FLOW12S 8
> <= /div>
> 
<= div class=3D=22MsoNormal=22>> 
> +//
>&nbs= p;
> +// Relocation types= of LoongArch processor.
>= ; 
> +//
=
> 
> +=23define E=46I=5FIMAGE=5FREL=5FBASED=5FLOONGARCH32= =5FMARK=5FLA 8
> 
> +=23define E=46I=5FIMAGE=5F= REL=5FBASED=5FLOONGARCH64=5FMARK=5FLA 8
> 
> = +
> 
> ///
> 
> /= // Line number format.
>&= nbsp;
> ///
> 
> diff --git a/MdePkg/Include/Protocol/DebugSupport.h b/M= dePkg/Include/Protocol/DebugSupport.h
> index ec5b92a5c5..2b0ae2d157 100644
> --- a/MdePkg/Include/Protocol/DebugSupport.h<= /div>
> +++ b/MdePkg/Include/Pr= otocol/DebugSupport.h
> =40= =40 -654,17 +654,110 =40=40 typedef struct =7B
> UINT64 X31;
> 
> =7D = E=46I=5FSYSTEM=5FCONTEXT=5FRISCV64;
> 
> = ;
> 
> +//
> 
> += // LoongArch processor exception types.
> 
> = +//
> 
> +=23define EXCEPT=5FLOONGARCH=5FINT = 0
> 
> +=23define EXCEPT=5FLOONGARCH=5FPIL 1<= /div>
> 
<= div class=3D=22MsoNormal=22>> +=23define EXCEPT=5FLOONGARCH=5FPIS 2
> 
> +=23define EXCEPT=5FLOONGARCH=5FPI=46 3
> 
> +=23define EXCEPT=5FLOONGARCH=5FPME 4
> 
> +=23define EXCEPT=5FLOONGARCH=5FPNR 5
<= /div>
> 
> +=23define EXCEPT=5FLOONGARCH=5FPNX 6
> 
> +=23define EXCEPT=5FLOONGARCH=5FPPI 7
> 
> +=23define EXCEPT=5FLOONGARCH=5FADE 8
> 
> +=23define EXCEPT=5FLOONGARCH=5FALE 9
<= div class=3D=22MsoNormal=22>> 
> +=23define EXCEPT=5FLOONGARCH=5FBCE 10
> 
> +=23define EXCEPT=5FLOONGARCH=5FSYS 11
> 
> +=23define EXCEPT=5FLOONGARCH=5FBRK 12
> 
> +=23define EXCEPT=5FLOONGARCH=5FINE 13
> 
> +=23define EXCEPT=5FLOONGARCH=5FIPE 14
> 
> +=23define EXCEPT=5FLOONGARCH=5F=46PD 15
> 
> +=23define EXCEPT=5FLOONGARCH=5FSXD 16
> 
> +=23define EXCEPT=5FLOONGARCH=5FASXD 17
> 
> +=23define EXCEPT=5FLOONGARCH=5F=46PE 18
> 
> +=23define EXCEPT=5FLOONGARCH=5FTBR 64 // =46or code only, th= ere is no such type in the ISA spec, the TLB refill is defined for an
> independent exception.
> 
> +
> 
> +//
> 
> +// LoongArch processor Interrupt types.
> 
> +//
> 
> +=23de= fine EXCEPT=5FLOONGARCH=5FINT=5FSIP0 0
> 
> += =23define EXCEPT=5FLOONGARCH=5FINT=5FSIP1 1
> 
&= gt; +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP0 2
> 
> +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP1 3
> 
> +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP2 4
> 
> +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP3 5
> 
> +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP4 6
=
> 
> +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP5 7
> 
> +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP6 8
> 
> +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP7 9<= /div>
> 
<= div class=3D=22MsoNormal=22>> +=23define EXCEPT=5FLOONGARCH=5FINT=5FPM= C 10
> 
<= div>
> +=23define EXCEPT=5FLOONGARCH=5FINT= =5FTIMER 11
> 
=
> +=23define EXCEPT=5FLOONGARC= H=5FINT=5FIPI 12
> <= /div>
> +
> 
> +//
> 
> +// =46or coding conveni= ence, define the maximum valid
> 
> +// LoongAr= ch interrupt.
> 
> +//
> 
> +=23define MAX=5FLOONGARCH=5FINTERRUPT 14
 

Sho= uld this define be moved into the libs/modules that uses
=
this define=3F Prefer to only see definition= s from specs in
this file.
<= font style=3D=22font-family:Calibri, sans-serif=22>Chao Li: Yes, thi= s macro is defined in the UE=46I Spec V2.10 section 18.2.5.
If you insist on your opinion, I can remove it= in this file. So what's your opinion now=3F
 

> 
> +
> 
> +typedef struct =7B
> 
&= gt; + UINT64 R0;
> <= /div>
> + UINT64 R1;
> 
> + UINT64 R2;
> 
> + UINT= 64 R3;
> 
> + UINT64 R4;
> 
> + UINT64 R5;
&g= t; 
> + UINT64 R6;
> 
> + UINT64 R7;
> 
&= gt; + UINT64 R8;
> <= /div>
> + UINT64 R9;
> 
> + UINT64 R10;
> 
> + UIN= T64 R11;
> 
> + UINT64 R12;
<= div class=3D=22MsoNormal=22>> 
> + UINT64 R13;
> 
> + UINT64 R1= 4;
> 
> + UINT64 R15;
> 
> + UINT64 R16;
>=  
> + UINT64 R17;
> 
> + UINT64 R18;
> 
&= gt; + UINT64 R19;
> =
> + UINT64 R20;
> 
> + UINT64 R21;
> 
> += UINT64 R22;
> 
> + UINT64 R23;
> 
> + UINT64 R24;
> 
> + UINT64= R25;
> 
=
> + UINT64 R26;
> 
> + UINT64 R27;
&= gt; 
> + UINT64 R28;=
> 
=
> + UINT64 R29;
> 
> + UINT64 R30;
>&nbs= p;
> + UINT64 R31;
<= /div>
> 
> +
> 
> + UINT64 CR= MD; // CuRrent MoDe information
> 
> + UINT64= PRMD; // PRe-exception MoDe information
> 
>= + UINT64 EUEN; // Extended component Unit ENable
> 
> + UINT64 MISC; // MISCellaneous controller
> 
> + UINT64 EC=46G; // Exception Con=46iGuration
> 
> + UINT64 ESTAT; // Exception STATus
> 
> + UINT64 ERA; // Exception Return Address
<= div class=3D=22MsoNormal=22>> 
> + UINT64 BADV; // BAD Virtual address
> 
> + UINT64 BADI; // BAD Instruction
> 
> +=7D E=46I=5FSYSTEM=5FCONTEXT=5FLOONGARCH64;
> 
> +
> 
> ///
> 
> /// Universal E=46I=5FSYSTEM=5FCONTEXT definition.
<= div>
> 
> ///
>= ; 
> typedef union =7B=
> 
=
> - E=46I=5FSYSTEM=5FCONTEXT=5FEBC *Syste= mContextEbc;
> 
> - E=46I=5FSYSTEM=5FCONTEXT=5F= IA32 *SystemContextIa32;
>= ; 
> - E=46I=5FSYSTE= M=5FCONTEXT=5FX64 *SystemContextX64;
> 
> - E= =46I=5FSYSTEM=5FCONTEXT=5FIP=46 *SystemContextIpf;
> 
> - E=46I=5FSYSTEM=5FCONTEXT=5FARM *SystemContextArm;
> 
> - E=46I=5FSYSTEM=5FCONTEXT=5FAARCH64 *SystemContextA= Arch64;
> 
> - E=46I=5FSYSTEM=5FCONTEXT=5FRIS= CV64 *SystemContextRiscV64;
= > 
> + E=46I=5FSY= STEM=5FCONTEXT=5FEBC *SystemContextEbc;
> 
> = + E=46I=5FSYSTEM=5FCONTEXT=5FIA32 *SystemContextIa32;
> 
> + E=46I=5FSYSTEM=5FCONTEXT=5FX64 *SystemContextX64;
> 
> + E=46I=5FSYSTEM=5FCONTEXT=5FIP=46 *SystemConte= xtIpf;
> 
> + E=46I=5FSYSTEM=5FCONTEXT=5FARM = *SystemContextArm;
> = ;
> + E=46I=5FSYSTEM=5FCO= NTEXT=5FAARCH64 *SystemContextAArch64;
> 
> += E=46I=5FSYSTEM=5FCONTEXT=5FRISCV64 *SystemContextRiscV64;
> 
> + E=46I=5FSYSTEM=5FCONTEXT=5FLOONGARCH64 *SystemContext= LoongArch64;
> 
> =7D E=46I=5FSYSTEM=5FCONTEX= T;
> 
> 
> 
>= //
> 
> diff --git a/MdePkg/Include/Protocol= /PxeBaseCode.h b/MdePkg/Include/Protocol/PxeBaseCode.h
> index 11872d602d..6787941a5d 100644
=
> --- a/MdePkg/Include/Protoco= l/PxeBaseCode.h
> +++ b/M= dePkg/Include/Protocol/PxeBaseCode.h
> =40=40 -4,6 +4,7 =40=40
> 
>&nb= sp;
> Copyright (c) 2006 = - 2018, Intel Corporation. All rights reserved.<BR>
> 
> Copyright (c) 2020, Hewlett Packard Enterprise Developm= ent LP. All rights reserved.<BR>
> 
> += Copyright (c) 2022, Loongson Technology Corporation Limited. All rights r= eserved.<BR>
> = ;
> 
> 
> SPDX-License-Identifier: BSD-2-Clause-Patent
> 
> 
&= gt; 
> =40=40 -158,6= +159,8 =40=40 typedef UINT16 E=46I=5FPXE=5FBASE=5FCODE=5FUDP=5FPORT;
> =23define E=46I=5FPXE=5FCL= IENT=5FSYSTEM=5FARCHITECTURE 0x000B
> 
> =23e= lif defined (MDE=5FCPU=5FRISCV64)
> 
> =23def= ine E=46I=5FPXE=5FCLIENT=5FSYSTEM=5FARCHITECTURE 0x001B
<= div class=3D=22MsoNormal=22>> 
> +=23elif defined (MDE=5FCPU=5FLOONGARCH64)
> 
> +=23define E=46I=5FPXE=5FCLIENT=5FSYSTEM=5FARCHITECTURE= 0x0027
> 
> =23endif
> 
> 
> 
> ///
> 
> diff --git a/MdePkg/Include/Uefi/UefiBaseType.h b/MdePkg/Inc= lude/Uefi/UefiBaseType.h
>= ; index 4a34ce8e25..83975a08eb 100644
> --- a/MdePkg/Include/Uefi/UefiBaseType.h
<= div class=3D=22MsoNormal=22>> +++ b/MdePkg/Include/Uefi/UefiBaseType.h=
> =40=40 -4,6 +4,7 =40=40=
> Copyright (c) 2006 - 2= 021, Intel Corporation. All rights reserved.<BR>
> 
> Portions copyright (c) 2011 - 2016, ARM Ltd. All rights re= served.<BR>
> =
> Copyright (c) 2020, He= wlett Packard Enterprise Development LP. All rights reserved.<BR>
> 
> +Copyright (c) 2022, Loongson Technology = Corporation Limited. All rights reserved.<BR>
> 
> 
> =
> SPDX-License-Identifie= r: BSD-2-Clause-Patent
>&= nbsp;
> 
=
> 
> =40=40 -246,6 +247,12 =40=40 typedef union =7B
=
> =23define E=46I=5FIMAGE=5FMA= CHINE=5FRISCV64 0x5064
>&= nbsp;
> =23define E=46I=5F= IMAGE=5FMACHINE=5FRISCV128 0x5128
> 
> <= /div>
> 
<= div class=3D=22MsoNormal=22>> +///
> 
> +/= // PE32+ Machine type for LoongArch 32/64 images.
> 
> +///
> 
> +=23define E=46I=5FIMAGE=5F= MACHINE=5FLOONGARCH32 0x6232
> 
> +=23define = E=46I=5FIMAGE=5FMACHINE=5FLOONGARCH64 0x6264
> 
&= gt; +
> 
=
> =23if =21defined (E=46I=5FIMAGE=5F= MACHINE=5FTYPE=5FVALUE) && =21defined (E=46I=5FIMAGE=5FMACHINE=5F= CROSS=5FTYPE=5FVALUE)
>&n= bsp;
> =23if defined (MDE= =5FCPU=5FIA32)
> 
> 
> 
> =40=40 -278,6 +285,13 =40=40 typedef union =7B
<= div>
> =23define E=46I=5FIMAGE=5FMACHINE=5F= TYPE=5FSUPPORTED(Machine) =5C
> 
> ((Machine) = =3D=3D E=46I=5FIMAGE=5FMACHINE=5FRISCV64)
> 
>=  
> 
> +=23define E=46I=5FIMAGE=5FMACHIN= E=5FCROSS=5FTYPE=5FSUPPORTED(Machine) (=46ALSE)
> 
> +
> 
> + =23elif defined (MDE=5FCPU=5FL= OONGARCH64)
> 
=
> +
> 
> +=23define E=46I=5FIMAGE=5FMACHINE=5FTYPE=5FSUPPORTED(Machine) =5C<= /div>
> 
<= div class=3D=22MsoNormal=22>> + ((Machine) =3D=3D E=46I=5FIMAGE=5FMACH= INE=5FLOONGARCH64)
> = ;
> +
> 
> =23define E=46I=5FIMAGE=5FMACHINE=5FCROSS=5FTYPE=5FSUPPORTE= D(Machine) (=46ALSE)
>&nb= sp;
> 
> 
> =23elif defined (MDE=5FCPU=5FEBC)
> 
> diff --git a/MdePkg/Include/Uefi/UefiSpec.h b/MdePkg/Include/= Uefi/UefiSpec.h
> index 2= b38b100f6..3abebbb8d9 100644
> --- a/MdePkg/Include/Uefi/UefiSpec.h
> +++ b/MdePkg/Include/Uefi/UefiSpec.h
> =40=40 -7,6 +7,7 =40=40
<= div class=3D=22MsoNormal=22>> 
> 
> C= opyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR&g= t;
> 
> Portions Copyright (c) 2020, Hewlett = Packard Enterprise Development LP. All rights reserved.<BR>
> 
> +Copyright (c) 2022, Loongson Technology Corpor= ation Limited. All rights reserved.<BR>
> 
&= gt; 
> 
> SPDX-License-Identifier: BSD-2= -Clause-Patent
> 
> 
> 
> =40=40 -2195,12 +2196,13 =40=40 typedef struct =7B
> //
> 
&= gt; // E=46I =46ile location to boot from on removable media devices
> 
> //
> 
> -=23defi= ne E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FIA32 L=22=5C=5CE=46I=5C= =5CBOOT=5C=5CBOOTIA32.E=46I=22
> 
> -=23d= efine E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FIA64 L=22=5C=5CE=46I= =5C=5CBOOT=5C=5CBOOTIA64.E=46I=22
> 
> -=23= define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FX64 L=22=5C=5CE=46I= =5C=5CBOOT=5C=5CBOOTX64.E=46I=22
> 
> -=23= define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FARM L=22=5C=5CE=46I= =5C=5CBOOT=5C=5CBOOTARM.E=46I=22
> 
> -=23= define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FAARCH64 L=22=5C=5CE= =46I=5C=5CBOOT=5C=5CBOOTAA64.E=46I=22
> 
>= -=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FRISCV64 L=22=5C= =5CE=46I=5C=5CBOOT=5C=5CBOOTRISCV64.E=46I=22
> 
> +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FIA32 L=22= =5C=5CE=46I=5C=5CBOOT=5C=5CBOOTIA32.E=46I=22
> 
> +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FIA64 L= =22=5C=5CE=46I=5C=5CBOOT=5C=5CBOOTIA64.E=46I=22
> 
> +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FX64= L=22=5C=5CE=46I=5C=5CBOOT=5C=5CBOOTX64.E=46I=22
<= div class=3D=22MsoNormal=22>> 
> +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FAR= M L=22=5C=5CE=46I=5C=5CBOOT=5C=5CBOOTARM.E=46I=22
=
> 
> +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FA= ARCH64 L=22=5C=5CE=46I=5C=5CBOOT=5C=5CBOOTAA64.E=46I=22
> 
> +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME= =5FRISCV64 L=22=5C=5CE=46I=5C=5CBOOT=5C=5CBOOTRISCV64.E=46I=22
> 
> +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46I= LE=5FNAME=5FLOONGARCH64 L=22=5C=5CE=46I=5C=5CBOOT=5C=5CBOOTLOONGARCH64= .E=46I=22
> 
> 
> 
> =23if =21defined (E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME)=
> 
=
> =23if defined (MDE=5FCPU=5FIA32)
<= /div>
> 
> =40=40 -2214,6 +2216,8 =40=40 typedef struct =7B=
> =23define E=46I=5FREMO= VABLE=5FMEDIA=5F=46ILE=5FNAME E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5F= AARCH64
> 
> =23elif defined (MDE=5FCPU=5FRIS= CV64)
> 
=
> =23define E=46I=5FREMOVABLE=5FMEDI= A=5F=46ILE=5FNAME E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FRISCV64
> 
> + =23elif defined (MDE=5FCPU=5FLOONGARCH64)=
> 
=
> +=23define E=46I=5FREMOVABLE=5FMEDIA=5F= =46ILE=5FNAME E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FLOONGARCH64
> 
> =23else
> 
> =23= error Unknown Processor Type
> 
> =23endif
> 
> --
> 2.27.0
> =
> 
=
> 
> -=3D-=3D-=3D-=3D-=3D-=3D
> Groups.io Links: You receive all messages sent to this = group.
> View/Reply Onlin= e (=2393766): https://edk2.= groups.io/g/devel/message/93766
> Unsubscribe:= https://edk2.groups.io/g/devel/unsub&= nbsp;=5Bmichael.d.kinney=40intel.com=5D
> -=3D-=3D-=3D-=3D-=3D-=3D
> 
--632e6f79_78ffb058_19a0--