From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.43; helo=mga05.intel.com; envelope-from=star.zeng@intel.com; receiver=edk2-devel@lists.01.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 2E4012194EB76 for ; Wed, 13 Feb 2019 01:21:17 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Feb 2019 01:21:17 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,365,1544515200"; d="scan'208";a="138224877" Received: from shzintpr01.sh.intel.com (HELO [10.7.209.18]) ([10.239.4.80]) by orsmga001.jf.intel.com with ESMTP; 13 Feb 2019 01:21:15 -0800 To: "Chasel, Chiu" , edk2-devel@lists.01.org Cc: Michael D Kinney , Liming Gao , star.zeng@intel.com References: <20190212131957.2576-1-chasel.chiu@intel.com> <20190212131957.2576-2-chasel.chiu@intel.com> From: "Zeng, Star" Message-ID: <2a23b5cc-54ec-9c1a-e6f6-c75d9f235d43@intel.com> Date: Wed, 13 Feb 2019 17:20:45 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.3; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.5.0 MIME-Version: 1.0 In-Reply-To: <20190212131957.2576-2-chasel.chiu@intel.com> Subject: Re: [PATCH 1/3] MdePkg: Support EFI_PEI_CORE_FV_LOCATION_PPI X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 13 Feb 2019 09:21:18 -0000 Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit On 2019/2/12 21:19, Chasel, Chiu wrote: > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1524 > > Add EFI_PEI_CORE_FV_LOCATION_PPI definition basing on > PI spec 1.7, Section 6.3.9. > This PPI can support the secnario that PEI Foundation > not in BFV. > > Cc: Michael D Kinney > Cc: Liming Gao > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Chasel Chiu Reviewed-by: Star Zeng > --- > MdePkg/Include/Ppi/PeiCoreFvLocation.h | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++++ > MdePkg/MdePkg.dec | 11 +++++++++-- > 2 files changed, 62 insertions(+), 2 deletions(-) > > diff --git a/MdePkg/Include/Ppi/PeiCoreFvLocation.h b/MdePkg/Include/Ppi/PeiCoreFvLocation.h > new file mode 100644 > index 0000000000..c7bbbfb265 > --- /dev/null > +++ b/MdePkg/Include/Ppi/PeiCoreFvLocation.h > @@ -0,0 +1,53 @@ > +/** @file > + Header file for Pei Core FV Location PPI. > + > + This PPI contains a pointer to the firmware volume which contains the PEI Foundation. > + If the PEI Foundation does not reside in the BFV, then SEC must pass this PPI as a part > + of the PPI list provided to the PEI Foundation Entry Point, otherwise the PEI Foundation > + shall assume that it resides within the BFV. > + > + Copyright (c) 2019, Intel Corporation. All rights reserved.
> + This program and the accompanying materials > + are licensed and made available under the terms and conditions of the BSD License > + which accompanies this distribution. The full text of the license may be found at > + http://opensource.org/licenses/bsd-license.php > + > + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > + > + @par Revision Reference: > + This PPI is defined in UEFI Platform Initialization Specification 1.7 Volume 1: > + Standards > + > +**/ > + > + > +#ifndef _EFI_PEI_CORE_FV_LOCATION_H_ > +#define _EFI_PEI_CORE_FV_LOCATION_H_ > + > +/// > +/// Global ID for EFI_PEI_CORE_FV_LOCATION_PPI > +/// > +#define EFI_PEI_CORE_FV_LOCATION_GUID \ > + { \ > + 0x52888eae, 0x5b10, 0x47d0, {0xa8, 0x7f, 0xb8, 0x22, 0xab, 0xa0, 0xca, 0xf4 } \ > + } > + > +/// > +/// Forward declaration for EFI_PEI_CORE_FV_LOCATION_PPI > +/// > +typedef struct _EFI_PEI_CORE_FV_LOCATION_PPI EFI_PEI_CORE_FV_LOCATION_PPI; > + > +/// > +/// This PPI provides location of EFI PeiCoreFv. > +/// > +struct _EFI_PEI_CORE_FV_LOCATION_PPI { > + /// > + /// Pointer to the first byte of the firmware volume which contains the PEI Foundation. > + /// > + VOID *PeiCoreFvLocation; > +}; > + > +extern EFI_GUID gEfiPeiCoreFvLocationPpiGuid; > + > +#endif // _EFI_PEI_CORE_FV_LOCATION_H_ > diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec > index a485408310..c859b4a511 100644 > --- a/MdePkg/MdePkg.dec > +++ b/MdePkg/MdePkg.dec > @@ -2,9 +2,9 @@ > # This Package provides all definitions, library classes and libraries instances. > # > # It also provides the definitions(including PPIs/PROTOCOLs/GUIDs) of > -# EFI1.10/UEFI2.7/PI1.6 and some Industry Standards. > +# EFI1.10/UEFI2.7/PI1.7 and some Industry Standards. > # > -# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
> +# Copyright (c) 2007 - 2019, Intel Corporation. All rights reserved.
> # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
> # (C) Copyright 2016 Hewlett Packard Enterprise Development LP
> # > @@ -929,6 +929,13 @@ > ## Include/Ppi/SecHobData.h > gEfiSecHobDataPpiGuid = { 0x3ebdaf20, 0x6667, 0x40d8, {0xb4, 0xee, 0xf5, 0x99, 0x9a, 0xc1, 0xb7, 0x1f } } > > + # > + # PPIs defined in PI 1.7. > + # > + > + ## Include/Ppi/PeiCoreFvLocation.h > + gEfiPeiCoreFvLocationPpiGuid = { 0x52888eae, 0x5b10, 0x47d0, { 0xa8, 0x7f, 0xb8, 0x22, 0xab, 0xa0, 0xca, 0xf4 }} > + > [Protocols] > ## Include/Protocol/Pcd.h > gPcdProtocolGuid = { 0x11B34006, 0xD85B, 0x4D0A, { 0xA2, 0x90, 0xD5, 0xA5, 0x71, 0x31, 0x0E, 0xF7 }} >