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To: "Ni, Ruiyu" <ruiyu.ni@Intel.com>, Eric Dong <eric.dong@intel.com>
References: <20180716030851.13752-1-eric.dong@intel.com>
 <20180716030851.13752-4-eric.dong@intel.com>
 <160a365d-309d-643c-696d-cb80b4ee5660@Intel.com>
Cc: edk2-devel@lists.01.org
From: Laszlo Ersek <lersek@redhat.com>
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Date: Tue, 17 Jul 2018 16:07:08 +0200
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Subject: Re: [Patch v3 3/3] UefiCpuPkg/MpInitLib: Load uCode once for each core.
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On 07/17/18 12:02, Ni, Ruiyu wrote:
> On 7/16/2018 11:08 AM, Eric Dong wrote:
>> GetProcessorLocationByApicId (GetInitialApicId (), NULL, NULL,
>> &ThreadId);
>> +  if (ThreadId != 0) {
>> +    //
>> +    // Skip loading microcode if it is not the first thread in one core.
>> +    //
>> +    return;
>> +  }
>> +
> 
> Eric,
> Is it possible that Thread#0 is disabled while Thread#1 is enabled? It
> may cause the certain core with no uCode applied.
> 

I thought of this (superficially) but I figured the code would run
anyway at CpuMpPei / CpuDxe startup only, at which point no logical
processors could have been disabled yet -- programmatically, through the
MP PPI / protocol. Is there any other reason why ThreadId=0 could be
missing?

(I plan to check the rest of the series later.)

Thanks
Laszlo