From: Feng Tian <feng.tian@intel.com>
To: edk2-devel@lists.01.org
Cc: Michael Kinney <michael.d.kinney@intel.com>,
Jiewen Yao <jiewen.yao@intel.com>, Jeff Fan <jeff.fan@intel.com>
Subject: [patch 1/4] UefiCpuPkg/Include: Update MSEG structure comments
Date: Fri, 16 Dec 2016 09:48:12 +0800 [thread overview]
Message-ID: <2d3392fa654faaf80a5e177e0c07aa48418a9015.1481851932.git.feng.tian@intel.com> (raw)
In-Reply-To: <cover.1481851932.git.feng.tian@intel.com>
In-Reply-To: <cover.1481851932.git.feng.tian@intel.com>
From: Michael Kinney <michael.d.kinney@intel.com>
Add comments to describe fields of MSEG_HEADER and
add define values for the MonitorFeatures field.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
---
UefiCpuPkg/Include/Register/ArchitecturalMsr.h | 25 ++++++++++++++++++++++---
1 file changed, 22 insertions(+), 3 deletions(-)
diff --git a/UefiCpuPkg/Include/Register/ArchitecturalMsr.h b/UefiCpuPkg/Include/Register/ArchitecturalMsr.h
index a7a221d..a74ea51 100644
--- a/UefiCpuPkg/Include/Register/ArchitecturalMsr.h
+++ b/UefiCpuPkg/Include/Register/ArchitecturalMsr.h
@@ -484,7 +484,19 @@ typedef union {
field of #MSR_IA32_SMM_MONITOR_CTL_REGISTER.
**/
typedef struct {
+ ///
+ /// Different processors may use different MSEG revision identifiers. These
+ /// identifiers enable software to avoid using an MSEG header formatted for
+ /// one processor on a processor that uses a different format. Software can
+ /// discover the MSEG revision identifier that a processor uses by reading
+ /// the VMX capability MSR IA32_VMX_MISC.
+ //
UINT32 MsegHeaderRevision;
+ ///
+ /// Bits 31:1 of this field are reserved and must be zero. Bit 0 of the field
+ /// is the IA-32e mode SMM feature bit. It indicates whether the logical
+ /// processor will be in IA-32e mode after the STM is activated.
+ ///
UINT32 MonitorFeatures;
UINT32 GdtrLimit;
UINT32 GdtrBaseOffset;
@@ -492,12 +504,19 @@ typedef struct {
UINT32 EipOffset;
UINT32 EspOffset;
UINT32 Cr3Offset;
- //
- // Pad header so total size is 2KB
- //
+ ///
+ /// Pad header so total size is 2KB
+ ///
UINT8 Reserved[SIZE_2KB - 8 * sizeof (UINT32)];
} MSEG_HEADER;
+///
+/// @{ Define values for the MonitorFeatures field of #MSEG_HEADER
+///
+#define STM_FEATURES_IA32E 0x1
+///
+/// @}
+///
/**
Base address of the logical processor's SMRAM image (RO, SMM only). If
--
2.7.1.windows.2
next prev parent reply other threads:[~2016-12-16 1:48 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-16 1:48 [patch 0/4] Add STM (Smi Tranfer Monitor) support Feng Tian
2016-12-16 1:48 ` Feng Tian [this message]
2016-12-16 1:48 ` [patch 2/4] UefiCpuPkg: Add STM GUIDs, Protocols, and PCDs Feng Tian
2016-12-16 1:48 ` [patch 3/4] UefiCpuPkg/SmmCpuFeaturesLib: Split into two files Feng Tian
2016-12-16 1:48 ` [patch 4/4] UefiCpuPkg/SmmCpuFeaturesLibStm: Add STM library instance Feng Tian
2016-12-19 1:00 ` [patch 0/4] Add STM (Smi Tranfer Monitor) support Fan, Jeff
2016-12-19 1:24 ` Yao, Jiewen
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