From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id E4158AC0F0A for ; Mon, 30 Oct 2023 09:38:32 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=KkuTtR41wgvjwRLEKFs8Icu4TjXUNBqb4mp/jUPw4wE=; c=relaxed/simple; d=groups.io; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From:In-Reply-To:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Language:Content-Type:Content-Transfer-Encoding; s=20140610; t=1698658711; v=1; b=RvASZGBWnGAFe0zKwimDZr0hMf97usFtyG0BAf9u5Dngrk0WKaSarbXOP6ObD397ol7PYFfx 7bUrUgWZ2Ido3gUxKjrNSR9AJvFsxjuX09veKyQs3pjakLl+KCQ/ryZ/o9vo33Ms80w0qvh4nAx 7SaO4Lr5wiW62JxgF/8eNrfU= X-Received: by 127.0.0.2 with SMTP id MypoYY7687511x5R6v9WvYe7; Mon, 30 Oct 2023 02:38:31 -0700 X-Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by mx.groups.io with SMTP id smtpd.web10.144797.1698658710827218505 for ; Mon, 30 Oct 2023 02:38:31 -0700 X-Received: from mimecast-mx02.redhat.com (mx-ext.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-567-Lp-wxThtMJKSHdG3iq3uTw-1; Mon, 30 Oct 2023 05:38:26 -0400 X-MC-Unique: Lp-wxThtMJKSHdG3iq3uTw-1 X-Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 7D9CA3802268; Mon, 30 Oct 2023 09:38:25 +0000 (UTC) X-Received: from [10.39.194.199] (unknown [10.39.194.199]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 7E9DD5027; Mon, 30 Oct 2023 09:38:23 +0000 (UTC) Message-ID: <2db1b89a-6c7f-ea3f-becb-1e942b41a3e8@redhat.com> Date: Mon, 30 Oct 2023 10:38:21 +0100 MIME-Version: 1.0 Subject: Re: [edk2-devel] [PATCH v7 3/5] MdePkg: Implement RISC-V Cache Management Operations To: Pedro Falcato , devel@edk2.groups.io, dhaval@rivosinc.com Cc: Michael D Kinney , Liming Gao , Zhiguang Liu , Sunil V L , Daniel Schaefer References: <20231029144613.150580-1-dhaval@rivosinc.com> <20231029144613.150580-4-dhaval@rivosinc.com> From: "Laszlo Ersek" In-Reply-To: X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.5 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: dE3THQ7Ib1ayqodFQXgA1a7ix7686176AA= Content-Language: en-US Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=RvASZGBW; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=redhat.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io On 10/29/23 20:12, Pedro Falcato wrote: > On Sun, Oct 29, 2023 at 2:46 PM Dhaval Sharma wrote: >> >> Implement Cache Management Operations (CMO) defined by >> RISC-V spec https://github.com/riscv/riscv-CMOs. >> >> Notes: >> 1. CMO only supports block based Operations. Meaning cache >> flush/invd/clean Operations are not available for the entire >> range. In that case we fallback on fence.i instructions. >> 2. Operations are implemented using Opcodes to make them compiler >> independent. binutils 2.39+ compilers support CMO instructions. >> >> Test: >> 1. Ensured correct instructions are refelecting in asm > > nit: reflecting > >> 2. Not able to verify actual instruction in HW as Qemu ignores >> any actual cache operations. > > Do you have no way to test this in hardware? Since Rivos is a RISCV > vendor and all ;) > I don't like inviting the idea of merging CPU architectural changes > without actually testing them in something resembling real silicon > (i.e QEMU KVM is _fine_, QEMU TCG really isn't). > Hopefully I'm not drawing an incorrect parallel here, but, as I recall arm64 enablement in 2014, nearly all initial enablement in RHEL occurred on software emulators (ARM Foundation Model, ARM FVP, then QEMU TCG). You need to start somewhere. In particular, qemu-system-aarch64 was a huge step forward (performance-wise) once it *existed*, relative to the Foundation Model / FVP, even though qemu-system-aarch64 wouldn't emulate CPU caches (IIRC). Laszlo -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#110303): https://edk2.groups.io/g/devel/message/110303 Mute This Topic: https://groups.io/mt/102256466/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/leave/12367111/7686176/1913456212/xyzzy [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=-