From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=66.187.233.73; helo=mx1.redhat.com; envelope-from=lersek@redhat.com; receiver=edk2-devel@lists.01.org Received: from mx1.redhat.com (mx3-rdu2.redhat.com [66.187.233.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5D3EA21124FE0 for ; Fri, 7 Sep 2018 01:44:40 -0700 (PDT) Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 6935C77886; Fri, 7 Sep 2018 08:44:39 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-120-152.rdu2.redhat.com [10.10.120.152]) by smtp.corp.redhat.com (Postfix) with ESMTP id A9349A9E6B; Fri, 7 Sep 2018 08:44:38 +0000 (UTC) To: Nikita Leshenko , edk2-devel@lists.01.org Cc: Liran Alon , Ard Biesheuvel References: From: Laszlo Ersek Message-ID: <2fdb6059-86a4-a8d5-a46c-286c62e17864@redhat.com> Date: Fri, 7 Sep 2018 10:44:37 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: X-Scanned-By: MIMEDefang 2.79 on 10.11.54.5 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.1]); Fri, 07 Sep 2018 08:44:39 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.1]); Fri, 07 Sep 2018 08:44:39 +0000 (UTC) for IP:'10.11.54.5' DOMAIN:'int-mx05.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'lersek@redhat.com' RCPT:'' Subject: Re: PciBusDxe: PCI-Express bug with dynamic PcdPciExpressBaseAddress X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 07 Sep 2018 08:44:40 -0000 Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit (+Ard) On 09/06/18 21:08, Nikita Leshenko wrote: > Hi, > > We ran into a bug in EDK2 relating to PCI-Express in PciBusDxe. Here's the flow > of the bug: > > 1. PciBusDxe/PciEnumeratorSupport.c: Function BarExisted probes a BAR. It raises > TPL to TPL_HIGH_LEVEL to avoid timer interrupts while probing the BAR and > calls PciIo->Pci.Write. > 2. BasePciExpressLib/PciExpressLib.c: The write reaches PciExpressWrite32, which > calls GetPciExpressBaseAddress. > 3. GetPciExpressBaseAddress retrieves the address from PcdPciExpressBaseAddress. > 4. Reading the PCD calls DxePcdGet64 -> GetWorker -> > EfiAcquireLock(&mPcdDatabaseLock), which is at TPL_NOTIFY level. This crashes > the firmware because step 1 raised the TPL to TPL_HIGH_LEVEL. > > This doesn't happen when PcdPciExpressBaseAddress is fixed at build (because > then the read is optimized to a static global variable), but when the PCD is > dynamic PCI-Express is broken. > > Does anybody have a suggestion for fixing it? > > Options we thought about: > - Change mPcdDatabaseLock.Tpl to TPL_HIGH_LEVEL > - Don't use a PCD for the base address, put it in a static global variable and > create functions to set and retrieve it. In the ArmVirtPkg platforms, we also set "PcdPciExpressBaseAddress" dynamically. And, we implemented your second option above; see: ArmVirtPkg/Library/BaseCachingPciExpressLib/ Relevant commits: - ad3359eb43a9 ("ArmVirtualizationPkg: clone BasePciExpressLib, cache PCIe config base", 2015-02-23) - a06d0bb58eb9 ("ArmVirtPkg/BaseCachingPciExpressLib: depend on PciPcdProducerLib", 2016-04-12) (In fact, commit ad3359eb43a9 documents the exact issue you report here.) Thanks Laszlo