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Fri, 22 Jul 2022 10:48:01 +0000 Message-ID: <3056f064-1dac-1eb1-98eb-fc655f443531@arm.com> Date: Fri, 22 Jul 2022 11:48:00 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH 1/2] UefiCpuPkg: Simplify InitializeSeparateExceptionStacks To: Zhiguang Liu , devel@edk2.groups.io CC: Eric Dong , Ray Ni , Rahul Kumar , Leif Lindholm , Dandan Bi , Liming Gao , Jian J Wang , Ard Biesheuvel , nd@arm.com References: <20220722075737.897-1-zhiguang.liu@intel.com> <20220722075737.897-2-zhiguang.liu@intel.com> From: "Sami Mujawar" In-Reply-To: <20220722075737.897-2-zhiguang.liu@intel.com> X-ClientProxiedBy: LO4P123CA0447.GBRP123.PROD.OUTLOOK.COM (2603:10a6:600:1a9::20) To AS8PR08MB6806.eurprd08.prod.outlook.com (2603:10a6:20b:39b::12) MIME-Version: 1.0 X-MS-Office365-Filtering-Correlation-Id: a383fd18-63b6-41e9-0495-08da6bcfac6d X-MS-TrafficTypeDiagnostic: GV1PR08MB7347:EE_|VE1EUR03FT023:EE_|AM6PR08MB4039:EE_ x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Jul 2022 10:48:12.0052 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a383fd18-63b6-41e9-0495-08da6bcfac6d X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: VE1EUR03FT023.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR08MB4039 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable Hi Zhiguan, The=C2=A0 ArmPkg/Library/* changes look good to me. Reviewed-by: Sami Mujawar Regards, Sami Mujawar On 22/07/2022 08:57 am, Zhiguang Liu wrote: > Hide the Exception implementation details in CpuExcetionHandlerLib and > caller only need to provide buffer > > Cc: Eric Dong > Cc: Ray Ni > Cc: Rahul Kumar > Cc: Leif Lindholm > Cc: Dandan Bi > Cc: Liming Gao > Cc: Jian J Wang > Cc: Ard Biesheuvel > Cc: Sami Mujawar > Signed-off-by: Zhiguang Liu > --- > .../Library/ArmExceptionLib/ArmExceptionLib.c | 15 +- > MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c | 4 +- > .../Include/Library/CpuExceptionHandlerLib.h | 15 +- > .../CpuExceptionHandlerLibNull.c | 15 +- > UefiCpuPkg/CpuDxe/CpuMp.c | 157 +++------------- > UefiCpuPkg/CpuDxe/CpuMp.h | 10 +- > UefiCpuPkg/CpuMpPei/CpuMpPei.c | 174 ++++-------------- > UefiCpuPkg/CpuMpPei/CpuMpPei.h | 10 +- > .../CpuExceptionHandlerLib/DxeException.c | 77 +++++--- > .../Ia32/ArchExceptionHandler.c | 3 +- > .../CpuExceptionHandlerLib/PeiCpuException.c | 62 ++++++- > .../PeiCpuExceptionHandlerLib.inf | 4 +- > .../SecPeiCpuException.c | 15 +- > .../CpuExceptionHandlerLib/SmmException.c | 15 +- > .../X64/ArchExceptionHandler.c | 3 +- > 15 files changed, 231 insertions(+), 348 deletions(-) > > diff --git a/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c b/ArmPkg/Li= brary/ArmExceptionLib/ArmExceptionLib.c > index 2c7bc66aa7..a521c33f32 100644 > --- a/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c > +++ b/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c > @@ -288,20 +288,23 @@ CommonCExceptionHandler ( > =20 > /** > Setup separate stacks for certain exception handlers. > + If the input Buffer and BufferSize are both NULL, use global variable = if possible. > =20 > - InitData is optional and processor arch dependent. > - > - @param[in] InitData Pointer to data optional for information abo= ut how > - to assign stacks for certain exception handl= ers. > + @param[in] Buffer Point to buffer used to separate except= ion stack. > + @param[in, out] BufferSize On input, it indicates the byte size of= Buffer. > + If the size is not enough, the return s= tatus will > + be EFI_BUFFER_TOO_SMALL, and output Buf= ferSize > + will be the size it needs. > =20 > @retval EFI_SUCCESS The stacks are assigned successfully. > @retval EFI_UNSUPPORTED This function is not supported. > - > + @retval EFI_BUFFER_TOO_SMALL This BufferSize is too small. > **/ > EFI_STATUS > EFIAPI > InitializeSeparateExceptionStacks ( > - IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL > + IN VOID *Buffer, > + IN OUT UINTN *BufferSize > ) > { > return EFI_SUCCESS; > diff --git a/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c b/MdeModulePkg/Core/= Dxe/DxeMain/DxeMain.c > index 0a1f3d79e2..5733f0c8ec 100644 > --- a/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c > +++ b/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c > @@ -1,7 +1,7 @@ > /** @file > DXE Core Main Entry Point > =20 > -Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
> +Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.
> SPDX-License-Identifier: BSD-2-Clause-Patent > =20 > **/ > @@ -260,7 +260,7 @@ DxeMain ( > // Setup Stack Guard > // > if (PcdGetBool (PcdCpuStackGuard)) { > - Status =3D InitializeSeparateExceptionStacks (NULL); > + Status =3D InitializeSeparateExceptionStacks (NULL, NULL); > ASSERT_EFI_ERROR (Status); > } > =20 > diff --git a/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h b/MdeM= odulePkg/Include/Library/CpuExceptionHandlerLib.h > index 9a495081f7..8d44ed916a 100644 > --- a/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h > +++ b/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h > @@ -104,20 +104,23 @@ InitializeCpuExceptionHandlers ( > =20 > /** > Setup separate stacks for certain exception handlers. > + If the input Buffer and BufferSize are both NULL, use global variable = if possible. > =20 > - InitData is optional and processor arch dependent. > - > - @param[in] InitData Pointer to data optional for information abo= ut how > - to assign stacks for certain exception handl= ers. > + @param[in] Buffer Point to buffer used to separate except= ion stack. > + @param[in, out] BufferSize On input, it indicates the byte size of= Buffer. > + If the size is not enough, the return s= tatus will > + be EFI_BUFFER_TOO_SMALL, and output Buf= ferSize > + will be the size it needs. > =20 > @retval EFI_SUCCESS The stacks are assigned successfully. > @retval EFI_UNSUPPORTED This function is not supported. > - > + @retval EFI_BUFFER_TOO_SMALL This BufferSize is too small. > **/ > EFI_STATUS > EFIAPI > InitializeSeparateExceptionStacks ( > - IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL > + IN VOID *Buffer, > + IN OUT UINTN *BufferSize > ); > =20 > /** > diff --git a/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuException= HandlerLibNull.c b/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExcep= tionHandlerLibNull.c > index 8aeedcb4d1..74908a379b 100644 > --- a/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandler= LibNull.c > +++ b/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandler= LibNull.c > @@ -83,20 +83,23 @@ DumpCpuContext ( > =20 > /** > Setup separate stacks for certain exception handlers. > + If the input Buffer and BufferSize are both NULL, use global variable = if possible. > =20 > - InitData is optional and processor arch dependent. > - > - @param[in] InitData Pointer to data optional for information abo= ut how > - to assign stacks for certain exception handl= ers. > + @param[in] Buffer Point to buffer used to separate except= ion stack. > + @param[in, out] BufferSize On input, it indicates the byte size of= Buffer. > + If the size is not enough, the return s= tatus will > + be EFI_BUFFER_TOO_SMALL, and output Buf= ferSize > + will be the size it needs. > =20 > @retval EFI_SUCCESS The stacks are assigned successfully. > @retval EFI_UNSUPPORTED This function is not supported. > - > + @retval EFI_BUFFER_TOO_SMALL This BufferSize is too small. > **/ > EFI_STATUS > EFIAPI > InitializeSeparateExceptionStacks ( > - IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL > + IN VOID *Buffer, > + IN OUT UINTN *BufferSize > ) > { > return EFI_UNSUPPORTED; > diff --git a/UefiCpuPkg/CpuDxe/CpuMp.c b/UefiCpuPkg/CpuDxe/CpuMp.c > index e385f585c7..286ef2d3fd 100644 > --- a/UefiCpuPkg/CpuDxe/CpuMp.c > +++ b/UefiCpuPkg/CpuDxe/CpuMp.c > @@ -596,24 +596,6 @@ CollectBistDataFromHob ( > } > } > =20 > -/** > - Get GDT register value. > - > - This function is mainly for AP purpose because AP may have different G= DT > - table than BSP. > - > - @param[in,out] Buffer The pointer to private data buffer. > - > -**/ > -VOID > -EFIAPI > -GetGdtr ( > - IN OUT VOID *Buffer > - ) > -{ > - AsmReadGdtr ((IA32_DESCRIPTOR *)Buffer); > -} > - > /** > Initializes CPU exceptions handlers for the sake of stack switch requ= irement. > =20 > @@ -629,27 +611,17 @@ InitializeExceptionStackSwitchHandlers ( > IN OUT VOID *Buffer > ) > { > - CPU_EXCEPTION_INIT_DATA *EssData; > - IA32_DESCRIPTOR Idtr; > - EFI_STATUS Status; > + SWITCH_STACK_DATA *SwitchStackData; > =20 > - EssData =3D Buffer; > - // > - // We don't plan to replace IDT table with a new one, but we should no= t assume > - // the AP's IDT is the same as BSP's IDT either. > - // > - AsmReadIdtr (&Idtr); > - EssData->Ia32.IdtTable =3D (VOID *)Idtr.Base; > - EssData->Ia32.IdtTableSize =3D Idtr.Limit + 1; > - Status =3D InitializeSeparateExceptionStacks (EssD= ata); > - ASSERT_EFI_ERROR (Status); > + SwitchStackData =3D (SWITCH_STACK_DATA *)Buffer; > + InitializeSeparateExceptionStacks (SwitchStackData->Buffer, SwitchStac= kData->BufferSize); > } > =20 > /** > Initializes MP exceptions handlers for the sake of stack switch requi= rement. > =20 > This function will allocate required resources required to setup stac= k switch > - and pass them through CPU_EXCEPTION_INIT_DATA to each logic processor. > + and pass them through SwitchStackData to each logic processor. > =20 > **/ > VOID > @@ -657,129 +629,52 @@ InitializeMpExceptionStackSwitchHandlers ( > VOID > ) > { > - UINTN Index; > - UINTN Bsp; > - UINTN ExceptionNumber; > - UINTN OldGdtSize; > - UINTN NewGdtSize; > - UINTN NewStackSize; > - IA32_DESCRIPTOR Gdtr; > - CPU_EXCEPTION_INIT_DATA EssData; > - UINT8 *GdtBuffer; > - UINT8 *StackTop; > - > - ExceptionNumber =3D FixedPcdGetSize (PcdCpuStackSwitchExceptionList); > - NewStackSize =3D FixedPcdGet32 (PcdCpuKnownGoodStackSize) * Excepti= onNumber; > - > - StackTop =3D AllocateRuntimeZeroPool (NewStackSize * mNumberOfProcesso= rs); > - ASSERT (StackTop !=3D NULL); > - StackTop +=3D NewStackSize * mNumberOfProcessors; > + UINTN Index; > + UINTN Bsp; > + UINT8 *Buffer; > + SWITCH_STACK_DATA SwitchStackData; > + UINTN BufferSize; > =20 > - // > - // The default exception handlers must have been initialized. Let's ju= st skip > - // it in this method. > - // > - EssData.Ia32.Revision =3D CPU_EXCEPTION_INIT_DATA_REV; > - EssData.Ia32.InitDefaultHandlers =3D FALSE; > - > - EssData.Ia32.StackSwitchExceptions =3D FixedPcdGetPtr (PcdCpuStac= kSwitchExceptionList); > - EssData.Ia32.StackSwitchExceptionNumber =3D ExceptionNumber; > - EssData.Ia32.KnownGoodStackSize =3D FixedPcdGet32 (PcdCpuKnown= GoodStackSize); > - > - // > - // Initialize Gdtr to suppress incorrect compiler/analyzer warnings. > - // > - Gdtr.Base =3D 0; > - Gdtr.Limit =3D 0; > + SwitchStackData.BufferSize =3D &BufferSize; > MpInitLibWhoAmI (&Bsp); > + > for (Index =3D 0; Index < mNumberOfProcessors; ++Index) { > - // > - // To support stack switch, we need to re-construct GDT but not IDT. > - // > + SwitchStackData.Buffer =3D NULL; > + BufferSize =3D 0; > + > if (Index =3D=3D Bsp) { > - GetGdtr (&Gdtr); > + InitializeExceptionStackSwitchHandlers (&SwitchStackData); > } else { > // > - // AP might have different size of GDT from BSP. > + // AP might need different buffer size from BSP. > // > - MpInitLibStartupThisAP (GetGdtr, Index, NULL, 0, (VOID *)&Gdtr, NU= LL); > + MpInitLibStartupThisAP (InitializeExceptionStackSwitchHandlers, In= dex, NULL, 0, (VOID *)&SwitchStackData, NULL); > } > =20 > - // > - // X64 needs only one TSS of current task working for all exceptions > - // because of its IST feature. IA32 needs one TSS for each exception > - // in addition to current task. Since AP is not supposed to allocate > - // memory, we have to do it in BSP. To simplify the code, we allocat= e > - // memory for IA32 case to cover both IA32 and X64 exception stack > - // switch. > - // > - // Layout of memory to allocate for each processor: > - // -------------------------------- > - // | Alignment | (just in case) > - // -------------------------------- > - // | | > - // | Original GDT | > - // | | > - // -------------------------------- > - // | Current task descriptor | > - // -------------------------------- > - // | | > - // | Exception task descriptors | X ExceptionNumber > - // | | > - // -------------------------------- > - // | Current task-state segment | > - // -------------------------------- > - // | | > - // | Exception task-state segment | X ExceptionNumber > - // | | > - // -------------------------------- > - // > - OldGdtSize =3D Gdtr.Limit + 1; > - EssData.Ia32.ExceptionTssDescSize =3D sizeof (IA32_TSS_DESCRIPTOR) * > - (ExceptionNumber + 1); > - EssData.Ia32.ExceptionTssSize =3D sizeof (IA32_TASK_STATE_SEGMENT) * > - (ExceptionNumber + 1); > - NewGdtSize =3D sizeof (IA32_TSS_DESCRIPTOR) + > - OldGdtSize + > - EssData.Ia32.ExceptionTssDescSize + > - EssData.Ia32.ExceptionTssSize; > - > - GdtBuffer =3D AllocateRuntimeZeroPool (NewGdtSize); > - ASSERT (GdtBuffer !=3D NULL); > - > - // > - // Make sure GDT table alignment > - // > - EssData.Ia32.GdtTable =3D ALIGN_POINTER (GdtBuffer, sizeof (IA32= _TSS_DESCRIPTOR)); > - NewGdtSize -=3D ((UINT8 *)EssData.Ia32.GdtTable - GdtB= uffer); > - EssData.Ia32.GdtTableSize =3D NewGdtSize; > - > - EssData.Ia32.ExceptionTssDesc =3D ((UINT8 *)EssData.Ia32.GdtTable + = OldGdtSize); > - EssData.Ia32.ExceptionTss =3D ((UINT8 *)EssData.Ia32.GdtTable + = OldGdtSize + > - EssData.Ia32.ExceptionTssDescSize); > - > - EssData.Ia32.KnownGoodStackTop =3D (UINTN)StackTop; > + ASSERT (BufferSize !=3D 0); > + Buffer =3D AllocateRuntimeZeroPool (BufferSize); > + ASSERT (Buffer !=3D NULL); > + SwitchStackData.Buffer =3D Buffer; > DEBUG (( > DEBUG_INFO, > - "Exception stack top[cpu%lu]: 0x%lX\n", > + "Buffer[cpu%lu] for InitializeExceptionStackSwitchHandlers: 0x%lX = with size 0x%x\n", > (UINT64)(UINTN)Index, > - (UINT64)(UINTN)StackTop > + (UINT64)(UINTN)Buffer, > + (UINT32)BufferSize > )); > =20 > if (Index =3D=3D Bsp) { > - InitializeExceptionStackSwitchHandlers (&EssData); > + InitializeExceptionStackSwitchHandlers (&SwitchStackData); > } else { > MpInitLibStartupThisAP ( > InitializeExceptionStackSwitchHandlers, > Index, > NULL, > 0, > - (VOID *)&EssData, > + (VOID *)&SwitchStackData, > NULL > ); > } > - > - StackTop -=3D NewStackSize; > } > } > =20 > diff --git a/UefiCpuPkg/CpuDxe/CpuMp.h b/UefiCpuPkg/CpuDxe/CpuMp.h > index b461753510..c545a711b8 100644 > --- a/UefiCpuPkg/CpuDxe/CpuMp.h > +++ b/UefiCpuPkg/CpuDxe/CpuMp.h > @@ -1,7 +1,7 @@ > /** @file > CPU DXE MP support > =20 > - Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
> + Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.
> SPDX-License-Identifier: BSD-2-Clause-Patent > =20 > **/ > @@ -9,6 +9,14 @@ > #ifndef _CPU_MP_H_ > #define _CPU_MP_H_ > =20 > +// > +// Structure for InitializeSeparateExceptionStacks > +// > +typedef struct { > + VOID *Buffer; > + UINTN *BufferSize; > +} SWITCH_STACK_DATA; > + > /** > Initialize Multi-processor support. > =20 > diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPei.c b/UefiCpuPkg/CpuMpPei/CpuMpPe= i.c > index d4786979fa..dfc0128361 100644 > --- a/UefiCpuPkg/CpuMpPei/CpuMpPei.c > +++ b/UefiCpuPkg/CpuMpPei/CpuMpPei.c > @@ -1,7 +1,7 @@ > /** @file > CPU PEI Module installs CPU Multiple Processor PPI. > =20 > - Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved.
> + Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.
> SPDX-License-Identifier: BSD-2-Clause-Patent > =20 > **/ > @@ -411,24 +411,6 @@ PeiWhoAmI ( > return MpInitLibWhoAmI (ProcessorNumber); > } > =20 > -/** > - Get GDT register value. > - > - This function is mainly for AP purpose because AP may have different G= DT > - table than BSP. > - > - @param[in,out] Buffer The pointer to private data buffer. > - > -**/ > -VOID > -EFIAPI > -GetGdtr ( > - IN OUT VOID *Buffer > - ) > -{ > - AsmReadGdtr ((IA32_DESCRIPTOR *)Buffer); > -} > - > /** > Initializes CPU exceptions handlers for the sake of stack switch requ= irement. > =20 > @@ -444,27 +426,17 @@ InitializeExceptionStackSwitchHandlers ( > IN OUT VOID *Buffer > ) > { > - CPU_EXCEPTION_INIT_DATA *EssData; > - IA32_DESCRIPTOR Idtr; > - EFI_STATUS Status; > + SWITCH_STACK_DATA *SwitchStackData; > =20 > - EssData =3D Buffer; > - // > - // We don't plan to replace IDT table with a new one, but we should no= t assume > - // the AP's IDT is the same as BSP's IDT either. > - // > - AsmReadIdtr (&Idtr); > - EssData->Ia32.IdtTable =3D (VOID *)Idtr.Base; > - EssData->Ia32.IdtTableSize =3D Idtr.Limit + 1; > - Status =3D InitializeSeparateExceptionStacks (EssD= ata); > - ASSERT_EFI_ERROR (Status); > + SwitchStackData =3D (SWITCH_STACK_DATA *)Buffer; > + InitializeSeparateExceptionStacks (SwitchStackData->Buffer, SwitchStac= kData->BufferSize); > } > =20 > /** > Initializes MP exceptions handlers for the sake of stack switch requi= rement. > =20 > This function will allocate required resources required to setup stac= k switch > - and pass them through CPU_EXCEPTION_INIT_DATA to each logic processor. > + and pass them through SwitchStackData to each logic processor. > =20 > **/ > VOID > @@ -472,18 +444,14 @@ InitializeMpExceptionStackSwitchHandlers ( > VOID > ) > { > - EFI_STATUS Status; > - UINTN Index; > - UINTN Bsp; > - UINTN ExceptionNumber; > - UINTN OldGdtSize; > - UINTN NewGdtSize; > - UINTN NewStackSize; > - IA32_DESCRIPTOR Gdtr; > - CPU_EXCEPTION_INIT_DATA EssData; > - UINT8 *GdtBuffer; > - UINT8 *StackTop; > - UINTN NumberOfProcessors; > + UINTN Index; > + UINTN Bsp; > + UINT8 *Buffer; > + SWITCH_STACK_DATA SwitchStackData; > + UINTN BufferSize; > + > + SwitchStackData.BufferSize =3D &BufferSize; > + UINTN NumberOfProcessors; > =20 > if (!PcdGetBool (PcdCpuStackGuard)) { > return; > @@ -492,128 +460,48 @@ InitializeMpExceptionStackSwitchHandlers ( > MpInitLibGetNumberOfProcessors (&NumberOfProcessors, NULL); > MpInitLibWhoAmI (&Bsp); > =20 > - ExceptionNumber =3D FixedPcdGetSize (PcdCpuStackSwitchExceptionList); > - NewStackSize =3D FixedPcdGet32 (PcdCpuKnownGoodStackSize) * Excepti= onNumber; > - > - StackTop =3D AllocatePages (EFI_SIZE_TO_PAGES (NewStackSize * NumberOf= Processors)); > - ASSERT (StackTop !=3D NULL); > - if (StackTop =3D=3D NULL) { > - return; > - } > - > - StackTop +=3D NewStackSize * NumberOfProcessors; > - > - // > - // The default exception handlers must have been initialized. Let's ju= st skip > - // it in this method. > - // > - EssData.Ia32.Revision =3D CPU_EXCEPTION_INIT_DATA_REV; > - EssData.Ia32.InitDefaultHandlers =3D FALSE; > - > - EssData.Ia32.StackSwitchExceptions =3D FixedPcdGetPtr (PcdCpuStac= kSwitchExceptionList); > - EssData.Ia32.StackSwitchExceptionNumber =3D ExceptionNumber; > - EssData.Ia32.KnownGoodStackSize =3D FixedPcdGet32 (PcdCpuKnown= GoodStackSize); > - > - // > - // Initialize Gdtr to suppress incorrect compiler/analyzer warnings. > - // > - Gdtr.Base =3D 0; > - Gdtr.Limit =3D 0; > for (Index =3D 0; Index < NumberOfProcessors; ++Index) { > - // > - // To support stack switch, we need to re-construct GDT but not IDT. > - // > + SwitchStackData.Buffer =3D NULL; > + BufferSize =3D 0; > + > if (Index =3D=3D Bsp) { > - GetGdtr (&Gdtr); > + InitializeExceptionStackSwitchHandlers (&SwitchStackData); > } else { > // > - // AP might have different size of GDT from BSP. > + // AP might need different buffer size from BSP. > // > - MpInitLibStartupThisAP (GetGdtr, Index, NULL, 0, (VOID *)&Gdtr, NU= LL); > + MpInitLibStartupThisAP (InitializeExceptionStackSwitchHandlers, In= dex, NULL, 0, (VOID *)&SwitchStackData, NULL); > } > =20 > - // > - // X64 needs only one TSS of current task working for all exceptions > - // because of its IST feature. IA32 needs one TSS for each exception > - // in addition to current task. Since AP is not supposed to allocate > - // memory, we have to do it in BSP. To simplify the code, we allocat= e > - // memory for IA32 case to cover both IA32 and X64 exception stack > - // switch. > - // > - // Layout of memory to allocate for each processor: > - // -------------------------------- > - // | Alignment | (just in case) > - // -------------------------------- > - // | | > - // | Original GDT | > - // | | > - // -------------------------------- > - // | Current task descriptor | > - // -------------------------------- > - // | | > - // | Exception task descriptors | X ExceptionNumber > - // | | > - // -------------------------------- > - // | Current task-state segment | > - // -------------------------------- > - // | | > - // | Exception task-state segment | X ExceptionNumber > - // | | > - // -------------------------------- > - // > - OldGdtSize =3D Gdtr.Limit + 1; > - EssData.Ia32.ExceptionTssDescSize =3D sizeof (IA32_TSS_DESCRIPTOR) * > - (ExceptionNumber + 1); > - EssData.Ia32.ExceptionTssSize =3D sizeof (IA32_TASK_STATE_SEGMENT) * > - (ExceptionNumber + 1); > - NewGdtSize =3D sizeof (IA32_TSS_DESCRIPTOR) + > - OldGdtSize + > - EssData.Ia32.ExceptionTssDescSize + > - EssData.Ia32.ExceptionTssSize; > - > - Status =3D PeiServicesAllocatePool ( > - NewGdtSize, > - (VOID **)&GdtBuffer > - ); > - ASSERT (GdtBuffer !=3D NULL); > - if (EFI_ERROR (Status)) { > - ASSERT_EFI_ERROR (Status); > - return; > + if (BufferSize =3D=3D 0 ) { > + continue; > } > =20 > - // > - // Make sure GDT table alignment > - // > - EssData.Ia32.GdtTable =3D ALIGN_POINTER (GdtBuffer, sizeof (IA32= _TSS_DESCRIPTOR)); > - NewGdtSize -=3D ((UINT8 *)EssData.Ia32.GdtTable - GdtB= uffer); > - EssData.Ia32.GdtTableSize =3D NewGdtSize; > - > - EssData.Ia32.ExceptionTssDesc =3D ((UINT8 *)EssData.Ia32.GdtTable + = OldGdtSize); > - EssData.Ia32.ExceptionTss =3D ((UINT8 *)EssData.Ia32.GdtTable + = OldGdtSize + > - EssData.Ia32.ExceptionTssDescSize); > - > - EssData.Ia32.KnownGoodStackTop =3D (UINTN)StackTop; > + ASSERT (BufferSize !=3D 0); > + Buffer =3D AllocatePages (EFI_SIZE_TO_PAGES (BufferSize)); > + ASSERT (Buffer !=3D NULL); > + ZeroMem (Buffer, EFI_PAGES_TO_SIZE (EFI_SIZE_TO_PAGES (BufferSize)))= ; > + SwitchStackData.Buffer =3D Buffer; > DEBUG (( > DEBUG_INFO, > - "Exception stack top[cpu%lu]: 0x%lX\n", > + "Buffer[cpu%lu] for InitializeExceptionStackSwitchHandlers: 0x%lX = with size 0x%x\n", > (UINT64)(UINTN)Index, > - (UINT64)(UINTN)StackTop > + (UINT64)(UINTN)Buffer, > + (UINT32)BufferSize > )); > =20 > if (Index =3D=3D Bsp) { > - InitializeExceptionStackSwitchHandlers (&EssData); > + InitializeExceptionStackSwitchHandlers (&SwitchStackData); > } else { > MpInitLibStartupThisAP ( > InitializeExceptionStackSwitchHandlers, > Index, > NULL, > 0, > - (VOID *)&EssData, > + (VOID *)&SwitchStackData, > NULL > ); > } > - > - StackTop -=3D NewStackSize; > } > } > =20 > diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPei.h b/UefiCpuPkg/CpuMpPei/CpuMpPe= i.h > index 0649c48d14..f4fe7a3d39 100644 > --- a/UefiCpuPkg/CpuMpPei/CpuMpPei.h > +++ b/UefiCpuPkg/CpuMpPei/CpuMpPei.h > @@ -1,7 +1,7 @@ > /** @file > Definitions to install Multiple Processor PPI. > =20 > - Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved.
> + Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.
> SPDX-License-Identifier: BSD-2-Clause-Patent > =20 > **/ > @@ -31,6 +31,14 @@ > =20 > extern EFI_PEI_PPI_DESCRIPTOR mPeiCpuMpPpiDesc; > =20 > +// > +// Structure for InitializeSeparateExceptionStacks > +// > +typedef struct { > + VOID *Buffer; > + UINTN *BufferSize; > +} SWITCH_STACK_DATA; > + > /** > This service retrieves the number of logical processor in the platfor= m > and the number of those logical processors that are enabled on this b= oot. > diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c b/U= efiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c > index e62bb5e6c0..4b75c42f1e 100644 > --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c > +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c > @@ -104,48 +104,71 @@ RegisterCpuInterruptHandler ( > =20 > /** > Setup separate stacks for certain exception handlers. > + If the input Buffer and BufferSize are both NULL, use global variable = if possible. > =20 > - InitData is optional and processor arch dependent. > - > - @param[in] InitData Pointer to data optional for information abo= ut how > - to assign stacks for certain exception handl= ers. > + @param[in] Buffer Point to buffer used to separate except= ion stack. > + @param[in, out] BufferSize On input, it indicates the byte size of= Buffer. > + If the size is not enough, the return s= tatus will > + be EFI_BUFFER_TOO_SMALL, and output Buf= ferSize > + will be the size it needs. > =20 > @retval EFI_SUCCESS The stacks are assigned successfully. > @retval EFI_UNSUPPORTED This function is not supported. > - > + @retval EFI_BUFFER_TOO_SMALL This BufferSize is too small. > **/ > EFI_STATUS > EFIAPI > InitializeSeparateExceptionStacks ( > - IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL > + IN VOID *Buffer, > + IN OUT UINTN *BufferSize > ) > { > CPU_EXCEPTION_INIT_DATA EssData; > IA32_DESCRIPTOR Idtr; > IA32_DESCRIPTOR Gdtr; > + UINTN NeedBufferSize; > + UINTN StackTop; > + UINT8 *NewGdtTable; > =20 > - if (InitData =3D=3D NULL) { > + AsmReadGdtr (&Gdtr); > + if ((Buffer =3D=3D NULL) && (BufferSize =3D=3D NULL)) { > SetMem (mNewGdt, sizeof (mNewGdt), 0); > - > - AsmReadIdtr (&Idtr); > - AsmReadGdtr (&Gdtr); > - > - EssData.X64.Revision =3D CPU_EXCEPTION_INIT_DATA_R= EV; > - EssData.X64.KnownGoodStackTop =3D (UINTN)mNewStack + sizeof= (mNewStack); > - EssData.X64.KnownGoodStackSize =3D CPU_KNOWN_GOOD_STACK_SIZE= ; > - EssData.X64.StackSwitchExceptions =3D CPU_STACK_SWITCH_EXCEPTIO= N_LIST; > - EssData.X64.StackSwitchExceptionNumber =3D CPU_STACK_SWITCH_EXCEPTIO= N_NUMBER; > - EssData.X64.IdtTable =3D (VOID *)Idtr.Base; > - EssData.X64.IdtTableSize =3D Idtr.Limit + 1; > - EssData.X64.GdtTable =3D mNewGdt; > - EssData.X64.GdtTableSize =3D sizeof (mNewGdt); > - EssData.X64.ExceptionTssDesc =3D mNewGdt + Gdtr.Limit + 1; > - EssData.X64.ExceptionTssDescSize =3D CPU_TSS_DESC_SIZE; > - EssData.X64.ExceptionTss =3D mNewGdt + Gdtr.Limit + 1 = + CPU_TSS_DESC_SIZE; > - EssData.X64.ExceptionTssSize =3D CPU_TSS_SIZE; > - > - InitData =3D &EssData; > + StackTop =3D (UINTN)mNewStack + sizeof (mNewStack); > + NewGdtTable =3D mNewGdt; > + } else { > + if (BufferSize =3D=3D NULL) { > + return EFI_INVALID_PARAMETER; > + } > + > + NeedBufferSize =3D CPU_STACK_SWITCH_EXCEPTION_NUMBER * CPU_KNOWN_GOO= D_STACK_SIZE + // Stack size > + CPU_TSS_DESC_SIZE + CPU_TSS_SIZE + Gdtr.Limit + 1 += // GDT size > + sizeof (IA32_TSS_DESCRIPTOR); = // Make sure GDT table alignment > + if (*BufferSize < NeedBufferSize) { > + *BufferSize =3D NeedBufferSize; > + return EFI_BUFFER_TOO_SMALL; > + } > + > + if (Buffer =3D=3D NULL) { > + return EFI_INVALID_PARAMETER; > + } > + > + StackTop =3D (UINTN)Buffer + CPU_STACK_SWITCH_EXCEPTION_NUMBER * = CPU_KNOWN_GOOD_STACK_SIZE; > + NewGdtTable =3D ALIGN_POINTER (StackTop, sizeof (IA32_TSS_DESCRIPTOR= )); > } > =20 > - return ArchSetupExceptionStack (InitData); > + AsmReadIdtr (&Idtr); > + EssData.X64.KnownGoodStackTop =3D StackTop; > + EssData.X64.KnownGoodStackSize =3D CPU_KNOWN_GOOD_STACK_SIZE; > + EssData.X64.StackSwitchExceptions =3D CPU_STACK_SWITCH_EXCEPTION_= LIST; > + EssData.X64.StackSwitchExceptionNumber =3D CPU_STACK_SWITCH_EXCEPTION_= NUMBER; > + EssData.X64.IdtTable =3D (VOID *)Idtr.Base; // Won't= change IDT table in this function > + EssData.X64.IdtTableSize =3D Idtr.Limit + 1; > + EssData.X64.GdtTable =3D NewGdtTable; > + EssData.X64.GdtTableSize =3D CPU_TSS_DESC_SIZE + CPU_TSS= _SIZE + Gdtr.Limit + 1; > + EssData.X64.ExceptionTssDesc =3D NewGdtTable + Gdtr.Limit + = 1; > + EssData.X64.ExceptionTssDescSize =3D CPU_TSS_DESC_SIZE; > + EssData.X64.ExceptionTss =3D NewGdtTable + Gdtr.Limit + = 1 + CPU_TSS_DESC_SIZE; > + EssData.X64.ExceptionTssSize =3D CPU_TSS_SIZE; > + > + return ArchSetupExceptionStack (&EssData); > } > diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchException= Handler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHan= dler.c > index f13e8e7020..fa62074023 100644 > --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler= .c > +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler= .c > @@ -1,7 +1,7 @@ > /** @file > IA32 CPU Exception Handler functons. > =20 > - Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.
> + Copyright (c) 2012 - 2022, Intel Corporation. All rights reserved.
> SPDX-License-Identifier: BSD-2-Clause-Patent > =20 > **/ > @@ -132,7 +132,6 @@ ArchSetupExceptionStack ( > EXCEPTION_HANDLER_TEMPLATE_MAP TemplateMap; > =20 > if ((StackSwitchData =3D=3D NULL) || > - (StackSwitchData->Ia32.Revision !=3D CPU_EXCEPTION_INIT_DATA_REV) = || > (StackSwitchData->Ia32.KnownGoodStackTop =3D=3D 0) || > (StackSwitchData->Ia32.KnownGoodStackSize =3D=3D 0) || > (StackSwitchData->Ia32.StackSwitchExceptions =3D=3D NULL) || > diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c = b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c > index 494c2ab433..2868560855 100644 > --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c > +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c > @@ -151,25 +151,71 @@ InitializeCpuExceptionHandlers ( > =20 > /** > Setup separate stacks for certain exception handlers. > + If the input Buffer and BufferSize are both NULL, use global variable = if possible. > =20 > - InitData is optional and processor arch dependent. > - > - @param[in] InitData Pointer to data optional for information abo= ut how > - to assign stacks for certain exception handl= ers. > + @param[in] Buffer Point to buffer used to separate except= ion stack. > + @param[in, out] BufferSize On input, it indicates the byte size of= Buffer. > + If the size is not enough, the return s= tatus will > + be EFI_BUFFER_TOO_SMALL, and output Buf= ferSize > + will be the size it needs. > =20 > @retval EFI_SUCCESS The stacks are assigned successfully. > @retval EFI_UNSUPPORTED This function is not supported. > - > + @retval EFI_BUFFER_TOO_SMALL This BufferSize is too small. > **/ > EFI_STATUS > EFIAPI > InitializeSeparateExceptionStacks ( > - IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL > + IN VOID *Buffer, > + IN OUT UINTN *BufferSize > ) > { > - if (InitData =3D=3D NULL) { > + CPU_EXCEPTION_INIT_DATA EssData; > + IA32_DESCRIPTOR Idtr; > + IA32_DESCRIPTOR Gdtr; > + UINTN NeedBufferSize; > + UINTN StackTop; > + UINT8 *NewGdtTable; > + > + if ((Buffer =3D=3D NULL) && (BufferSize =3D=3D NULL)) { > return EFI_UNSUPPORTED; > } > =20 > - return ArchSetupExceptionStack (InitData); > + if (BufferSize =3D=3D NULL) { > + return EFI_INVALID_PARAMETER; > + } > + > + AsmReadGdtr (&Gdtr); > + > + NeedBufferSize =3D CPU_STACK_SWITCH_EXCEPTION_NUMBER * CPU_KNOWN_GOOD_= STACK_SIZE + // Stack size > + CPU_TSS_DESC_SIZE + CPU_TSS_SIZE + Gdtr.Limit + 1 + = // GDT size > + sizeof (IA32_TSS_DESCRIPTOR); = // Make sure GDT table alignment > + > + if (*BufferSize < NeedBufferSize) { > + *BufferSize =3D NeedBufferSize; > + return EFI_BUFFER_TOO_SMALL; > + } > + > + if (Buffer =3D=3D NULL) { > + return EFI_INVALID_PARAMETER; > + } > + > + StackTop =3D (UINTN)Buffer + CPU_STACK_SWITCH_EXCEPTION_NUMBER * CP= U_KNOWN_GOOD_STACK_SIZE; > + NewGdtTable =3D ALIGN_POINTER (StackTop, sizeof (IA32_TSS_DESCRIPTOR))= ; > + > + AsmReadIdtr (&Idtr); > + EssData.X64.KnownGoodStackTop =3D StackTop; > + EssData.X64.KnownGoodStackSize =3D CPU_KNOWN_GOOD_STACK_SIZE; > + EssData.X64.StackSwitchExceptions =3D CPU_STACK_SWITCH_EXCEPTION_= LIST; > + EssData.X64.StackSwitchExceptionNumber =3D CPU_STACK_SWITCH_EXCEPTION_= NUMBER; > + EssData.X64.IdtTable =3D (VOID *)Idtr.Base; // Won't= change IDT table in this function > + EssData.X64.IdtTableSize =3D Idtr.Limit + 1; > + EssData.X64.GdtTable =3D NewGdtTable; > + EssData.X64.GdtTableSize =3D CPU_TSS_DESC_SIZE + CPU_TSS= _SIZE + Gdtr.Limit + 1; > + EssData.X64.ExceptionTssDesc =3D NewGdtTable + Gdtr.Limit + = 1; > + EssData.X64.ExceptionTssDescSize =3D CPU_TSS_DESC_SIZE; > + EssData.X64.ExceptionTss =3D NewGdtTable + Gdtr.Limit + = 1 + CPU_TSS_DESC_SIZE; > + EssData.X64.ExceptionTssSize =3D CPU_TSS_SIZE; > + > + return ArchSetupExceptionStack (&EssData); > } > diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHan= dlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHand= lerLib.inf > index cf5bfe4083..7c2ec3b2db 100644 > --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib= .inf > +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib= .inf > @@ -1,7 +1,7 @@ > ## @file > # CPU Exception Handler library instance for PEI module. > # > -# Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved. > +# Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved. > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > ## > @@ -56,6 +56,8 @@ > =20 > [Pcd] > gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard # CONSUMES > + gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize > + gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList > =20 > [FeaturePcd] > gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard ## C= ONSUMES > diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException= .c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c > index 4313cc5582..ad5e0e9ed4 100644 > --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c > +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c > @@ -201,20 +201,23 @@ RegisterCpuInterruptHandler ( > =20 > /** > Setup separate stacks for certain exception handlers. > + If the input Buffer and BufferSize are both NULL, use global variable = if possible. > =20 > - InitData is optional and processor arch dependent. > - > - @param[in] InitData Pointer to data optional for information abo= ut how > - to assign stacks for certain exception handl= ers. > + @param[in] Buffer Point to buffer used to separate except= ion stack. > + @param[in, out] BufferSize On input, it indicates the byte size of= Buffer. > + If the size is not enough, the return s= tatus will > + be EFI_BUFFER_TOO_SMALL, and output Buf= ferSize > + will be the size it needs. > =20 > @retval EFI_SUCCESS The stacks are assigned successfully. > @retval EFI_UNSUPPORTED This function is not supported. > - > + @retval EFI_BUFFER_TOO_SMALL This BufferSize is too small. > **/ > EFI_STATUS > EFIAPI > InitializeSeparateExceptionStacks ( > - IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL > + IN VOID *Buffer, > + IN OUT UINTN *BufferSize > ) > { > return EFI_UNSUPPORTED; > diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c b/U= efiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c > index 1c97dab926..46a86ad2c6 100644 > --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c > +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c > @@ -97,20 +97,23 @@ RegisterCpuInterruptHandler ( > =20 > /** > Setup separate stacks for certain exception handlers. > + If the input Buffer and BufferSize are both NULL, use global variable = if possible. > =20 > - InitData is optional and processor arch dependent. > - > - @param[in] InitData Pointer to data optional for information abo= ut how > - to assign stacks for certain exception handl= ers. > + @param[in] Buffer Point to buffer used to separate except= ion stack. > + @param[in, out] BufferSize On input, it indicates the byte size of= Buffer. > + If the size is not enough, the return s= tatus will > + be EFI_BUFFER_TOO_SMALL, and output Buf= ferSize > + will be the size it needs. > =20 > @retval EFI_SUCCESS The stacks are assigned successfully. > @retval EFI_UNSUPPORTED This function is not supported. > - > + @retval EFI_BUFFER_TOO_SMALL This BufferSize is too small. > **/ > EFI_STATUS > EFIAPI > InitializeSeparateExceptionStacks ( > - IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL > + IN VOID *Buffer, > + IN OUT UINTN *BufferSize > ) > { > return EFI_UNSUPPORTED; > diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionH= andler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandl= er.c > index cd7dccd481..ff0dde4f12 100644 > --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.= c > +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.= c > @@ -1,7 +1,7 @@ > /** @file > x64 CPU Exception Handler. > =20 > - Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.
> + Copyright (c) 2012 - 2022, Intel Corporation. All rights reserved.
> SPDX-License-Identifier: BSD-2-Clause-Patent > =20 > **/ > @@ -136,7 +136,6 @@ ArchSetupExceptionStack ( > UINTN GdtSize; > =20 > if ((StackSwitchData =3D=3D NULL) || > - (StackSwitchData->Ia32.Revision !=3D CPU_EXCEPTION_INIT_DATA_REV) = || > (StackSwitchData->X64.KnownGoodStackTop =3D=3D 0) || > (StackSwitchData->X64.KnownGoodStackSize =3D=3D 0) || > (StackSwitchData->X64.StackSwitchExceptions =3D=3D NULL) ||