Okay, I've tested the patch with the firmware from the commit mentioned above and it doesn't work. The VPU clock divisor bit needs PcdSerialClockRate to be set to 1 GHz (so that the quotient becomes equal to the core clock).&nbsp;<br /><br />The mailbox on the other hand always returns 200 MHz for the core clock. This is definitely a bug, which got fixed it in a later commit.<br /><br />There isn't any reliable way to support the firmwares with a broken mailbox interface as well in this case, and I really doubt anyone would want to use them with the UEFI in the first place. Your build scripts always include the latest version.<br /><br />I can resend the patch with a more detailed commit message if you wish.