From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=209.85.221.67; helo=mail-wr1-f67.google.com; envelope-from=philmd@redhat.com; receiver=edk2-devel@lists.01.org Received: from mail-wr1-f67.google.com (mail-wr1-f67.google.com [209.85.221.67]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 49E172119F05B for ; Fri, 14 Dec 2018 06:16:56 -0800 (PST) Received: by mail-wr1-f67.google.com with SMTP id s12so5153620wrt.4 for ; Fri, 14 Dec 2018 06:16:56 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:openpgp:message-id :date:user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=GRMpo6KqgBjdYVScH/RqzaDJReXCR6ETySsdGccauPg=; b=fh5lVVyg/hy20oB+awhKtoz5/9n7fOIynOQcLbPg0blAQioKa31Z6mDBym+pwZKF2o uNOOd0DUDmdFaVpVI0vM6WI4V+2c99lVKF29rmTCS5/n6fRgXWv6YINJ8faR61ht7ayU h2ltqs1HNAVqGsxlhxXAW9mfvmE9gtQiwlcYYFg9/1Mbn+DyHLe0klYIByVrSQyD12q3 eons6S2g24fCSGp4xp9VbixQpaQXxNRQVfjGfPSw27Zez3SQFmZa3R1MfrQYS+B9dtZm AGYNa3q9EWCEm51iQWk6IGyApxniXY3t+AOlwr3NWaRsZ/6YrAtIWUajMQSJvVH3+PHy IMoQ== X-Gm-Message-State: AA+aEWauu2tYfdY7hES9l/icw1K6vCz/8n0y3iRLLV72wijPsd6WQnid h4XoMukMD+oOWV233njG90RtATthcbs= X-Google-Smtp-Source: AFSGD/UcpDKZA1qTH71UwoilSDQf57YccwtnumAr+U8L1isby/mbg+q83JEyDjfROPSf/i9Y98IScw== X-Received: by 2002:adf:900f:: with SMTP id h15mr2771596wrh.18.1544797014591; Fri, 14 Dec 2018 06:16:54 -0800 (PST) Received: from [192.168.1.34] (172.red-88-21-202.staticip.rima-tde.net. [88.21.202.172]) by smtp.gmail.com with ESMTPSA id y34sm11920735wrd.68.2018.12.14.06.16.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 14 Dec 2018 06:16:54 -0800 (PST) To: Ruiyu Ni , edk2-devel@lists.01.org Cc: Hao A Wu References: <20181212151015.117308-1-ruiyu.ni@intel.com> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Openpgp: id=89C1E78F601EE86C867495CBA2A3FD6EDEADC0DE; url=http://pgp.mit.edu/pks/lookup?op=get&search=0xA2A3FD6EDEADC0DE Message-ID: <324f48ba-2537-1b90-1f45-43eb0fc0a808@redhat.com> Date: Fri, 14 Dec 2018 15:16:53 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.3.1 MIME-Version: 1.0 In-Reply-To: <20181212151015.117308-1-ruiyu.ni@intel.com> Subject: Re: [PATCH] MdeModulePkg/PciBus: Fix system hang when no PCI Option ROM exists X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 14 Dec 2018 14:16:56 -0000 Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit On 12/12/18 4:10 PM, Ruiyu Ni wrote: > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1394 > > When there is no PCI option ROM exists, today's logic still creates > virtual BAR for option ROM using Length = 0, Alignment = (-1). > It causes the final MEM32 alignment requirement is as big as > 0xFFFFFFFF_FFFFFFFF. > > The patch fixes this issue by only creating virtual BAR for option > ROM when there is PCI option ROM. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ruiyu Ni > Cc: Chiu Chasel > Cc: Hao A Wu > Cc: Jian J Wang > --- > MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 10 ++++++---- > 1 file changed, 6 insertions(+), 4 deletions(-) > > diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c > index 7255bcfbbc..ee5c77147e 100644 > --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c > +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c > @@ -515,10 +515,12 @@ PciHostBridgeResourceAllocator ( > // All devices' Option ROM share the same MEM32 resource. > // > MaxOptionRomSize = GetMaxOptionRomSize (RootBridgeDev); > - RootBridgeDev->PciBar[0].BarType = PciBarTypeOpRom; > - RootBridgeDev->PciBar[0].Length = MaxOptionRomSize; > - RootBridgeDev->PciBar[0].Alignment = MaxOptionRomSize - 1; > - GetResourceFromDevice (RootBridgeDev, IoBridge, Mem32Bridge, PMem32Bridge, Mem64Bridge, PMem64Bridge); > + if (MaxOptionRomSize != 0) { > + RootBridgeDev->PciBar[0].BarType = PciBarTypeOpRom; > + RootBridgeDev->PciBar[0].Length = MaxOptionRomSize; > + RootBridgeDev->PciBar[0].Alignment = MaxOptionRomSize - 1; > + GetResourceFromDevice (RootBridgeDev, IoBridge, Mem32Bridge, PMem32Bridge, Mem64Bridge, PMem64Bridge); > + } > > // > // Create resourcemap by going through all the devices subject to this root bridge > Reviewed-by: Philippe Mathieu-Daudé