[PATCH v2 0/3] various bhyve tweaks and updates

[PATCH v2 0/3] various bhyve tweaks and updates

[Rebecca Cran]

various bhyve tweaks and updates

v2: Added my copyright notice to Real16ToFlat32.asm

Rebecca Cran (3):
  OvmfPkg/Bhyve: Add VariablePolicy engine to Bhyve
  OvmfPkg/Bhyve: Add support for the AMD host bridge
  OvmfPkg/Bhyve: Copy Real16ToFlat32.asm and enable cache in CR0

 OvmfPkg/Bhyve/BhyveX64.dsc                    |   4 +-
 OvmfPkg/Bhyve/PlatformPei/Platform.c          |   3 +-
 .../PlatformBootManagerLibBhyve/BdsPlatform.c |   6 +-
 .../Bhyve/ResetVector/Ia16/Real16ToFlat32.asm | 143 ++++++++++++++++++
 4 files changed, 152 insertions(+), 4 deletions(-)
 create mode 100644 OvmfPkg/Bhyve/ResetVector/Ia16/Real16ToFlat32.asm

-- 
2.29.2

[PATCH v2 1/3] OvmfPkg/Bhyve: Add VariablePolicy engine to Bhyve

[Rebecca Cran]

https://bugzilla.tianocore.org/show_bug.cgi?id=2522

Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
Acked-by: Peter Grehan <grehan@freebsd.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
---
 OvmfPkg/Bhyve/BhyveX64.dsc | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/OvmfPkg/Bhyve/BhyveX64.dsc b/OvmfPkg/Bhyve/BhyveX64.dsc
index 0d7b03ced6ea..c9813097ca32 100644
--- a/OvmfPkg/Bhyve/BhyveX64.dsc
+++ b/OvmfPkg/Bhyve/BhyveX64.dsc
@@ -197,7 +197,8 @@ [LibraryClasses]
   AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableLibNull.inf
 !endif
   VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf
-
+  VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLib.inf
+  VariablePolicyHelperLib|MdeModulePkg/Library/VariablePolicyHelperLib/VariablePolicyHelperLib.inf
 
   #
   # Network libraries
@@ -322,6 +323,7 @@ [LibraryClasses.common.DXE_RUNTIME_DRIVER]
   UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
   PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
+  VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLibRuntimeDxe.inf
 
 [LibraryClasses.common.UEFI_DRIVER]
   PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
-- 
2.29.2

[PATCH v2 2/3] OvmfPkg/Bhyve: Add support for the AMD host bridge

[Rebecca Cran]

On bhyve, either an Intel or AMD host bridge can be specified, with the
default being Intel.
Both are identical, except the AMD one uses a PCI vendor ID of AMD.

Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
Reviewed-by: Peter Grehan <grehan@freebsd.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
---
 OvmfPkg/Bhyve/PlatformPei/Platform.c                      | 3 ++-
 OvmfPkg/Library/PlatformBootManagerLibBhyve/BdsPlatform.c | 6 ++++--
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/OvmfPkg/Bhyve/PlatformPei/Platform.c b/OvmfPkg/Bhyve/PlatformPei/Platform.c
index 11658d478c3b..9f1900626d6b 100644
--- a/OvmfPkg/Bhyve/PlatformPei/Platform.c
+++ b/OvmfPkg/Bhyve/PlatformPei/Platform.c
@@ -349,7 +349,8 @@ MiscInitialization (
   // Determine platform type and save Host Bridge DID to PCD
   //
   switch (mHostBridgeDevId) {
-    case 0x1275: // BHYVE
+    case 0x7432: // BHYVE (AMD hostbridge)
+    case 0x1275: // BHYVE (Intel hostbridge)
     case INTEL_82441_DEVICE_ID:
       PmCmd      = POWER_MGMT_REGISTER_PIIX4 (PCI_COMMAND_OFFSET);
       Pmba       = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMBA);
diff --git a/OvmfPkg/Library/PlatformBootManagerLibBhyve/BdsPlatform.c b/OvmfPkg/Library/PlatformBootManagerLibBhyve/BdsPlatform.c
index 3b94630ac732..eaade4adeae2 100644
--- a/OvmfPkg/Library/PlatformBootManagerLibBhyve/BdsPlatform.c
+++ b/OvmfPkg/Library/PlatformBootManagerLibBhyve/BdsPlatform.c
@@ -1066,7 +1066,8 @@ SetPciIntLine (
     // and should match SeaBIOS src/fw/pciinit.c *_pci_slot_get_irq()
     //
     switch (mHostBridgeDevId) {
-      case 0x1275: // BHYVE
+      case 0x7432: // BHYVE (AMD hostbridge)
+      case 0x1275: // BHYVE (Intel hostbridge)
       case INTEL_82441_DEVICE_ID:
         Idx -= 1;
         break;
@@ -1143,7 +1144,8 @@ PciAcpiInitialization (
   //
   mHostBridgeDevId = PcdGet16 (PcdOvmfHostBridgePciDevId);
   switch (mHostBridgeDevId) {
-    case 0x1275: // BHYVE
+    case 0x7432: // BHYVE (AMD hostbridge)
+    case 0x1275: // BHYVE (Intel hostbridge)
     case INTEL_82441_DEVICE_ID:
       Pmba = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMBA);
       //
-- 
2.29.2

[PATCH v2 3/3] OvmfPkg/Bhyve: Copy Real16ToFlat32.asm and enable cache in CR0

[Rebecca Cran]

Copy UefiCpuPkg/ResetVector/Vtf0/Ia16/Real16ToFlat32.asm to
OvmfPkg/Bhyve/ResetVector/Ia16, with one change, as has also been
made in XenResetVector:

  - SEC_DEFAULT_CR0: enable cache (bit 30 or CD set to 0)

With the CD bit set to 1, this has the downside on AMD systems of
actually running with the cache disabled, which slows the entire system
to a crawl.
There's no need for this bit to be set in virtualized
environments.

This patch reapplies the change from the freebsd uefi-edk2 repo at
https://github.com/freebsd/uefi-edk2/commit/08c00f4e8d9e3e469bdc2ce92d3aa839cae7cf17

Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
Reviewed-by: Peter Grehan <grehan@freebsd.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
---
 .../Bhyve/ResetVector/Ia16/Real16ToFlat32.asm | 143 ++++++++++++++++++
 1 file changed, 143 insertions(+)
 create mode 100644 OvmfPkg/Bhyve/ResetVector/Ia16/Real16ToFlat32.asm

diff --git a/OvmfPkg/Bhyve/ResetVector/Ia16/Real16ToFlat32.asm b/OvmfPkg/Bhyve/ResetVector/Ia16/Real16ToFlat32.asm
new file mode 100644
index 000000000000..580fe068e7e1
--- /dev/null
+++ b/OvmfPkg/Bhyve/ResetVector/Ia16/Real16ToFlat32.asm
@@ -0,0 +1,143 @@
+;------------------------------------------------------------------------------
+; @file
+; Transition from 16 bit real mode into 32 bit flat protected mode
+;
+; Copyright (c) 2020, Rebecca Cran <rebecca@bsdio.com>. All rights reserved.<BR>
+; Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+%define SEC_DEFAULT_CR0  0x00000023
+%define SEC_DEFAULT_CR4  0x640
+
+BITS    16
+
+;
+; Modified:  EAX, EBX
+;
+; @param[out]     DS       Selector allowing flat access to all addresses
+; @param[out]     ES       Selector allowing flat access to all addresses
+; @param[out]     FS       Selector allowing flat access to all addresses
+; @param[out]     GS       Selector allowing flat access to all addresses
+; @param[out]     SS       Selector allowing flat access to all addresses
+;
+TransitionFromReal16To32BitFlat:
+
+    debugShowPostCode POSTCODE_16BIT_MODE
+
+    cli
+
+    mov     bx, 0xf000
+    mov     ds, bx
+
+    mov     bx, ADDR16_OF(gdtr)
+
+o32 lgdt    [cs:bx]
+
+    mov     eax, SEC_DEFAULT_CR0
+    mov     cr0, eax
+
+    jmp     LINEAR_CODE_SEL:dword ADDR_OF(jumpTo32BitAndLandHere)
+BITS    32
+jumpTo32BitAndLandHere:
+
+    mov     eax, SEC_DEFAULT_CR4
+    mov     cr4, eax
+
+    debugShowPostCode POSTCODE_32BIT_MODE
+
+    mov     ax, LINEAR_SEL
+    mov     ds, ax
+    mov     es, ax
+    mov     fs, ax
+    mov     gs, ax
+    mov     ss, ax
+
+    OneTimeCallRet TransitionFromReal16To32BitFlat
+
+ALIGN   2
+
+gdtr:
+    dw      GDT_END - GDT_BASE - 1   ; GDT limit
+    dd      ADDR_OF(GDT_BASE)
+
+ALIGN   16
+
+;
+; Macros for GDT entries
+;
+
+%define  PRESENT_FLAG(p) (p << 7)
+%define  DPL(dpl) (dpl << 5)
+%define  SYSTEM_FLAG(s) (s << 4)
+%define  DESC_TYPE(t) (t)
+
+; Type: data, expand-up, writable, accessed
+%define  DATA32_TYPE 3
+
+; Type: execute, readable, expand-up, accessed
+%define  CODE32_TYPE 0xb
+
+; Type: execute, readable, expand-up, accessed
+%define  CODE64_TYPE 0xb
+
+%define  GRANULARITY_FLAG(g) (g << 7)
+%define  DEFAULT_SIZE32(d) (d << 6)
+%define  CODE64_FLAG(l) (l << 5)
+%define  UPPER_LIMIT(l) (l)
+
+;
+; The Global Descriptor Table (GDT)
+;
+
+GDT_BASE:
+; null descriptor
+NULL_SEL            equ $-GDT_BASE
+    DW      0            ; limit 15:0
+    DW      0            ; base 15:0
+    DB      0            ; base 23:16
+    DB      0            ; sys flag, dpl, type
+    DB      0            ; limit 19:16, flags
+    DB      0            ; base 31:24
+
+; linear data segment descriptor
+LINEAR_SEL          equ $-GDT_BASE
+    DW      0xffff       ; limit 15:0
+    DW      0            ; base 15:0
+    DB      0            ; base 23:16
+    DB      PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(DATA32_TYPE)
+    DB      GRANULARITY_FLAG(1)|DEFAULT_SIZE32(1)|CODE64_FLAG(0)|UPPER_LIMIT(0xf)
+    DB      0            ; base 31:24
+
+; linear code segment descriptor
+LINEAR_CODE_SEL     equ $-GDT_BASE
+    DW      0xffff       ; limit 15:0
+    DW      0            ; base 15:0
+    DB      0            ; base 23:16
+    DB      PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE32_TYPE)
+    DB      GRANULARITY_FLAG(1)|DEFAULT_SIZE32(1)|CODE64_FLAG(0)|UPPER_LIMIT(0xf)
+    DB      0            ; base 31:24
+
+%ifdef ARCH_X64
+; linear code (64-bit) segment descriptor
+LINEAR_CODE64_SEL   equ $-GDT_BASE
+    DW      0xffff       ; limit 15:0
+    DW      0            ; base 15:0
+    DB      0            ; base 23:16
+    DB      PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE64_TYPE)
+    DB      GRANULARITY_FLAG(1)|DEFAULT_SIZE32(0)|CODE64_FLAG(1)|UPPER_LIMIT(0xf)
+    DB      0            ; base 31:24
+%endif
+
+; linear code segment descriptor
+LINEAR_CODE16_SEL     equ $-GDT_BASE
+    DW      0xffff       ; limit 15:0
+    DW      0            ; base 15:0
+    DB      0            ; base 23:16
+    DB      PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE32_TYPE)
+    DB      GRANULARITY_FLAG(1)|DEFAULT_SIZE32(0)|CODE64_FLAG(0)|UPPER_LIMIT(0xf)
+    DB      0            ; base 31:24
+
+GDT_END:
+
-- 
2.29.2

Re: [PATCH v2 0/3] various bhyve tweaks and updates

[Laszlo Ersek]

On 11/24/20 01:57, Rebecca Cran wrote:
> various bhyve tweaks and updates
> 
> v2: Added my copyright notice to Real16ToFlat32.asm
> 
> Rebecca Cran (3):
>   OvmfPkg/Bhyve: Add VariablePolicy engine to Bhyve
>   OvmfPkg/Bhyve: Add support for the AMD host bridge
>   OvmfPkg/Bhyve: Copy Real16ToFlat32.asm and enable cache in CR0
> 
>  OvmfPkg/Bhyve/BhyveX64.dsc                    |   4 +-
>  OvmfPkg/Bhyve/PlatformPei/Platform.c          |   3 +-
>  .../PlatformBootManagerLibBhyve/BdsPlatform.c |   6 +-
>  .../Bhyve/ResetVector/Ia16/Real16ToFlat32.asm | 143 ++++++++++++++++++
>  4 files changed, 152 insertions(+), 4 deletions(-)
>  create mode 100644 OvmfPkg/Bhyve/ResetVector/Ia16/Real16ToFlat32.asm
> 

Can this whole set wait until after edk2-stable202011, or would you like
me to merge patch#1 ("OvmfPkg/Bhyve: Add VariablePolicy engine to
Bhyve") in isolation, during the Hard Feature Freeze? (It definitely
qualifies, because it fixes a build regression caused by the patches for
TianoCore#2522.)

I don't think we should merge patches #2 and #3 during the HFF.

Thanks
Laszlo

Re: [edk2-devel] [PATCH v2 0/3] various bhyve tweaks and updates

[Rebecca Cran]

On 11/23/20 6:04 PM, Laszlo Ersek wrote:
>
> Can this whole set wait until after edk2-stable202011, or would you like
> me to merge patch#1 ("OvmfPkg/Bhyve: Add VariablePolicy engine to
> Bhyve") in isolation, during the Hard Feature Freeze? (It definitely
> qualifies, because it fixes a build regression caused by the patches for
> TianoCore#2522.)
>
> I don't think we should merge patches #2 and #3 during the HFF.

I'm not sure it makes sense to have patch #1 without #3 to make it 
usable on AMD, so let's leave the whole set until after the stable tag. 
We can leave bhyve users on 2014.SP1 firmware a few days longer :)


-- 
Rebecca Cran

Re: [edk2-devel] [PATCH v2 0/3] various bhyve tweaks and updates

[Laszlo Ersek]

On 11/24/20 02:19, Rebecca Cran wrote:
> On 11/23/20 6:04 PM, Laszlo Ersek wrote:
>>
>> Can this whole set wait until after edk2-stable202011, or would you like
>> me to merge patch#1 ("OvmfPkg/Bhyve: Add VariablePolicy engine to
>> Bhyve") in isolation, during the Hard Feature Freeze? (It definitely
>> qualifies, because it fixes a build regression caused by the patches for
>> TianoCore#2522.)
>>
>> I don't think we should merge patches #2 and #3 during the HFF.
> 
> I'm not sure it makes sense to have patch #1 without #3 to make it
> usable on AMD, so let's leave the whole set until after the stable tag.
> We can leave bhyve users on 2014.SP1 firmware a few days longer :)
> 
> 

OK, thanks!
Laszlo

Re: [edk2-devel] [PATCH v2 0/3] various bhyve tweaks and updates

[Laszlo Ersek]

On 11/24/20 02:19, Rebecca Cran wrote:
> On 11/23/20 6:04 PM, Laszlo Ersek wrote:
>>
>> Can this whole set wait until after edk2-stable202011, or would you like
>> me to merge patch#1 ("OvmfPkg/Bhyve: Add VariablePolicy engine to
>> Bhyve") in isolation, during the Hard Feature Freeze? (It definitely
>> qualifies, because it fixes a build regression caused by the patches for
>> TianoCore#2522.)
>>
>> I don't think we should merge patches #2 and #3 during the HFF.
> 
> I'm not sure it makes sense to have patch #1 without #3 to make it
> usable on AMD, so let's leave the whole set until after the stable tag.
> We can leave bhyve users on 2014.SP1 firmware a few days longer :)
> 
> 

Series merged as commit range 872f953262d6..73b604bb1e13, via
<https://github.com/tianocore/edk2/pull/1150>.

Thanks!
Laszlo