From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=217.140.101.70; helo=foss.arm.com; envelope-from=marc.zyngier@arm.com; receiver=edk2-devel@lists.01.org Received: from foss.arm.com (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by ml01.01.org (Postfix) with ESMTP id 78F5C2095606B for ; Thu, 15 Mar 2018 02:56:12 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 309B380D; Thu, 15 Mar 2018 03:02:36 -0700 (PDT) Received: from [10.1.206.75] (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3FF963F24A; Thu, 15 Mar 2018 03:02:35 -0700 (PDT) To: Ard Biesheuvel Cc: Guo Heyi , "edk2-devel@lists.01.org" , Yi Li , Leif Lindholm References: <1520901090-96694-1-git-send-email-heyi.guo@linaro.org> <1520901090-96694-2-git-send-email-heyi.guo@linaro.org> <0403f2bf-d6a8-b101-73a2-949946f71e46@arm.com> <20180314002509.GE96299@SZX1000114654> <86a7vbaynt.wl-marc.zyngier@arm.com> <20180315071133.GD108227@SZX1000114654> <147790b3-379c-81b8-57e1-f7b5d99b9db7@arm.com> From: Marc Zyngier Organization: ARM Ltd Message-ID: <360308f0-babf-5428-4d0b-9b0c6b6fc0a4@arm.com> Date: Thu, 15 Mar 2018 10:02:33 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 MIME-Version: 1.0 In-Reply-To: Subject: Re: [PATCH v2 1/1] ArmPkg/TimerDxe: Add ISB for timer compare value reload X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 15 Mar 2018 09:56:12 -0000 Content-Type: text/plain; charset=utf-8 Content-Language: en-GB Content-Transfer-Encoding: 7bit On 15/03/18 09:52, Ard Biesheuvel wrote: > On 15 March 2018 at 09:40, Marc Zyngier wrote: >> On 15/03/18 07:30, Ard Biesheuvel wrote: >>> On 15 March 2018 at 07:11, Guo Heyi wrote: >>>> Hi Marc and Ard, >>>> >>>> I found the timer re-enable code was added by Ard for special reason: >>>> >>>> commit b1a633434ddc5fc28de817debd963f7845fb78c7 >>>> Author: Ard Biesheuvel >>>> Date: Thu Sep 18 21:16:47 2014 +0000 >>>> >>>> ArmPkg/TimerDxe: add workaround for KVM timer interrupt handling >>>> >>>> So this line of code cannot be removed and I will add an ISB after enabling >>>> timer. >>>> >>> >>> I'm not sure. IIUC, the KVM issue that required this has been fixed >>> long ago, and I don't want to carry this forever. Marc? >> >> This has been fixed quite a while ago: >> >> commit f120cd6533d21075ab103ae6c225b1697853660d >> Author: Marc Zyngier >> Date: Mon Jun 23 13:59:13 2014 +0100 >> >> KVM: arm/arm64: timer: Allow the timer to control the active state >> >> In order to remove the crude hack where we sneak the masked bit >> into the timer's control register, make use of the phys_irq_map >> API control the active state of the interrupt. >> >> This causes some limited changes to allow for potential error >> propagation. >> >> Reviewed-by: Christoffer Dall >> Signed-off-by: Marc Zyngier >> > > Does this mean we can lose this as well? > > https://github.com/tianocore/edk2/blob/master/ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.c#L31 Indeed, you should be able to remove this as well. Thanks, M. -- Jazz is not dead. It just smells funny...