From: "Lendacky, Thomas" <thomas.lendacky@amd.com>
To: devel@edk2.groups.io
Cc: Jordan Justen <jordan.l.justen@intel.com>,
Laszlo Ersek <lersek@redhat.com>,
Ard Biesheuvel <ard.biesheuvel@linaro.org>,
Michael D Kinney <michael.d.kinney@intel.com>,
Liming Gao <liming.gao@intel.com>,
Eric Dong <eric.dong@intel.com>, Ray Ni <ray.ni@intel.com>,
Brijesh Singh <brijesh.singh@amd.com>
Subject: [PATCH v7 25/43] UefiCpuPkg/CpuExceptionHandler: Add support for DR7 Read/Write NAE events
Date: Wed, 22 Apr 2020 12:41:40 -0500 [thread overview]
Message-ID: <370d00047093eb4d20cf519b0d16008448927c23.1587577317.git.thomas.lendacky@amd.com> (raw)
In-Reply-To: <cover.1587577317.git.thomas.lendacky@amd.com>
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
Under SEV-ES, a DR7 read or write intercept generates a #VC exception.
The #VC handler must provide special support to the guest for this. On
a DR7 write, the #VC handler must cache the value and issue a VMGEXIT
to notify the hypervisor of the write. However, the #VC handler must
not actually set the value of the DR7 register. On a DR7 read, the #VC
handler must return the cached value of the DR7 register to the guest.
VMGEXIT is not invoked for a DR7 register read.
To avoid exception recursion, a #VC exception will not try to read and
push the actual debug registers into the EFI_SYSTEM_CONTEXT_X64 struct
and instead push zeroes. The #VC exception handler does not make use of
the debug registers from saved context.
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
---
.../X64/ArchAMDSevVcHandler.c | 105 ++++++++++++++++++
.../X64/ExceptionHandlerAsm.nasm | 17 +++
2 files changed, 122 insertions(+)
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
index 023e7dc31202..af5567d85593 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
@@ -13,6 +13,16 @@
#define CR4_OSXSAVE (1 << 18)
+#define DR7_RESET_VALUE 0x400
+
+//
+// Per-CPU data mapping structure
+//
+typedef struct {
+ BOOLEAN Dr7Cached;
+ UINT64 Dr7;
+} SEV_ES_PER_CPU_DATA;
+
//
// Instruction execution mode definition
//
@@ -1487,6 +1497,93 @@ RdtscExit (
return 0;
}
+/**
+ Handle a DR7 register write event.
+
+ Use the VMGEXIT instruction to handle a DR7 write event.
+
+ @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communication
+ Block
+ @param[in, out] Regs x64 processor context
+ @param[in] InstructionData Instruction parsing context
+
+ @retval 0 Event handled successfully
+ @retval Others New exception value to propagate
+
+**/
+STATIC
+UINT64
+Dr7WriteExit (
+ IN OUT GHCB *Ghcb,
+ IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs,
+ IN SEV_ES_INSTRUCTION_DATA *InstructionData
+ )
+{
+ SEV_ES_INSTRUCTION_OPCODE_EXT *Ext;
+ SEV_ES_PER_CPU_DATA *SevEsData;
+ INTN *Register;
+ UINT64 Status;
+
+ Ext = &InstructionData->Ext;
+ SevEsData = (SEV_ES_PER_CPU_DATA *) (Ghcb + 1);
+
+ DecodeModRm (Regs, InstructionData);
+
+ /* MOV DRn always treats MOD == 3 no matter how encoded */
+ Register = GetRegisterPointer (Regs, Ext->ModRm.Rm);
+
+ /* Using a value of 0 for ExitInfo1 means RAX holds the value */
+ Ghcb->SaveArea.Rax = *Register;
+ GhcbSetRegValid (Ghcb, GhcbRax);
+
+ Status = VmgExit (Ghcb, SvmExitDr7Write, 0, 0);
+ if (Status) {
+ return Status;
+ }
+
+ SevEsData->Dr7 = *Register;
+ SevEsData->Dr7Cached = TRUE;
+
+ return 0;
+}
+
+/**
+ Handle a DR7 register read event.
+
+ Use the VMGEXIT instruction to handle a DR7 read event.
+
+ @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communication
+ Block
+ @param[in, out] Regs x64 processor context
+ @param[in] InstructionData Instruction parsing context
+
+ @retval 0 Event handled successfully
+
+**/
+STATIC
+UINT64
+Dr7ReadExit (
+ IN OUT GHCB *Ghcb,
+ IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs,
+ IN SEV_ES_INSTRUCTION_DATA *InstructionData
+ )
+{
+ SEV_ES_INSTRUCTION_OPCODE_EXT *Ext;
+ SEV_ES_PER_CPU_DATA *SevEsData;
+ INTN *Register;
+
+ Ext = &InstructionData->Ext;
+ SevEsData = (SEV_ES_PER_CPU_DATA *) (Ghcb + 1);
+
+ DecodeModRm (Regs, InstructionData);
+
+ /* MOV DRn always treats MOD == 3 no matter how encoded */
+ Register = GetRegisterPointer (Regs, Ext->ModRm.Rm);
+ *Register = (SevEsData->Dr7Cached) ? SevEsData->Dr7 : DR7_RESET_VALUE;
+
+ return 0;
+}
+
/**
Common #VC exception handling routine.
@@ -1517,6 +1614,14 @@ DoVcCommon (
ExitCode = Regs->ExceptionData;
switch (ExitCode) {
+ case SvmExitDr7Read:
+ NaeExit = Dr7ReadExit;
+ break;
+
+ case SvmExitDr7Write:
+ NaeExit = Dr7WriteExit;
+ break;
+
case SvmExitRdtsc:
NaeExit = RdtscExit;
break;
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm
index 19198f273137..26cae56cc5cf 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm
@@ -18,6 +18,8 @@
; CommonExceptionHandler()
;
+%define VC_EXCEPTION 29
+
extern ASM_PFX(mErrorCodeFlag) ; Error code flags for exceptions
extern ASM_PFX(mDoFarReturnFlag) ; Do far return flag
extern ASM_PFX(CommonExceptionHandler)
@@ -225,6 +227,9 @@ HasErrorCode:
push rax
;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
+ cmp qword [rbp + 8], VC_EXCEPTION
+ je VcDebugRegs ; For SEV-ES (#VC) Debug registers ignored
+
mov rax, dr7
push rax
mov rax, dr6
@@ -237,7 +242,19 @@ HasErrorCode:
push rax
mov rax, dr0
push rax
+ jmp DrFinish
+VcDebugRegs:
+;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7 are skipped for #VC to avoid exception recursion
+ xor rax, rax
+ push rax
+ push rax
+ push rax
+ push rax
+ push rax
+ push rax
+
+DrFinish:
;; FX_SAVE_STATE_X64 FxSaveState;
sub rsp, 512
mov rdi, rsp
--
2.17.1
next prev parent reply other threads:[~2020-04-22 17:42 UTC|newest]
Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-22 17:41 [PATCH v7 00/43] SEV-ES guest support Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 01/43] MdeModulePkg: Create PCDs to be used in support of SEV-ES Lendacky, Thomas
2020-05-02 8:19 ` [edk2-devel] " Dong, Eric
2020-05-04 13:34 ` Lendacky, Thomas
2020-05-04 13:47 ` Dong, Eric
2020-05-04 16:41 ` Lendacky, Thomas
2020-05-05 15:29 ` Laszlo Ersek
2020-05-06 1:53 ` Dong, Eric
2020-05-06 13:19 ` Lendacky, Thomas
2020-05-06 15:06 ` Dong, Eric
2020-05-06 18:33 ` Lendacky, Thomas
2020-05-07 2:28 ` Dong, Eric
2020-05-07 2:38 ` Dong, Eric
2020-05-08 18:58 ` Lendacky, Thomas
2020-05-06 16:24 ` Laszlo Ersek
2020-04-22 17:41 ` [PATCH v7 02/43] UefiCpuPkg: Create PCD " Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 03/43] MdePkg: Add the MSR definition for the GHCB register Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 04/43] MdePkg: Add a structure definition for the GHCB Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 05/43] MdeModulePkg/DxeIplPeim: Support GHCB pages when creating page tables Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 06/43] MdePkg/BaseLib: Add support for the XGETBV instruction Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 07/43] MdePkg/BaseLib: Add support for the VMGEXIT instruction Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 08/43] UefiCpuPkg: Implement library support for VMGEXIT Lendacky, Thomas
2020-05-09 1:06 ` Dong, Eric
2020-05-09 14:08 ` Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 09/43] OvmfPkg: Prepare OvmfPkg to use the VmgExitLib library Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 10/43] UefiPayloadPkg: Prepare UefiPayloadPkg " Lendacky, Thomas
2020-04-22 17:46 ` [edk2-devel] " Guo Dong
2020-04-22 17:41 ` [PATCH v7 11/43] UefiCpuPkg/CpuExceptionHandler: Add base support for the #VC exception Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 12/43] UefiCpuPkg/CpuExceptionHandler: Add support for IOIO_PROT NAE events Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 13/43] UefiCpuPkg/CpuExceptionHandler: Support string IO " Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 14/43] UefiCpuPkg/CpuExceptionHandler: Add support for CPUID " Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 15/43] UefiCpuPkg/CpuExceptionHandler: Add support for MSR_PROT " Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 16/43] UefiCpuPkg/CpuExceptionHandler: Add support for NPF NAE events (MMIO) Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 17/43] UefiCpuPkg/CpuExceptionHandler: Add support for WBINVD NAE events Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 18/43] UefiCpuPkg/CpuExceptionHandler: Add support for RDTSC " Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 19/43] UefiCpuPkg/CpuExceptionHandler: Add support for RDPMC " Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 20/43] UefiCpuPkg/CpuExceptionHandler: Add support for INVD " Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 21/43] UefiCpuPkg/CpuExceptionHandler: Add support for VMMCALL " Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 22/43] UefiCpuPkg/CpuExceptionHandler: Add support for RDTSCP " Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 23/43] UefiCpuPkg/CpuExceptionHandler: Add support for MONITOR/MONITORX " Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 24/43] UefiCpuPkg/CpuExceptionHandler: Add support for MWAIT/MWAITX " Lendacky, Thomas
2020-04-22 17:41 ` Lendacky, Thomas [this message]
2020-04-22 17:41 ` [PATCH v7 26/43] OvmfPkg/MemEncryptSevLib: Add an SEV-ES guest indicator function Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 27/43] OvmfPkg: Add support to perform SEV-ES initialization Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 28/43] OvmfPkg: Create a GHCB page for use during Sec phase Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 29/43] OvmfPkg/PlatformPei: Reserve GHCB-related areas if S3 is supported Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 30/43] OvmfPkg: Create GHCB pages for use during Pei and Dxe phase Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 31/43] OvmfPkg/PlatformPei: Move early GDT into ram when SEV-ES is enabled Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 32/43] UefiCpuPkg: Create an SEV-ES workarea PCD Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 33/43] OvmfPkg: Reserve a page in memory for the SEV-ES usage Lendacky, Thomas
2020-04-30 18:58 ` [edk2-devel] " Laszlo Ersek
2020-04-30 21:12 ` Lendacky, Thomas
2020-04-30 22:09 ` Lendacky, Thomas
2020-05-05 15:25 ` Laszlo Ersek
2020-05-05 15:15 ` Laszlo Ersek
2020-04-22 17:41 ` [PATCH v7 34/43] OvmfPkg/ResetVector: Add support for a 32-bit SEV check Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 35/43] OvmfPkg/Sec: Add #VC exception handling for Sec phase Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 36/43] OvmfPkg/Sec: Enable cache early to speed up booting Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 37/43] OvmfPkg/QemuFlashFvbServicesRuntimeDxe: Bypass flash detection with SEV-ES is enabled Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 38/43] UefiCpuPkg: Add a 16-bit protected mode code segment descriptor Lendacky, Thomas
2020-04-22 17:41 ` [PATCH v7 39/43] UefiCpuPkg/MpInitLib: Add CPU MP data flag to indicate if SEV-ES is enabled Lendacky, Thomas
2020-04-23 4:33 ` [PATCH v7 40/43] UefiCpuPkg: Allow AP booting under SEV-ES Lendacky, Thomas
2020-04-23 4:33 ` [PATCH v7 41/43] OvmfPkg: Use the SEV-ES work area for the SEV-ES AP reset vector Lendacky, Thomas
2020-04-23 4:33 ` [PATCH v7 42/43] OvmfPkg: Move the GHCB allocations into reserved memory Lendacky, Thomas
2020-04-23 4:33 ` [PATCH v7 43/43] UefiCpuPkg/MpInitLib: Prepare SEV-ES guest APs for OS use Lendacky, Thomas
2020-05-08 19:16 ` [PATCH v7 00/43] SEV-ES guest support Lendacky, Thomas
2020-05-09 6:44 ` Ni, Ray
2020-05-09 14:34 ` Lendacky, Thomas
2020-05-09 19:09 ` [edk2-devel] " Andrew Fish
2020-05-11 5:24 ` Ni, Ray
2020-05-12 14:59 ` Lendacky, Thomas
2020-05-14 13:10 ` Ni, Ray
2020-05-14 17:59 ` Lendacky, Thomas
2020-05-15 5:47 ` Ni, Ray
2020-05-15 14:30 ` Lendacky, Thomas
2020-05-18 20:44 ` Brian J. Johnson
2020-05-20 1:57 ` 回复: " Fan Jeff
2020-05-12 16:49 ` Lendacky, Thomas
2020-05-12 17:44 ` Lendacky, Thomas
2020-05-12 20:10 ` Lendacky, Thomas
2020-05-11 15:37 ` Laszlo Ersek
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