Reviewed-by: Chao Li  <lichao@loongson.cn>


Thanks,
Chao
--------

On 11月 11 2022, at 5:12 δΈ‹εˆ, xianglai li <lixianglai@loongson.cn> wrote:
Use a register to save PeiServicesTable pointer,

This lib Provides PeiServicesTable pointer saving

and retrieval services.



REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054



Cc: Bibo Mao <maobibo@loongson.cn>

Cc: Chao Li <lichao@loongson.cn>

Cc: Leif Lindholm <quic_llindhol@quicinc.com>

Cc: Liming Gao <gaoliming@byosoft.com.cn>

Cc: Michael D Kinney <michael.d.kinney@intel.com>

Signed-off-by: xianglai li <lixianglai@loongson.cn>

---

.../PeiServicesTablePointer.c | 79 +++++++++++++++++++

.../PeiServicesTablePointer.h | 39 +++++++++

.../PeiServicesTablePointerLib.S | 40 ++++++++++

.../PeiServicesTablePointerLib.inf | 32 ++++++++

4 files changed, 190 insertions(+)

create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c

create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.h

create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.S

create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf



diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c

new file mode 100644

index 0000000000..204def3bde

--- /dev/null

+++ b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c

@@ -0,0 +1,79 @@

+/** @file

+ PEI Services Table Pointer Library.

+

+ Copyright (c) 2022 Loongson Technology Corporation Limited. All rights reserved.<BR>

+

+ SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#include <PiPei.h>

+#include <Library/PeiServicesTablePointerLib.h>

+#include <Library/DebugLib.h>

+#include "Library/Cpu.h"

+#include "PeiServicesTablePointer.h"

+

+/**

+ Caches a pointer PEI Services Table.

+

+ Caches the pointer to the PEI Services Table specified by PeiServicesTablePointer

+ in a platform specific manner.

+

+ If PeiServicesTablePointer is NULL, then ASSERT ().

+

+ @param PeiServicesTablePointer The address of PeiServices pointer.

+**/

+VOID

+EFIAPI

+SetPeiServicesTablePointer (

+ IN CONST EFI_PEI_SERVICES ** PeiServicesTablePointer

+ )

+{

+ LoongarchWriteqKs0 ((UINTN)PeiServicesTablePointer);

+}

+

+/**

+ Retrieves the cached value of the PEI Services Table pointer.

+

+ Returns the cached value of the PEI Services Table pointer in a CPU specific manner

+ as specified in the CPU binding section of the Platform Initialization Pre-EFI

+ Initialization Core Interface Specification.

+

+ If the cached PEI Services Table pointer is NULL, then ASSERT ().

+

+ @return The pointer to PeiServices.

+**/

+CONST EFI_PEI_SERVICES **

+EFIAPI

+GetPeiServicesTablePointer (

+ VOID

+ )

+{

+ UINTN val;

+

+ LoongarchReadqKs0 (&val);

+

+ return (CONST EFI_PEI_SERVICES **)val;

+}

+

+/**

+Perform CPU specific actions required to migrate the PEI Services Table

+pointer from temporary RAM to permanent RAM.

+

+For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes

+immediately preceding the Interrupt Descriptor Table (IDT) in memory.

+For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes

+immediately preceding the Interrupt Descriptor Table (IDT) in memory.

+For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in

+a dedicated CPU register. This means that there is no memory storage

+associated with storing the PEI Services Table pointer, so no additional

+migration actions are required for Itanium or ARM CPUs.

+*/

+VOID

+EFIAPI

+MigratePeiServicesTablePointer (

+VOID

+)

+{

+ return;

+}

diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.h b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.h

new file mode 100644

index 0000000000..5bcbc810d0

--- /dev/null

+++ b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.h

@@ -0,0 +1,39 @@

+/** @file

+ PeiServicesTablePointer

+

+ Copyright (c) 2022 Loongson Technology Corporation Limited. All rights reserved.<BR>

+

+ SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#ifndef PEISERVICESTABLEPOINTER_H_

+#define PEISERVICESTABLEPOINTER_H_

+

+/**

+ Write Csr KS0 register.

+

+ @param A0 The value used to write to the KS0 register

+

+ @retval none

+**/

+extern

+VOID

+LoongarchWriteqKs0 (

+ IN UINT64 Val

+ );

+

+/**

+ Read Csr KS0 register.

+

+ @param Val Pointer to the variable used to store the KS0 register value

+

+ @retval none

+**/

+extern

+VOID

+LoongarchReadqKs0 (

+ IN UINT64 *Val

+ );

+

+#endif // PEISERVICESTABLEPOINTER_H_

diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.S b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.S

new file mode 100644

index 0000000000..7c6170c5d6

--- /dev/null

+++ b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.S

@@ -0,0 +1,40 @@

+#------------------------------------------------------------------------------

+#

+# Timer Cfg for LoongArch

+#

+# Copyright (c) 2022 Loongson Technology Corporation Limited. All rights reserved.<BR>

+#

+# SPDX-License-Identifier: BSD-2-Clause-Patent

+#

+#------------------------------------------------------------------------------

+

+#ifndef __ASSEMBLY__

+#define __ASSEMBLY__

+#endif

+

+#include "Library/Cpu.h"

+

+ASM_GLOBAL ASM_PFX(LoongarchWriteqKs0)

+ASM_GLOBAL ASM_PFX(LoongarchReadqKs0)

+

+#

+# Write Csr KS0 register.

+# @param A0 The value used to write to the KS0 register

+# @retval none

+#

+

+ASM_PFX(LoongarchWriteqKs0):

+ csrwr A0, LOONGARCH_CSR_KS0

+ jirl ZERO, RA,0

+

+#

+# Write Csr KS0 register.

+# @param A0 Pointer to the variable used to store the KS0 register value

+# @retval none

+#

+

+ASM_PFX(LoongarchReadqKs0):

+ csrrd T0, LOONGARCH_CSR_KS0

+ stptr.d T0, A0, 0

+ jirl ZERO, RA,0

+ jirl ZERO, RA,0

diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf

new file mode 100644

index 0000000000..2ab0d53d4c

--- /dev/null

+++ b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf

@@ -0,0 +1,32 @@

+## @file

+# PEI Services Table Pointer Library.

+#

+# Copyright (c) 2022 Loongson Technology Corporation Limited. All rights reserved.<BR>

+#

+# SPDX-License-Identifier: BSD-2-Clause-Patent

+#

+##

+[Defines]

+ INF_VERSION = 0x00010005

+ BASE_NAME = PeiServicesTablePointerLib

+ FILE_GUID = C3C9C4ED-EB8A-4548-BE1B-ABB0B6F35B1E

+ MODULE_TYPE = PEIM

+ VERSION_STRING = 1.0

+ LIBRARY_CLASS = PeiServicesTablePointerLib|PEIM PEI_CORE SEC

+

+#

+# VALID_ARCHITECTURES = LOONGARCH64

+#

+

+[Sources]

+ PeiServicesTablePointer.c

+ PeiServicesTablePointerLib.S

+

+[Packages]

+ Platform/Loongson/LoongArchQemuPkg/Loongson.dec

+ MdePkg/MdePkg.dec

+

+[LibraryClasses]

+ DebugLib

+

+[Pcd]

--

2.31.1