From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from loongson.cn (loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web09.3658.1668159375236905620 for ; Fri, 11 Nov 2022 01:36:15 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: loongson.cn, ip: 114.242.206.163, mailfrom: lichao@loongson.cn) Received: from loongson.cn (unknown [10.40.24.149]) by gateway (Coremail) with SMTP id _____8Dxu9iNF25jjhUGAA--.18936S3; Fri, 11 Nov 2022 17:36:13 +0800 (CST) Received: from lichao-PC (unknown [10.40.24.149]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cxb+KMF25jp9EQAA--.46282S2; Fri, 11 Nov 2022 17:36:12 +0800 (CST) Date: Fri, 11 Nov 2022 17:36:12 +0800 From: "Chao Li" To: xianglai li Cc: "=?utf-8?Q?devel=40edk2.groups.io?=" , Bibo Mao , Leif Lindholm , Liming Gao , Michael D Kinney Message-ID: <379A872D-1949-4538-983E-9564A067D8B1@getmailspring.com> In-Reply-To: References: Subject: Re: [edk2-platforms][PATCH V5 03/15] Platform/Loongson: Add PeiServicesTablePointerLib. X-Mailer: Mailspring MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Cxb+KMF25jp9EQAA--.46282S2 X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQAHCGNs6eQZ0AATsW X-Coremail-Antispam: 1Uk129KBjvJXoW3ArWrWF4DuFyDJrWkXF15XFb_yoW3Cr1rpr 43WFs7Kr1UJrWIgryYqa15GFW5AFsrCr98Crs7XF1rC34kZry0qryjvFWFkFyrua45Aw1I gryFkw4Uu3WUXF7anT9S1TB71UUUUbDqnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj yC5I8CrVAYj202j2C_Jr0_Gr1l5I8CrVACY4xI64kE6c02F40Ex7xfMc02F40Ew4AK048I F2xKxVW5JVWrJbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnRJUUUmlb4IE77IF4wAFF2 0E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r10 6r15M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI 0_Gr0_Xr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr1l84ACjcxK6I8E87Iv67AK xVWxJr0_GcWl84ACjcxK6I8E87Iv6xkF7I0E14v26F4UJVW0owAaw2AFwI0_Jw0_GFyle2 I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27wAqx4xG67k08I80 eVWUJVW8JwAqx4xG64xvF2IEw4CE5I8CrVC2j2Wl5I8CrVAKz4kIr2xC04v26ryj6rWUMc Ij6xIIjxv20xvE14v26r1q6rW5McIj6I8E87Iv67AKxVW8JVWxJwAm72CE4IkC6x0Yz7v_ Jr0_Gr1lF7xvr2IYc2Ij64vIr41l7480Y4vEI4kI2Ix0rVAqx4xJMxkF7I0En4kS14v26r 1q6r43MxAIw28IcxkI7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAF wI0_JrI_JrWlx2IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUAVWUtwCIc4 0Y0x0EwIxGrwCI42IY6xIIjxv20xvE14v26r1I6r4UMIIF0xvE2Ix0cI8IcVCY1x0267AK xVWUJVW8JwCI42IY6xAIw20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Jr0_Gr 1lIxAIcVC2z280aVCY1x0267AKxVWUJVW8JbIYCTnIWIevJa73UjIFyTuYvjxUsEfYDUUU U Content-Type: multipart/alternative; boundary="636e178c_5a35066f_1e57b" --636e178c_5a35066f_1e57b Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline Reviewed-by: Chao Li Thanks, Chao -------- On 11=E6=9C=88 11 2022, at 5:12 =E4=B8=8B=E5=8D=88, xianglai li wrote: > Use a register to save PeiServicesTable pointer, > > This lib Provides PeiServicesTable pointer saving > and retrieval services. > > > RE=46: https://bugzilla.tianocore.org/show=5Fbug.cgi=3Fid=3D4054 > > > Cc: Bibo Mao > Cc: Chao Li > Cc: Leif Lindholm > Cc: Liming Gao > Cc: Michael D Kinney > Signed-off-by: xianglai li > --- > .../PeiServicesTablePointer.c =7C 79 +++++++++++++++++++ > .../PeiServicesTablePointer.h =7C 39 +++++++++ > .../PeiServicesTablePointerLib.S =7C 40 ++++++++++ > .../PeiServicesTablePointerLib.inf =7C 32 ++++++++ > 4 files changed, 190 insertions(+) > create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/PeiServic= esTablePointerLib/PeiServicesTablePointer.c > create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/PeiServic= esTablePointerLib/PeiServicesTablePointer.h > create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/PeiServic= esTablePointerLib/PeiServicesTablePointerLib.S > create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/PeiServic= esTablePointerLib/PeiServicesTablePointerLib.inf > > > diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTabl= ePointerLib/PeiServicesTablePointer.c b/Platform/Loongson/LoongArchQemuPk= g/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c > new file mode 100644 > index 0000000000..204def3bde > --- /dev/null > +++ b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointe= rLib/PeiServicesTablePointer.c > =40=40 -0,0 +1,79 =40=40 > +/** =40file > + PEI Services Table Pointer Library. > + > + Copyright (c) 2022 Loongson Technology Corporation Limited. All right= s reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +=23include > +=23include > +=23include > +=23include =22Library/Cpu.h=22 > +=23include =22PeiServicesTablePointer.h=22 > + > +/** > + Caches a pointer PEI Services Table. > + > + Caches the pointer to the PEI Services Table specified by PeiServices= TablePointer > + in a platform specific manner. > + > + If PeiServicesTablePointer is NULL, then ASSERT (). > + > + =40param PeiServicesTablePointer The address of PeiServices pointer. > +**/ > +VOID > +E=46IAPI > +SetPeiServicesTablePointer ( > + IN CONST E=46I=5FPEI=5FSERVICES ** PeiServicesTablePointer > + ) > +=7B > + LoongarchWriteqKs0 ((UINTN)PeiServicesTablePointer); > +=7D > + > +/** > + Retrieves the cached value of the PEI Services Table pointer. > + > + Returns the cached value of the PEI Services Table pointer in a CPU s= pecific manner > + as specified in the CPU binding section of the Platform Initializatio= n Pre-E=46I > + Initialization Core Interface Specification. > + > + If the cached PEI Services Table pointer is NULL, then ASSERT (). > + > + =40return The pointer to PeiServices. > +**/ > +CONST E=46I=5FPEI=5FSERVICES ** > +E=46IAPI > +GetPeiServicesTablePointer ( > + VOID > + ) > +=7B > + UINTN val; > + > + LoongarchReadqKs0 (&val); > + > + return (CONST E=46I=5FPEI=5FSERVICES **)val; > +=7D > + > +/** > +Perform CPU specific actions required to migrate the PEI Services Tabl= e > +pointer from temporary RAM to permanent RAM. > + > +=46or IA32 CPUs, the PEI Services Table pointer is stored in the 4 byt= es > +immediately preceding the Interrupt Descriptor Table (IDT) in memory. > +=46or X64 CPUs, the PEI Services Table pointer is stored in the 8 byte= s > +immediately preceding the Interrupt Descriptor Table (IDT) in memory. > +=46or Itanium and ARM CPUs, a the PEI Services Table Pointer is stored= in > +a dedicated CPU register. This means that there is no memory storage > +associated with storing the PEI Services Table pointer, so no addition= al > +migration actions are required for Itanium or ARM CPUs. > +*/ > +VOID > +E=46IAPI > +MigratePeiServicesTablePointer ( > +VOID > +) > +=7B > + return; > +=7D > diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTabl= ePointerLib/PeiServicesTablePointer.h b/Platform/Loongson/LoongArchQemuPk= g/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.h > new file mode 100644 > index 0000000000..5bcbc810d0 > --- /dev/null > +++ b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointe= rLib/PeiServicesTablePointer.h > =40=40 -0,0 +1,39 =40=40 > +/** =40file > + PeiServicesTablePointer > + > + Copyright (c) 2022 Loongson Technology Corporation Limited. All right= s reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +=23ifndef PEISERVICESTABLEPOINTER=5FH=5F > +=23define PEISERVICESTABLEPOINTER=5FH=5F > + > +/** > + Write Csr KS0 register. > + > + =40param A0 The value used to write to the KS0 register > + > + =40retval none > +**/ > +extern > +VOID > +LoongarchWriteqKs0 ( > + IN UINT64 Val > + ); > + > +/** > + Read Csr KS0 register. > + > + =40param Val Pointer to the variable used to store the KS0 register v= alue > + > + =40retval none > +**/ > +extern > +VOID > +LoongarchReadqKs0 ( > + IN UINT64 *Val > + ); > + > +=23endif // PEISERVICESTABLEPOINTER=5FH=5F > diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTabl= ePointerLib/PeiServicesTablePointerLib.S b/Platform/Loongson/LoongArchQem= uPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.S > new file mode 100644 > index 0000000000..7c6170c5d6 > --- /dev/null > +++ b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointe= rLib/PeiServicesTablePointerLib.S > =40=40 -0,0 +1,40 =40=40 > +=23-------------------------------------------------------------------= ----------- > +=23 > +=23 Timer Cfg for LoongArch > +=23 > +=23 Copyright (c) 2022 Loongson Technology Corporation Limited. All ri= ghts reserved.
> +=23 > +=23 SPDX-License-Identifier: BSD-2-Clause-Patent > +=23 > +=23-------------------------------------------------------------------= ----------- > + > +=23ifndef =5F=5FASSEMBLY=5F=5F > +=23define =5F=5FASSEMBLY=5F=5F > +=23endif > + > +=23include =22Library/Cpu.h=22 > + > +ASM=5FGLOBAL ASM=5FP=46X(LoongarchWriteqKs0) > +ASM=5FGLOBAL ASM=5FP=46X(LoongarchReadqKs0) > + > +=23 > +=23 Write Csr KS0 register. > +=23 =40param A0 The value used to write to the KS0 register > +=23 =40retval none > +=23 > + > +ASM=5FP=46X(LoongarchWriteqKs0): > + csrwr A0, LOONGARCH=5FCSR=5FKS0 > + jirl ZERO, RA,0 > + > +=23 > +=23 Write Csr KS0 register. > +=23 =40param A0 Pointer to the variable used to store the KS0 register= value > +=23 =40retval none > +=23 > + > +ASM=5FP=46X(LoongarchReadqKs0): > + csrrd T0, LOONGARCH=5FCSR=5FKS0 > + stptr.d T0, A0, 0 > + jirl ZERO, RA,0 > + jirl ZERO, RA,0 > diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTabl= ePointerLib/PeiServicesTablePointerLib.inf b/Platform/Loongson/LoongArchQ= emuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf > new file mode 100644 > index 0000000000..2ab0d53d4c > --- /dev/null > +++ b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointe= rLib/PeiServicesTablePointerLib.inf > =40=40 -0,0 +1,32 =40=40 > +=23=23 =40file > +=23 PEI Services Table Pointer Library. > +=23 > +=23 Copyright (c) 2022 Loongson Technology Corporation Limited. All ri= ghts reserved.
> +=23 > +=23 SPDX-License-Identifier: BSD-2-Clause-Patent > +=23 > +=23=23 > +=5BDefines=5D > + IN=46=5FVERSION =3D 0x00010005 > + BASE=5FNAME =3D PeiServicesTablePointerLib > + =46ILE=5FGUID =3D C3C9C4ED-EB8A-4548-BE1B-ABB0B6=4635B1E > + MODULE=5FTYPE =3D PEIM > + VERSION=5FSTRING =3D 1.0 > + LIBRARY=5FCLASS =3D PeiServicesTablePointerLib=7CPEIM PEI=5FCORE SEC > + > +=23 > +=23 VALID=5FARCHITECTURES =3D LOONGARCH64 > +=23 > + > +=5BSources=5D > + PeiServicesTablePointer.c > + PeiServicesTablePointerLib.S > + > +=5BPackages=5D > + Platform/Loongson/LoongArchQemuPkg/Loongson.dec > + MdePkg/MdePkg.dec > + > +=5BLibraryClasses=5D > + DebugLib > + > +=5BPcd=5D > -- > 2.31.1 --636e178c_5a35066f_1e57b Content-Type: text/html; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline
Reviewed-by: Chao Li  <lichao=40loongson.cn>


Thanks,
Chao
--------

On 11=E6=9C=88 11 2= 022, at 5:12 =E4=B8=8B=E5=8D=88, xianglai li <lixianglai=40loongson.cn= > wrote:
Use a register to save PeiServices= Table pointer,

This lib Provides PeiServicesTable pointer s= aving

and retrieval services.



RE=46: = https://bugzilla.tianocore.org/show=5Fbug.cgi=3Fid=3D4054


Cc: Bibo Mao <maobibo=40loongson.cn>

Cc: Chao = Li <lichao=40loongson.cn>

Cc: Leif Lindholm <quic=5F= llindhol=40quicinc.com>

Cc: Liming Gao <gaoliming=40b= yosoft.com.cn>

Cc: Michael D Kinney <michael.d.kinney= =40intel.com>

Signed-off-by: xianglai li <lixianglai=40= loongson.cn>

---

.../PeiServicesTablePoint= er.c =7C 79 +++++++++++++++++++

.../PeiServicesTablePointer= .h =7C 39 +++++++++

.../PeiServicesTablePointerLib.S =7C 40= ++++++++++

.../PeiServicesTablePointerLib.inf =7C 32 +++++= +++

4 files changed, 190 insertions(+)

create= mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTableP= ointerLib/PeiServicesTablePointer.c

create mode 100644 Plat= form/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServ= icesTablePointer.h

create mode 100644 Platform/Loongson/Loo= ngArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerL= ib.S

create mode 100644 Platform/Loongson/LoongArchQemuPkg/= Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf


diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/Pe= iServicesTablePointerLib/PeiServicesTablePointer.c b/Platform/Loongson/Lo= ongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer= .c

new file mode 100644

index 0000000000..204= def3bde

--- /dev/null

+++ b/Platform/Loongson= /LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePoin= ter.c

=40=40 -0,0 +1,79 =40=40

+/** =40file
+ PEI Services Table Pointer Library.

+
<= br>
+ Copyright (c) 2022 Loongson Technology Corporation Limited. All= rights reserved.<BR>

+

+ SPDX-License-= Identifier: BSD-2-Clause-Patent

+

+**/
<= br>
+

+=23include <PiPei.h>

+=23inc= lude <Library/PeiServicesTablePointerLib.h>

+=23inclu= de <Library/DebugLib.h>

+=23include =22Library/Cpu.h=22=

+=23include =22PeiServicesTablePointer.h=22

= +

+/**

+ Caches a pointer PEI Services Table.=

+

+ Caches the pointer to the PEI Services T= able specified by PeiServicesTablePointer

+ in a platform s= pecific manner.

+

+ If PeiServicesTablePointe= r is NULL, then ASSERT ().

+

+ =40param PeiSe= rvicesTablePointer The address of PeiServices pointer.

+**/=

+VOID

+E=46IAPI

+SetPeiService= sTablePointer (

+ IN CONST E=46I=5FPEI=5FSERVICES ** PeiSer= vicesTablePointer

+ )

+=7B

+ Lo= ongarchWriteqKs0 ((UINTN)PeiServicesTablePointer);

+=7D
+

+/**

+ Retrieves the cached valu= e of the PEI Services Table pointer.

+

+ Retu= rns the cached value of the PEI Services Table pointer in a CPU specific = manner

+ as specified in the CPU binding section of the Pla= tform Initialization Pre-E=46I

+ Initialization Core Interf= ace Specification.

+

+ If the cached PEI Serv= ices Table pointer is NULL, then ASSERT ().

+

+ =40return The pointer to PeiServices.

+**/

+CONST E=46I=5FPEI=5FSERVICES **

+E=46IAPI

+= GetPeiServicesTablePointer (

+ VOID

+ )
=
+=7B

+ UINTN val;

+

+ = LoongarchReadqKs0 (&val);

+

+ return (CON= ST E=46I=5FPEI=5FSERVICES **)val;

+=7D

+
+/**

+Perform CPU specific actions required to mi= grate the PEI Services Table

+pointer from temporary RAM to= permanent RAM.

+

+=46or IA32 CPUs, the PEI S= ervices Table pointer is stored in the 4 bytes

+immediately= preceding the Interrupt Descriptor Table (IDT) in memory.

= +=46or X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes<= /div>
+immediately preceding the Interrupt Descriptor Table (IDT)= in memory.

+=46or Itanium and ARM CPUs, a the PEI Services= Table Pointer is stored in

+a dedicated CPU register. This= means that there is no memory storage

+associated with sto= ring the PEI Services Table pointer, so no additional

+migr= ation actions are required for Itanium or ARM CPUs.

+*/
+VOID

+E=46IAPI

+MigratePeiService= sTablePointer (

+VOID

+)

+=7B
+ return;

+=7D

diff --git a/Plat= form/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServ= icesTablePointer.h b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServic= esTablePointerLib/PeiServicesTablePointer.h

new file mode 1= 00644

index 0000000000..5bcbc810d0

--- /dev/n= ull

+++ b/Platform/Loongson/LoongArchQemuPkg/Library/PeiSer= vicesTablePointerLib/PeiServicesTablePointer.h

=40=40 -0,0 = +1,39 =40=40

+/** =40file

+ PeiServicesTableP= ointer

+

+ Copyright (c) 2022 Loongson Techno= logy Corporation Limited. All rights reserved.<BR>

+<= /div>
+ SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+=23ifndef PEISERVIC= ESTABLEPOINTER=5FH=5F

+=23define PEISERVICESTABLEPOINTER=5F= H=5F

+

+/**

+ Write Csr KS0 reg= ister.

+

+ =40param A0 The value used to writ= e to the KS0 register

+

+ =40retval none
+**/

+extern

+VOID

+L= oongarchWriteqKs0 (

+ IN UINT64 Val

+ );
+

+/**

+ Read Csr KS0 register.
+

+ =40param Val Pointer to the variable used to= store the KS0 register value

+

+ =40retval n= one

+**/

+extern

+VOID
+LoongarchReadqKs0 (

+ IN UINT64 *Val

+= );

+

+=23endif // PEISERVICESTABLEPOINTER=5F= H=5F

diff --git a/Platform/Loongson/LoongArchQemuPkg/Librar= y/PeiServicesTablePointerLib/PeiServicesTablePointerLib.S b/Platform/Loon= gson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTable= PointerLib.S

new file mode 100644

index 00000= 00000..7c6170c5d6

--- /dev/null

+++ b/Platfor= m/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiService= sTablePointerLib.S

=40=40 -0,0 +1,40 =40=40

+= =23----------------------------------------------------------------------= --------

+=23

+=23 Timer Cfg for LoongArch
+=23

+=23 Copyright (c) 2022 Loongson Technolog= y Corporation Limited. All rights reserved.<BR>

+=23<= /div>
+=23 SPDX-License-Identifier: BSD-2-Clause-Patent

=
+=23

+=23---------------------------------------------= ---------------------------------

+

+=23ifnde= f =5F=5FASSEMBLY=5F=5F

+=23define =5F=5FASSEMBLY=5F=5F
+=23endif

+

+=23include =22Library/= Cpu.h=22

+

+ASM=5FGLOBAL ASM=5FP=46X(Loongarc= hWriteqKs0)

+ASM=5FGLOBAL ASM=5FP=46X(LoongarchReadqKs0)
+

+=23

+=23 Write Csr KS0 registe= r.

+=23 =40param A0 The value used to write to the KS0 regi= ster

+=23 =40retval none

+=23

+=

+ASM=5FP=46X(LoongarchWriteqKs0):

+ csrwr A0= , LOONGARCH=5FCSR=5FKS0

+ jirl ZERO, RA,0

+
+=23

+=23 Write Csr KS0 register.

+=23 =40param A0 Pointer to the variable used to store the KS0 register= value

+=23 =40retval none

+=23

+

+ASM=5FP=46X(LoongarchReadqKs0):

+ csrrd T= 0, LOONGARCH=5FCSR=5FKS0

+ stptr.d T0, A0, 0

= + jirl ZERO, RA,0

+ jirl ZERO, RA,0

diff --gi= t a/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib= /PeiServicesTablePointerLib.inf b/Platform/Loongson/LoongArchQemuPkg/Libr= ary/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf

new file mode 100644

index 0000000000..2ab0d53d4c
<= br>
--- /dev/null

+++ b/Platform/Loongson/LoongArchQemu= Pkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
=40=40 -0,0 +1,32 =40=40

+=23=23 =40file
+=23 PEI Services Table Pointer Library.

+=23
<= br>
+=23 Copyright (c) 2022 Loongson Technology Corporation Limited. = All rights reserved.<BR>

+=23

+=23 SPDX= -License-Identifier: BSD-2-Clause-Patent

+=23

+=23=23

+=5BDefines=5D

+ IN=46=5FVERSION =3D= 0x00010005

+ BASE=5FNAME =3D PeiServicesTablePointerLib
+ =46ILE=5FGUID =3D C3C9C4ED-EB8A-4548-BE1B-ABB0B6=4635B1E
+ MODULE=5FTYPE =3D PEIM

+ VERSION=5FSTRING =3D= 1.0

+ LIBRARY=5FCLASS =3D PeiServicesTablePointerLib=7CPEI= M PEI=5FCORE SEC

+

+=23

+=23 VA= LID=5FARCHITECTURES =3D LOONGARCH64

+=23

+
+=5BSources=5D

+ PeiServicesTablePointer.c
+ PeiServicesTablePointerLib.S

+

+=5B= Packages=5D

+ Platform/Loongson/LoongArchQemuPkg/Loongson.d= ec

+ MdePkg/MdePkg.dec

+

+=5BLi= braryClasses=5D

+ DebugLib

+

+=5B= Pcd=5D

--

2.31.1
--636e178c_5a35066f_1e57b--