From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mx.groups.io with SMTP id smtpd.web11.2213.1583978528361676628 for ; Wed, 11 Mar 2020 19:02:08 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.136, mailfrom: bob.c.feng@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Mar 2020 19:02:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,543,1574150400"; d="scan'208";a="231892329" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga007.jf.intel.com with ESMTP; 11 Mar 2020 19:02:07 -0700 Received: from shsmsx605.ccr.corp.intel.com (10.109.6.215) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 11 Mar 2020 19:02:07 -0700 Received: from shsmsx601.ccr.corp.intel.com (10.109.6.141) by SHSMSX605.ccr.corp.intel.com (10.109.6.215) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Thu, 12 Mar 2020 10:02:04 +0800 Received: from shsmsx601.ccr.corp.intel.com ([10.109.6.141]) by SHSMSX601.ccr.corp.intel.com ([10.109.6.141]) with mapi id 15.01.1713.004; Thu, 12 Mar 2020 10:02:04 +0800 From: "Bob Feng" To: "Fu, Siyuan" , "devel@edk2.groups.io" CC: "Gao, Liming" Subject: Re: [Patch] Silicon/Intel/Tools: Add parameter for microcode alignment in FitGen. Thread-Topic: [Patch] Silicon/Intel/Tools: Add parameter for microcode alignment in FitGen. Thread-Index: AQHV94hGFdOGmMAm/UCKNfK4K2E63KhENUuQ Date: Thu, 12 Mar 2020 02:02:04 +0000 Message-ID: <38bdd61c2ceb4bd5873b497e150d9cb8@intel.com> References: In-Reply-To: Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.36] MIME-Version: 1.0 Return-Path: bob.c.feng@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Bob Feng -----Original Message----- From: Fu, Siyuan=20 Sent: Wednesday, March 11, 2020 5:34 PM To: devel@edk2.groups.io Cc: Feng, Bob C ; Gao, Liming Subject: [Patch] Silicon/Intel/Tools: Add parameter for microcode alignment= in FitGen. The current FitGen has "-NA" parameter to indicate whether microcode is pla= ced with an alignment, but it could only support 0x800 alignment: - With"-NA" means microcode is not aligned. - No "-NA" means Microcode is 0x800 aligned. There is no method to specify other alignment value. This patch add "-A" option to FitGen for to configure the alignment to a us= er specified value. The change is backward compatible as: - Only "-NA" means microcode is not aligned (same as before). - No "-NA" and No "-A" means Microcode is 0x800 aligned (same as before). - Only "-A" means microcode is aligned with specified value (new). Cc: Bob Feng Cc: Liming Gao Signed-off-by: Siyuan Fu --- Silicon/Intel/Tools/FitGen/FitGen.c | 35 +++++++++++++++++++---------- 1 file changed, 23 insertions(+), 12 deletions(-) diff --git a/Silicon/Intel/Tools/FitGen/FitGen.c b/Silicon/Intel/Tools/FitG= en/FitGen.c index 49ec33a7fd..75d8932d90 100644 --- a/Silicon/Intel/Tools/FitGen/FitGen.c +++ b/Silicon/Intel/Tools/FitGen/FitGen.c @@ -260,7 +260,8 @@ typedef struct { FIT_TABLE_CONTEXT_ENTRY BiosModule[MAX_BIOS_MODULE_ENTRY]; UINT32 BiosModuleVersion; FIT_TABLE_CONTEXT_ENTRY Microcode[MAX_MICROCODE_ENTRY]; - BOOLEAN MicrocodeAlignment; + BOOLEAN MicrocodeIsAligned; + UINT32 MicrocodeAlignValue; UINT32 MicrocodeVersion; FIT_TABLE_CONTEXT_ENTRY OptionalModule[MAX_OPTIONAL_ENTRY]; FIT_TABLE_CONTEXT_ENTRY PortModule[MAX_PORT_ENTRY]; @@ -325,6 +326,7 @@ Returns: "\t[-V ]\n" "\t[-F ] [-F ] [-V= ]\n" "\t[-NA]\n" + "\t[-A ]\n" "\t[-CLEAR]\n" "\t[-L ]\n" "\t[-I ]\n" @@ -357,7 +359,8 @@ Returns: printf ("\tMicrocodeGuid - Guid of Microcode Module.\n"); printf ("\tMicrocodeSlotSize - Occupied region size of each Microco= de binary.\n"); printf ("\tMicrocodeFfsGuid - Guid of FFS which is used to save Mi= crocode binary"); - printf ("\t-NA - No 0x800 aligned Microcode requireme= nt. No -NA means Microcode is 0x800 aligned.\n"); + printf ("\t-NA - No 0x800 aligned Microcode requireme= nt. No -NA means Microcode is aligned with option MicrocodeAlignment value.= \n"); + printf ("\tMicrocodeAlignment - HEX value of Microcode alignment. Ig= nored if \"-NA\" is specified. Default value is 0x800.\n"); printf ("\tRecordType - FIT entry record type. User should e= nsure it is ordered.\n"); printf ("\tRecordDataAddress - FIT entry record data address.\n"); printf ("\tRecordDataSize - FIT entry record data size.\n"); @@ -957,17 +960,25 @@ Returns: // if ((Index >=3D argc) || ((strcmp (argv[Index], "-NA") !=3D 0) && - (strcmp (argv[Index], "-na") !=3D 0)) ) { + (strcmp (argv[Index], "-na") !=3D 0) && + (strcmp (argv[Index], "-A") !=3D 0) && + (strcmp (argv[Index], "-a") !=3D 0))) { // // by pass // - gFitTableContext.MicrocodeAlignment =3D TRUE; - } else { + gFitTableContext.MicrocodeIsAligned =3D TRUE; + gFitTableContext.MicrocodeAlignValue =3D 0x800; } else if ((strcmp=20 + (argv[Index], "-NA") =3D=3D 0) || (strcmp (argv[Index], "-na") =3D=3D 0))= { + gFitTableContext.MicrocodeIsAligned =3D FALSE; + gFitTableContext.MicrocodeAlignValue =3D 1; + Index +=3D 1; + } else if ((strcmp (argv[Index], "-A") =3D=3D 0) || (strcmp (argv[Index]= , "-a") =3D=3D 0)) { + gFitTableContext.MicrocodeIsAligned =3D TRUE; // - // no alignment + // Get alignment from parameter // - gFitTableContext.MicrocodeAlignment =3D FALSE; - Index +=3D 1; + gFitTableContext.MicrocodeAlignValue =3D xtoi (argv[Index + 1]);; + Index +=3D 2; } =20 // @@ -1159,8 +1170,8 @@ Returns: // // MCU might be put at 2KB alignment, if so, we need to ad= just the size as 2KB alignment. // - if (gFitTableContext.MicrocodeAlignment) { - MicrocodeSize =3D (*(UINT32 *)(MicrocodeBuffer + 32) + M= ICROCODE_ALIGNMENT) & ~MICROCODE_ALIGNMENT; + if (gFitTableContext.MicrocodeIsAligned) { + MicrocodeSize =3D (*(UINT32 *)(MicrocodeBuffer + 32) +=20 + (gFitTableContext.MicrocodeAlignValue - 1)) &=20 + ~(gFitTableContext.MicrocodeAlignValue - 1); } else { MicrocodeSize =3D (*(UINT32 *)(MicrocodeBuffer + 32)); } @@ -1537,8 +1548,8 @@ Returns: // // MCU might be put at 2KB alignment, if so, we need to adjust the= size as 2KB alignment. // - if (gFitTableContext.MicrocodeAlignment) { - MicrocodeSize =3D (*(UINT32 *)(MicrocodeBuffer + 32) + MICROCODE= _ALIGNMENT) & ~MICROCODE_ALIGNMENT; + if (gFitTableContext.MicrocodeIsAligned) { + MicrocodeSize =3D (*(UINT32 *)(MicrocodeBuffer + 32) +=20 + (gFitTableContext.MicrocodeAlignValue - 1)) &=20 + ~(gFitTableContext.MicrocodeAlignValue - 1); } else { MicrocodeSize =3D (*(UINT32 *)(MicrocodeBuffer + 32)); } -- 2.19.1.windows.1