From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A26C51A1EC4 for ; Fri, 14 Oct 2016 05:06:51 -0700 (PDT) Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 20FBE13854; Fri, 14 Oct 2016 12:06:51 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-51.phx2.redhat.com [10.3.116.51]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u9EC6nk4007152; Fri, 14 Oct 2016 08:06:50 -0400 To: Bhupesh Sharma References: <1476437615-29534-1-git-send-email-bhupesh.sharma@nxp.com> From: Laszlo Ersek Cc: edk2-devel@ml01.01.org Message-ID: <38e8d690-b981-4b37-1ad2-6c6975ad2a9a@redhat.com> Date: Fri, 14 Oct 2016 14:06:49 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 MIME-Version: 1.0 In-Reply-To: <1476437615-29534-1-git-send-email-bhupesh.sharma@nxp.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.27 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Fri, 14 Oct 2016 12:06:51 +0000 (UTC) Subject: Re: [PATCH 1/1] MdePkg/IoLib: Add support for big-endian MMIO X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 14 Oct 2016 12:06:51 -0000 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit On 10/14/16 11:33, Bhupesh Sharma wrote: > Various IPs on NXP/FSL SoCs having ARM64 cores have big-endian > MMIO interfaces. > > This implies that a byte-swap operation is needed to read/write > such BE MMIO registers from the LE ARM64 cores. > > This patch adds the support for the same. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Meenakshi Aggarwal > Signed-off-by: Bhupesh Sharma > --- > MdePkg/Include/Library/IoLib.h | 364 ++++++++++++++++++++ > MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 479 +++++++++++++++++++++++++++ > 2 files changed, 843 insertions(+) I think this is both overkill and incomplete, at the same time :) - Incomplete because only one IoLib instance gets the implementation. - Overkill because you can easily use the SwapBytes16, SwapBytes32, SwapBytes64 functions -- also from BaseLib --, for transforming MmioWrite arguments and MmioRead results. Thanks Laszlo