From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.88; helo=mga01.intel.com; envelope-from=dandan.bi@intel.com; receiver=edk2-devel@lists.01.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 4BF0321ED1C75 for ; Thu, 8 Mar 2018 17:48:19 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Mar 2018 17:54:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.47,443,1515484800"; d="scan'208";a="22909940" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by fmsmga007.fm.intel.com with ESMTP; 08 Mar 2018 17:54:35 -0800 Received: from fmsmsx158.amr.corp.intel.com (10.18.116.75) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 8 Mar 2018 17:54:35 -0800 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by fmsmsx158.amr.corp.intel.com (10.18.116.75) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 8 Mar 2018 17:54:35 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.80]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.108]) with mapi id 14.03.0319.002; Fri, 9 Mar 2018 09:54:33 +0800 From: "Bi, Dandan" To: =?iso-8859-1?Q?Marvin_H=E4user?= , "edk2-devel@lists.01.org" CC: "Bi, Dandan" Thread-Topic: [PATCH 1/5] MdePkg/SPI: Change function definitions to match their descriptions. Thread-Index: AQHTr+ri4yU6uX2cBEWXaviTJcNtDqPA5f4AgAJYSFCAA/QocA== Date: Fri, 9 Mar 2018 01:54:32 +0000 Message-ID: <3C0D5C461C9E904E8F62152F6274C0BB3BA5CC71@shsmsx102.ccr.corp.intel.com> References: <3C0D5C461C9E904E8F62152F6274C0BB3BA4B2C5@shsmsx102.ccr.corp.intel.com> In-Reply-To: Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH 1/5] MdePkg/SPI: Change function definitions to match their descriptions. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 09 Mar 2018 01:48:19 -0000 Content-Language: en-US Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Hi Marvin, How about your write the ECR doc firstly then I ask Intel architect to help= submit it to PIWG? Thanks, Dandan -----Original Message----- From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Marv= in H=E4user Sent: Tuesday, March 6, 2018 9:32 PM To: edk2-devel@lists.01.org; Bi, Dandan Subject: Re: [edk2] [PATCH 1/5] MdePkg/SPI: Change function definitions to = match their descriptions. Hey Dandan, Thanks for your reply. I issued updates for the current headers because I saw activity in edk2-pla= tforms to implement these incomplete protocols and because I haven't heard = back for discussed changes in the specification for some time. Sure I could help submitting the ECR, however I'm not sure how. I'm not an = UEFI Contributor and neither did I find any design flaws, just typos and mi= ssing definitions, which obviously must be bit values due to their non-excl= usive nature. If you need me to do something concrete, I will try to do my best. Regards, Marvin. > -----Original Message----- > From: Bi, Dandan > Sent: Monday, March 5, 2018 3:15 AM > To: Marvin H=E4user ; edk2-=20 > devel@lists.01.org > Cc: Kinney, Michael D ; Gao, Liming=20 > ; Bi, Dandan > Subject: RE: [PATCH 1/5] MdePkg/SPI: Change function definitions to=20 > match their descriptions. >=20 > Hi Marvin, >=20 > Thank you very much for your contribution. Could you hold this patch seri= es? > Since current SPI header files follow PI1.6 spec. > For this case, we should submit an ECR to update the PI spec firstly.=20 > After the ECR has been approved by PIWG, then we can send patch to update= them. > Since you have found a lot of missing/incorrect parts in the SPI part=20 > of PI Spec. Could you help to submit an ECR to update them? >=20 >=20 > Thanks, > Dandan >=20 > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of=20 > Marvin H=E4user > Sent: Wednesday, February 28, 2018 12:49 AM > To: edk2-devel@lists.01.org > Cc: Kinney, Michael D ; Gao, Liming=20 > > Subject: [edk2] [PATCH 1/5] MdePkg/SPI: Change function definitions to=20 > match their descriptions. >=20 > The PI specification is not continuous with function headers and=20 > descriptions for the SPI protocols. Correct and comment these mistakes. >=20 > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Marvin Haeuser > --- > MdePkg/Include/Protocol/SpiConfiguration.h | 12 ++++++++---- > MdePkg/Include/Protocol/SpiHc.h | 14 +++++++++----- > MdePkg/Include/Protocol/SpiIo.h | 15 ++++++++++----- > 3 files changed, 27 insertions(+), 14 deletions(-) >=20 > diff --git a/MdePkg/Include/Protocol/SpiConfiguration.h > b/MdePkg/Include/Protocol/SpiConfiguration.h > index c0df183ec7f0..c36a809f4232 100644 > --- a/MdePkg/Include/Protocol/SpiConfiguration.h > +++ b/MdePkg/Include/Protocol/SpiConfiguration.h > @@ -1,7 +1,7 @@ > /** @file > This file defines the SPI Configuration Protocol. >=20 > - Copyright (c) 2017, Intel Corporation. All rights reserved.
> + Copyright (c) 2017 - 2018, Intel Corporation. All rights=20 > + reserved.
> This program and the accompanying materials > are licensed and made available under the terms and conditions of the = BSD > License which accompanies this distribution. The full text of the=20 > license may @@ -65,6 +65,10 @@ EFI_STATUS > IN BOOLEAN PinValue > ); >=20 > +// > +// Note: In the PI specification, ClockHz is decorated as only 'IN', whi= ch is > +// not conforming to the parameter description. > +// > /** > Set up the clock generator to produce the correct clock frequency,=20 > phase and > polarity for a SPI chip. > @@ -78,7 +82,7 @@ EFI_STATUS > ClockPhase and ClockPolarity fields. The rou= tine > also has access to the names for the SPI bus= and > chip which can be used during debugging. > - @param[in] ClockHz Pointer to the requested clock frequency. Th= e > clock > + @param[in,out] ClockHz Pointer to the requested clock frequency. Th= e > clock > generator will choose a supported clock freq= uency > which is less then or equal to this value. > Specify zero to turn the clock generator off= . > @@ -92,8 +96,8 @@ EFI_STATUS > **/ > typedef EFI_STATUS > (EFIAPI *EFI_SPI_CLOCK) ( > - IN CONST EFI_SPI_PERIPHERAL *SpiPeripheral, > - IN UINT32 *ClockHz > + IN CONST EFI_SPI_PERIPHERAL *SpiPeripheral, > + IN OUT UINT32 *ClockHz > ); >=20 > /// > diff --git a/MdePkg/Include/Protocol/SpiHc.h=20 > b/MdePkg/Include/Protocol/SpiHc.h index 12fe5d2dce0a..71c75431e4e8 > 100644 > --- a/MdePkg/Include/Protocol/SpiHc.h > +++ b/MdePkg/Include/Protocol/SpiHc.h > @@ -1,7 +1,7 @@ > /** @file > This file defines the SPI Host Controller Protocol. >=20 > - Copyright (c) 2017, Intel Corporation. All rights reserved.
> + Copyright (c) 2017 - 2018, Intel Corporation. All rights=20 > + reserved.
> This program and the accompanying materials > are licensed and made available under the terms and conditions of the = BSD > License which accompanies this distribution. The full text of the=20 > license may @@ -66,6 +66,10 @@ typedef EFI_STATUS > IN BOOLEAN PinValue > ); >=20 > +// > +// Note: In the PI specification, ClockHz is decorated as only 'IN', whi= ch is > +// not conforming to the parameter description. > +// > /** > Set up the clock generator to produce the correct clock frequency,=20 > phase and > polarity for a SPI chip. > @@ -80,7 +84,7 @@ typedef EFI_STATUS > ClockPhase and ClockPolarity fields. The rou= tine > also has access to the names for the SPI bus= and > chip which can be used during debugging. > - @param[in] ClockHz Pointer to the requested clock frequency. Th= e SPI > + @param[in,out] ClockHz Pointer to the requested clock frequency. Th= e > SPI > host controller will choose a supported cloc= k > frequency which is less then or equal to thi= s > value. Specify zero to turn the clock=20 > generator @@ -94,9 +98,9 @@ typedef EFI_STATUS **/ typedef=20 > EFI_STATUS (EFIAPI > *EFI_SPI_HC_PROTOCOL_CLOCK) ( > - IN CONST EFI_SPI_HC_PROTOCOL *This, > - IN CONST EFI_SPI_PERIPHERAL *SpiPeripheral, > - IN UINT32 *ClockHz > + IN CONST EFI_SPI_HC_PROTOCOL *This, > + IN CONST EFI_SPI_PERIPHERAL *SpiPeripheral, > + IN OUT UINT32 *ClockHz > ); >=20 > /** > diff --git a/MdePkg/Include/Protocol/SpiIo.h=20 > b/MdePkg/Include/Protocol/SpiIo.h index 43e804518f8b..8c5d96bb04b2 > 100644 > --- a/MdePkg/Include/Protocol/SpiIo.h > +++ b/MdePkg/Include/Protocol/SpiIo.h > @@ -1,7 +1,7 @@ > /** @file > This file defines the SPI I/O Protocol. >=20 > - Copyright (c) 2017, Intel Corporation. All rights reserved.
> + Copyright (c) 2017 - 2018, Intel Corporation. All rights=20 > + reserved.
> This program and the accompanying materials > are licensed and made available under the terms and conditions of the = BSD > License which accompanies this distribution. The full text of the=20 > license may @@ -144,6 +144,11 @@ EFI_STATUS > OUT UINT8 *ReadBuffer > ); >=20 > +// > +// Note: In the PI specification, 'This' is decorated with 'IN' and 'CON= ST'. > +// However, 'This' needs to be updated in order to reflect the > +// Peripheral update. > +// > /** > Update the SPI peripheral associated with this SPI 10 instance. >=20 > @@ -152,8 +157,8 @@ EFI_STATUS > SPI NOR flash parts, where the size and parameters change depending=20 > upon > device is in the socket. >=20 > - @param[in] This Pointer to an EFI_SPI_IO_PROTOCOL structure. > - @param[in] SpiPeripheral Pointer to an EFI_SPI_PERIPHERAL structure. > + @param[in,out] This Pointer to an EFI_SPI_IO_PROTOCOL struct= ure. > + @param[in] SpiPeripheral Pointer to an EFI_SPI_PERIPHERAL structu= re. >=20 > @retval EFI_SUCCESS The SPI peripheral was updated successf= ully > @retval EFI_INVALID_PARAMETER The SpiPeripheral value is NULL, @@=20 > - > 165,8 +170,8 @@ EFI_STATUS **/ typedef EFI_STATUS (EFIAPI > *EFI_SPI_IO_PROTOCOL_UPDATE_SPI_PERIPHERAL) ( > - IN CONST EFI_SPI_IO_PROTOCOL *This, > - IN CONST EFI_SPI_PERIPHERAL *SpiPeripheral > + IN OUT EFI_SPI_IO_PROTOCOL *This, > + IN CONST EFI_SPI_PERIPHERAL *SpiPeripheral > ); >=20 > /// > -- > 2.16.0.windows.2 >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel