From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.31; helo=mga06.intel.com; envelope-from=chasel.chiu@intel.com; receiver=edk2-devel@lists.01.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E22D62118A5AE for ; Tue, 6 Nov 2018 16:44:25 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Nov 2018 16:44:24 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,473,1534834800"; d="scan'208";a="83871296" Received: from kmsmsx151.gar.corp.intel.com ([172.21.73.86]) by fmsmga007.fm.intel.com with ESMTP; 06 Nov 2018 16:44:24 -0800 Received: from pgsmsx111.gar.corp.intel.com ([169.254.2.208]) by KMSMSX151.gar.corp.intel.com ([169.254.10.231]) with mapi id 14.03.0415.000; Wed, 7 Nov 2018 08:44:23 +0800 From: "Chiu, Chasel" To: "Yao, Jiewen" CC: "edk2-devel@lists.01.org" , "Desimone, Nathaniel L" Thread-Topic: [PATCH] IntelFsp2WrapperPkg: Support FSP Dispatch mode Thread-Index: AQHUdbI/zfGfyN+VM0W9e+yMS09JgaVCGLQAgAFhkxA= Date: Wed, 7 Nov 2018 00:44:22 +0000 Message-ID: <3C3EFB470A303B4AB093197B6777CCEC501C3A47@PGSMSX111.gar.corp.intel.com> References: <20181106092042.9520-1-chasel.chiu@intel.com> <02AD6047-4226-42C5-9185-0EC788903D48@intel.com> In-Reply-To: <02AD6047-4226-42C5-9185-0EC788903D48@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNzNhMzgyOWEtNmU5Zi00NjRmLTg0ZTMtNjFhODlhOWE2ZGI5IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiZ0VvblRVZDFta0lHbU0xeERFeDJUVGFuUkhIVnd0UDlwNjZwXC9WR0cwXC9WQ0NPdFBGdHFuZ1NNOUVIRkJ3Q0F2In0= x-ctpclassification: CTP_NT x-originating-ip: [172.30.20.205] MIME-Version: 1.0 Subject: Re: [PATCH] IntelFsp2WrapperPkg: Support FSP Dispatch mode X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 07 Nov 2018 00:44:26 -0000 Content-Language: en-US Content-Type: text/plain; charset="iso-2022-jp" Content-Transfer-Encoding: quoted-printable Hi Jiewen, No special reason in this patch. I'm verifying the change for switching to = "if" instead of "#if", and will re-send a new patch later. Thanks! Chasel -----Original Message----- From: Yao, Jiewen=20 Sent: Tuesday, November 6, 2018 7:38 PM To: Chiu, Chasel Cc: edk2-devel@lists.01.org; Desimone, Nathaniel L Subject: Re: [PATCH] IntelFsp2WrapperPkg: Support FSP Dispatch mode hi chasel I think our guide is not to use #if, but use if() Is there any special reason in this patch? thank you! Yao, Jiewen > =1B$B:_=1B(B 2018=1B$BG/=1B(B11=1B$B7n=1B(B6=1B$BF|!$2<8a=1B(B5:22=1B$B!$= =1B(BChiu, Chasel =1B$B=20 > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1300 >=20 > Provides PCD selection for FSP Wrapper to support Dispatch mode. Also=20 > PcdFspmBaseAddress should support Dynamic for recovery scenario=20 > (multiple FSP-M binary in flash) >=20 > Test: Verified on internal platform and both API and > DISPATCH modes booted successfully. >=20 > Cc: Jiewen Yao > Cc: Desimone Nathaniel L > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Chasel Chiu > --- > IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c | 16 ++++++++++++= ++-- > IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c | 14 ++++++++++++= -- > IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf | 3 ++-=20 > IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf | 3 ++- > IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | 13 +++++++++++-= - > 5 files changed, 41 insertions(+), 8 deletions(-) >=20 > diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c=20 > b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c > index 7b7c5f5d86..8128a26873 100644 > --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c > +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c > @@ -3,7 +3,7 @@ > register TemporaryRamDonePpi to call TempRamExit API, and register Memo= ryDiscoveredPpi > notify to call FspSiliconInit API. >=20 > - Copyright (c) 2014 - 2017, Intel Corporation. All rights=20 > reserved.
> + Copyright (c) 2014 - 2018, Intel Corporation. All rights=20 > + reserved.
> This program and the accompanying materials > are licensed and made available under the terms and conditions of the B= SD License > which accompanies this distribution. The full text of the license=20 > may be found at @@ -65,7 +65,7 @@ PeiFspMemoryInit ( > FspHobListPtr =3D NULL; > FspmUpdDataPtr =3D NULL; >=20 > - FspmHeaderPtr =3D (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32=20 > (PcdFspmBaseAddress)); > + FspmHeaderPtr =3D (FSP_INFO_HEADER *) FspFindFspHeader (PcdGet32=20 > + (PcdFspmBaseAddress)); > DEBUG ((DEBUG_INFO, "FspmHeaderPtr - 0x%x\n", FspmHeaderPtr)); > if (FspmHeaderPtr =3D=3D NULL) { > return EFI_DEVICE_ERROR; > @@ -155,8 +155,20 @@ FspmWrapperInit ( { > EFI_STATUS Status; >=20 > + Status =3D EFI_SUCCESS; > + > +#if FixedPcdGet8 (PcdFspModeSelection) =3D=3D 1 > Status =3D PeiFspMemoryInit (); > ASSERT_EFI_ERROR (Status); > +#else > + PeiServicesInstallFvInfoPpi ( > + NULL, > + (VOID *)(UINTN) PcdGet32 (PcdFspmBaseAddress), > + (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFspmBas= eAddress))->FvLength, > + NULL, > + NULL > + ); > +#endif >=20 > return Status; > } > diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c=20 > b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c > index 70dac7a414..d11655df89 100644 > --- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c > +++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c > @@ -3,7 +3,7 @@ > register TemporaryRamDonePpi to call TempRamExit API, and register Memo= ryDiscoveredPpi > notify to call FspSiliconInit API. >=20 > - Copyright (c) 2014 - 2017, Intel Corporation. All rights=20 > reserved.
> + Copyright (c) 2014 - 2018, Intel Corporation. All rights=20 > + reserved.
> This program and the accompanying materials > are licensed and made available under the terms and conditions of the B= SD License > which accompanies this distribution. The full text of the license=20 > may be found at @@ -349,7 +349,17 @@ FspsWrapperPeimEntryPoint ( { > DEBUG ((DEBUG_INFO, "FspsWrapperPeimEntryPoint\n")); >=20 > - FspsWrapperInit (); > +#if FixedPcdGet8 (PcdFspModeSelection) =3D=3D 1 > + FspsWrapperInit (); > +#else > + PeiServicesInstallFvInfoPpi ( > + NULL, > + (VOID *)(UINTN) PcdGet32 (PcdFspsBaseAddress), > + (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFspsB= aseAddress))->FvLength, > + NULL, > + NULL > + ); > +#endif >=20 > return EFI_SUCCESS; > } > diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf=20 > b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf > index 542356b582..b3776a80f3 100644 > --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf > +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf > @@ -6,7 +6,7 @@ > # register TemporaryRamDonePpi to call TempRamExit API, and register=20 > MemoryDiscoveredPpi # notify to call FspSiliconInit API. > # > -# Copyright (c) 2014 - 2017, Intel Corporation. All rights=20 > reserved.
> +# Copyright (c) 2014 - 2018, Intel Corporation. All rights=20 > +reserved.
> # > # This program and the accompanying materials # are licensed and=20 > made available under the terms and conditions of the BSD License @@=20 > -61,6 +61,7 @@ [Pcd] > gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress ## CONSUMES > gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress ## CONSUMES > + gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection ## CONSUMES >=20 > [Sources] > FspmWrapperPeim.c > diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf=20 > b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf > index cd87a99c40..910286982b 100644 > --- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf > +++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf > @@ -6,7 +6,7 @@ > # register TemporaryRamDonePpi to call TempRamExit API, and register=20 > MemoryDiscoveredPpi # notify to call FspSiliconInit API. > # > -# Copyright (c) 2014 - 2017, Intel Corporation. All rights=20 > reserved.
> +# Copyright (c) 2014 - 2018, Intel Corporation. All rights=20 > +reserved.
> # > # This program and the accompanying materials # are licensed and=20 > made available under the terms and conditions of the BSD License @@=20 > -68,6 +68,7 @@ [Pcd] > gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress ## CONSUMES > gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress ## CONSUMES > + gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection ## CONSUMES >=20 > [Guids] > gFspHobGuid ## CONSUMES ## HOB > diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec=20 > b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > index 69df16452d..96f2858fb4 100644 > --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > @@ -71,9 +71,8 @@ > ## Indicate the PEI memory size platform want to report > =20 > gIntelFsp2WrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize|0x3000000|UIN > T32|0x40000005 >=20 > - ## This is the base address of FSP-T/M/S > + ## This is the base address of FSP-T > =20 > gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT32|0 > x00000300 > - =20 > gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0 > x00000301 >=20 > ## This PCD indicates if FSP APIs are skipped from FSP wrapper.

> # If a bit is set, that means this FSP API is skipped.
@@ -93,7=20 > +92,17 @@ > # @Prompt Skip FSP API from FSP wrapper. > =20 > gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi|0x00000000|UINT32|0x4000 > 0009 >=20 > + ## This PCD decides how Wrapper code utilizes FSP # 0: DISPATCH=20 > + mode (FSP Wrapper will load PeiCore from FSP without calling FSP=20 > + API) # 1: API mode (FSP Wrapper will call FSP API) # =20 > + gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0x00000001|UINT8 > + |0x4000000A > + > [PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx] > + # > + ## These are the base address of FSP-M/S # > + =20 > + gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32 > + |0x00001000 > gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT32|0x= 00001001 > # > # To provide flexibility for platform to pre-allocate FSP UPD buffer > -- > 2.13.3.windows.1 >=20