From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.151, mailfrom: chasel.chiu@intel.com) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by groups.io with SMTP; Fri, 16 Aug 2019 18:12:36 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Aug 2019 18:12:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,395,1559545200"; d="scan'208";a="201703314" Received: from kmsmsx157.gar.corp.intel.com ([172.21.138.134]) by fmsmga004.fm.intel.com with ESMTP; 16 Aug 2019 18:12:34 -0700 Received: from pgsmsx111.gar.corp.intel.com ([169.254.2.22]) by kmsmsx157.gar.corp.intel.com ([169.254.5.162]) with mapi id 14.03.0439.000; Sat, 17 Aug 2019 09:12:33 +0800 From: "Chiu, Chasel" To: "Kubacki, Michael A" , "devel@edk2.groups.io" CC: "Chaganty, Rangasai V" , "Desimone, Nathaniel L" , "Gao, Liming" , "Kinney, Michael D" , "Sinha, Ankit" Subject: Re: [edk2-platforms][PATCH V1 14/37] CoffeelakeSiliconPkg: Add package common library instances Thread-Topic: [edk2-platforms][PATCH V1 14/37] CoffeelakeSiliconPkg: Add package common library instances Thread-Index: AQHVVJEWBoiSHP5RtEWdbx5cpq+V9Kb+iIcg Date: Sat, 17 Aug 2019 01:12:33 +0000 Message-ID: <3C3EFB470A303B4AB093197B6777CCEC50462301@PGSMSX111.gar.corp.intel.com> References: <20190817001603.30632-1-michael.a.kubacki@intel.com> <20190817001603.30632-15-michael.a.kubacki@intel.com> In-Reply-To: <20190817001603.30632-15-michael.a.kubacki@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMDZiMTcxOGEtMjNiYi00M2MwLTk1NDItNjgzNjJhMzlmNWVlIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoibVE0aDJPaDFcLzZvRFBKTzg1SStHK3FYdjkzMFhqVERKd2RIZjUrQkpcLzRUS29iNjNaUEVGdGVHanFWY2txeHNFIn0= x-ctpclassification: CTP_NT x-originating-ip: [172.30.20.206] MIME-Version: 1.0 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Chasel Chiu > -----Original Message----- > From: Kubacki, Michael A > Sent: Saturday, August 17, 2019 8:16 AM > To: devel@edk2.groups.io > Cc: Chaganty, Rangasai V ; Chiu, Chasel > ; Desimone, Nathaniel L > ; Gao, Liming ; > Kinney, Michael D ; Sinha, Ankit > > Subject: [edk2-platforms][PATCH V1 14/37] CoffeelakeSiliconPkg: Add packa= ge > common library instances >=20 > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D2082 >=20 > Adds package-level library class instances. >=20 > * BaseConfigBlockLib - Library functions for config block management. > * BaseSiConfigBlockLib - Library functions for managing component > config blocks. > * DxeAslUpdateLib - Services to update ACPI tables. > * PeiDxeSmmMmPciLib - Services to manage PCI Express addresses. > * PeiStallPpiLib - Installs an instance of EFI_PEI_STALL_PPI. > * PeiSiPolicyLib - Installs an instance of the Silicon Policy PPI. > Prints the Silicon Policy PPI values when DEBUG prints are enabled. >=20 > Cc: Sai Chaganty > Cc: Chasel Chiu > Cc: Nate DeSimone > Cc: Liming Gao > Cc: Michael D Kinney > Cc: Ankit Sinha > Signed-off-by: Michael Kubacki > --- >=20 > Silicon/Intel/CoffeelakeSiliconPkg/Library/BaseConfigBlockLib/BaseConfigB= lo > ckLib.inf | 29 ++ >=20 > Silicon/Intel/CoffeelakeSiliconPkg/Library/BaseSiConfigBlockLib/BaseSiCon= fig > BlockLib.inf | 33 ++ >=20 > Silicon/Intel/CoffeelakeSiliconPkg/Library/DxeAslUpdateLib/DxeAslUpdateLi= b > .inf | 40 ++ >=20 > Silicon/Intel/CoffeelakeSiliconPkg/Library/DxeAslUpdateLibNull/DxeAslUpda= t > eLibNull.inf | 30 ++ >=20 > Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiDxeSmmMmPciLib/PeiDxeSmm > MmPciLib.inf | 35 ++ >=20 > Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiInstallStallPpiLib/PeiStall= PpiLib. > inf | 31 ++ > Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiPolicyLib/PeiSiPolicyLib= .inf > | 51 +++ > Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiPolicyLib/PeiSiPolicyLib= rary.h > | 35 ++ >=20 > Silicon/Intel/CoffeelakeSiliconPkg/Library/BaseConfigBlockLib/BaseConfigB= lo > ckLib.c | 146 +++++++ >=20 > Silicon/Intel/CoffeelakeSiliconPkg/Library/BaseSiConfigBlockLib/BaseSiCon= fig > BlockLib.c | 87 +++++ >=20 > Silicon/Intel/CoffeelakeSiliconPkg/Library/DxeAslUpdateLib/DxeAslUpdateLi= b > .c | 403 ++++++++++++++++++++ >=20 > Silicon/Intel/CoffeelakeSiliconPkg/Library/DxeAslUpdateLibNull/DxeAslUpda= t > eLibNull.c | 126 ++++++ >=20 > Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiDxeSmmMmPciLib/PeiDxeSmm > MmPciLib.c | 32 ++ >=20 > Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiInstallStallPpiLib/PeiStall= PpiLib. > c | 78 ++++ > Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiPolicyLib/PeiSiPolicyLib= .c > | 214 +++++++++++ >=20 > Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiPolicyLib/PeiSiPolicyLibP= reMe > m.c | 122 ++++++ > Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiPolicyLib/SiPrintPolicy.= c > | 36 ++ > 17 files changed, 1528 insertions(+) >=20 > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Library/BaseConfigBlockLib/BaseConfi= gB > lockLib.inf > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/BaseConfigBlockLib/BaseConfi= gB > lockLib.inf > new file mode 100644 > index 0000000000..a7def2481d > --- /dev/null > +++ > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/BaseConfigBlockLib/BaseConfi= gB > lockLib.inf > @@ -0,0 +1,29 @@ > +## @file > +# Component INF file for the BaseConfigBlock library. > +# > +# Copyright (c) 2019 Intel Corporation. All rights reserved.
> +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +## > + > +[Defines] > +INF_VERSION =3D 0x00010017 > +BASE_NAME =3D BaseConfigBlockLib > +FILE_GUID =3D 1EC07EA8-7808-4e06-9D79-309AE331D2D5 > +VERSION_STRING =3D 1.0 > +MODULE_TYPE =3D BASE > +LIBRARY_CLASS =3D ConfigBlockLib > + > + > +[Packages] > +MdePkg/MdePkg.dec > +CoffeelakeSiliconPkg/SiPkg.dec > + > +[Sources] > +BaseConfigBlockLib.c > + > +[LibraryClasses] > +DebugLib > +BaseMemoryLib > +MemoryAllocationLib > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Library/BaseSiConfigBlockLib/BaseSiC= on > figBlockLib.inf > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/BaseSiConfigBlockLib/BaseSiC= on > figBlockLib.inf > new file mode 100644 > index 0000000000..b04dc3cfa4 > --- /dev/null > +++ > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/BaseSiConfigBlockLib/BaseSiC= on > figBlockLib.inf > @@ -0,0 +1,33 @@ > +## @file > +# Component description file for the BaseSiConfigBlockLib library. > +# > +# Copyright (c) 2019 Intel Corporation. All rights reserved.
> +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +## > + > +[Defines] > +INF_VERSION =3D 0x00010017 > +BASE_NAME =3D BaseSiConfigBlockLib > +FILE_GUID =3D 6C068D0F-F48E-48CB-B369-433E507AF4A2 > +VERSION_STRING =3D 1.0 > +MODULE_TYPE =3D BASE > +LIBRARY_CLASS =3D SiConfigBlockLib > + > + > +[LibraryClasses] > +DebugLib > +IoLib > +ConfigBlockLib > + > + > +[Packages] > +MdePkg/MdePkg.dec > +CoffeelakeSiliconPkg/SiPkg.dec > + > + > +[Sources] > +BaseSiConfigBlockLib.c > + > + > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Library/DxeAslUpdateLib/DxeAslUpdate > Lib.inf > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/DxeAslUpdateLib/DxeAslUpdate > Lib.inf > new file mode 100644 > index 0000000000..658caccb43 > --- /dev/null > +++ > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/DxeAslUpdateLib/DxeAslUpdate > Lib.inf > @@ -0,0 +1,40 @@ > +## @file > +# Provides services to update ASL tables. > +# > +# Copyright (c) 2019 Intel Corporation. All rights reserved.
> +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +## > + > +[Defines] > +INF_VERSION =3D 0x00010017 > +BASE_NAME =3D DxeAslUpdateLib > +FILE_GUID =3D 8621697D-4E3A-4bf2-ADB0-3E2FF06559CA > +VERSION_STRING =3D 1.0 > +MODULE_TYPE =3D BASE > +LIBRARY_CLASS =3D AslUpdateLib > + > + > +[LibraryClasses] > +BaseLib > +IoLib > +DebugLib > +PcdLib > +BaseMemoryLib > +UefiLib > +MemoryAllocationLib > + > + > +[Packages] > +MdePkg/MdePkg.dec > +CoffeelakeSiliconPkg/SiPkg.dec > + > + > +[Sources] > +DxeAslUpdateLib.c > + > + > +[Protocols] > +gEfiAcpiTableProtocolGuid ## CONSUMES > +gEfiAcpiSdtProtocolGuid ## CONSUMES > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Library/DxeAslUpdateLibNull/DxeAslUp > dateLibNull.inf > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/DxeAslUpdateLibNull/DxeAslUp > dateLibNull.inf > new file mode 100644 > index 0000000000..ae78a8e8f9 > --- /dev/null > +++ > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/DxeAslUpdateLibNull/DxeAslUp > dateLibNull.inf > @@ -0,0 +1,30 @@ > +## @file > +# Provides services to update ASL tables. > +# > +# Copyright (c) 2019 Intel Corporation. All rights reserved.
> +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +## > + > +[Defines] > +INF_VERSION =3D 0x00010017 > +BASE_NAME =3D DxeAslUpdateLibNull > +FILE_GUID =3D C7A3725F-6146-4FAB-B2EF-B4CED222DA52 > +VERSION_STRING =3D 1.0 > +MODULE_TYPE =3D BASE > +LIBRARY_CLASS =3D AslUpdateLib > + > + > + > + > +[Packages] > +MdePkg/MdePkg.dec > +CoffeelakeSiliconPkg/SiPkg.dec > + > + > +[Sources] > +DxeAslUpdateLibNull.c > + > + > + > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiDxeSmmMmPciLib/PeiDxeSm > mMmPciLib.inf > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiDxeSmmMmPciLib/PeiDxeSm > mMmPciLib.inf > new file mode 100644 > index 0000000000..fdf376bc70 > --- /dev/null > +++ > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiDxeSmmMmPciLib/PeiDxeSm > mMmPciLib.inf > @@ -0,0 +1,35 @@ > +## @file > +# Component description file for the PeiDxeSmmMmPciLib > +# > +# Copyright (c) 2019 Intel Corporation. All rights reserved.
> +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +## > + > +[Defines] > +INF_VERSION =3D 0x00010017 > +BASE_NAME =3D PeiDxeSmmMmPciLib > +FILE_GUID =3D D03D6670-A032-11E2-9E96-0800200C9A66 > +VERSION_STRING =3D 1.0 > +MODULE_TYPE =3D BASE > +LIBRARY_CLASS =3D MmPciLib > +# > +# The following information is for reference only and not required by th= e > build tools. > +# > +# VALID_ARCHITECTURES =3D IA32 X64 IPF EBC > +# > + > +[LibraryClasses] > +BaseLib > +PcdLib > +DebugLib > + > +[Packages] > +MdePkg/MdePkg.dec > + > +[Pcd] > +gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress > + > +[Sources] > +PeiDxeSmmMmPciLib.c > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiInstallStallPpiLib/PeiSta= llPpiLi > b.inf > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiInstallStallPpiLib/PeiSta= llPpiLi > b.inf > new file mode 100644 > index 0000000000..2e07a90406 > --- /dev/null > +++ > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiInstallStallPpiLib/PeiSta= llPpiLi > b.inf > @@ -0,0 +1,31 @@ > +## @file > +# Library description file for Stall Ppi installation > +# > +# Copyright (c) 2019 Intel Corporation. All rights reserved.
> +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +## > + > +[Defines] > +INF_VERSION =3D 0x00010017 > +BASE_NAME =3D PeiStallPpiLib > +FILE_GUID =3D 73E3DD0E-B2C1-4429-B0B8-F8C2BD64F8CE > +VERSION_STRING =3D 1.0 > +MODULE_TYPE =3D PEIM > +LIBRARY_CLASS =3D StallPpiLib > + > +[Sources] > +PeiStallPpiLib.c > + > +[LibraryClasses] > +BaseLib > +DebugLib > +TimerLib > +PeiServicesLib > + > +[Packages] > +MdePkg/MdePkg.dec > + > +[Ppis] > +gEfiPeiStallPpiGuid ## PRODUCES > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiPolicyLib/PeiSiPolicyLi= b.inf > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiPolicyLib/PeiSiPolicyLi= b.inf > new file mode 100644 > index 0000000000..c5945c3129 > --- /dev/null > +++ > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiPolicyLib/PeiSiPolicyLi= b.inf > @@ -0,0 +1,51 @@ > +## @file > +# Component description file for the PeiSiPolicyLib library. > +# > +# Copyright (c) 2019 Intel Corporation. All rights reserved.
> +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +## > + > +[Defines] > +INF_VERSION =3D 0x00010017 > +BASE_NAME =3D PeiSiPolicyLib > +FILE_GUID =3D 97584FAE-9299-4202-9889-2D339E4BFA5B > +VERSION_STRING =3D 1.0 > +MODULE_TYPE =3D PEIM > +LIBRARY_CLASS =3D SiPolicyLib > + > + > +[LibraryClasses] > +DebugLib > +IoLib > +PeiServicesLib > +BaseMemoryLib > +MemoryAllocationLib > +ConfigBlockLib > +CpuPolicyLib > +PchPolicyLib > +PeiSaPolicyLib > +PeiMePolicyLib > +PcdLib > + > +[Packages] > +MdePkg/MdePkg.dec > +CoffeelakeSiliconPkg/SiPkg.dec > + > + > +[Sources] > +PeiSiPolicyLib.c > +PeiSiPolicyLibrary.h > +SiPrintPolicy.c > +PeiSiPolicyLibPreMem.c > + > + > +[Guids] > +gSiConfigGuid ## CONSUMES > + > + > +[Ppis] > +gSiPolicyPpiGuid ## PRODUCES > +gSiPreMemPolicyPpiGuid ## PRODUCES > + > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiPolicyLib/PeiSiPolicyLi= brary. > h > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiPolicyLib/PeiSiPolicyLi= brary. > h > new file mode 100644 > index 0000000000..cb6b14fdd1 > --- /dev/null > +++ > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiPolicyLib/PeiSiPolicyLi= brary. > h > @@ -0,0 +1,35 @@ > +/** @file > + Header file for the PeiSiPolicyLib library. > + > + Copyright (c) 2019 Intel Corporation. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > +**/ > + > +#ifndef _PEI_SI_POLICY_LIBRARY_H_ > +#define _PEI_SI_POLICY_LIBRARY_H_ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#define TEMP_MEM_BASE_ADDRESS 0xFE600000 > +#define TEMP_IO_BASE_ADDRESS 0xD000 > + > +// > +// IO/MMIO resource limits > +// > +#define TEMP_MEM_SIZE V_PCH_XDCI_MEM_LENGTH > +#define TEMP_IO_SIZE 0x10 > + > +#endif // _PEI_SI_POLICY_LIBRARY_H_ > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Library/BaseConfigBlockLib/BaseConfi= gB > lockLib.c > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/BaseConfigBlockLib/BaseConfi= gB > lockLib.c > new file mode 100644 > index 0000000000..369dab97ee > --- /dev/null > +++ > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/BaseConfigBlockLib/BaseConfi= gB > lockLib.c > @@ -0,0 +1,146 @@ > +/** @file > + Library functions for Config Block management. > + > + Copyright (c) 2019 Intel Corporation. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > +**/ > + > +#include > +#include > +#include > +#include > +#include > + > +/** > + Create config block table > + > + @param[in] TotalSize - Max size to be allocated= for the > Config Block Table > + @param[out] ConfigBlockTableAddress - On return, points to a > pointer to the beginning of Config Block Table Address > + > + @retval EFI_INVALID_PARAMETER - Invalid Parameter > + @retval EFI_OUT_OF_RESOURCES - Out of resources > + @retval EFI_SUCCESS - Successfully created Config Block Tabl= e at > ConfigBlockTableAddress > +**/ > +EFI_STATUS > +EFIAPI > +CreateConfigBlockTable ( > + IN UINT16 TotalSize, > + OUT VOID **ConfigBlockTableAddress > + ) > +{ > + CONFIG_BLOCK_TABLE_HEADER *ConfigBlkTblAddrPtr; > + UINT32 ConfigBlkTblHdrSize; > + > + ConfigBlkTblHdrSize =3D (UINT32)(sizeof (CONFIG_BLOCK_TABLE_HEADER)); > + > + if (TotalSize <=3D (ConfigBlkTblHdrSize + sizeof (CONFIG_BLOCK_HEADER)= )) { > + DEBUG ((DEBUG_ERROR, "Invalid Parameter\n")); > + return EFI_INVALID_PARAMETER; > + } > + > + ConfigBlkTblAddrPtr =3D (CONFIG_BLOCK_TABLE_HEADER *)AllocateZeroPool > (TotalSize); > + if (ConfigBlkTblAddrPtr =3D=3D NULL) { > + DEBUG ((DEBUG_ERROR, "Could not allocate memory.\n")); > + return EFI_OUT_OF_RESOURCES; > + } > + ConfigBlkTblAddrPtr->NumberOfBlocks =3D 0; > + ConfigBlkTblAddrPtr->Header.GuidHob.Header.HobLength =3D TotalSize; > + ConfigBlkTblAddrPtr->AvailableSize =3D TotalSize - ConfigBlkTblHdrSize= ; > + > + *ConfigBlockTableAddress =3D (VOID *)ConfigBlkTblAddrPtr; > + > + return EFI_SUCCESS; > +} > + > +/** > + Add config block into config block table structure > + > + @param[in] ConfigBlockTableAddress - A pointer to the beginni= ng of > Config Block Table Address > + @param[out] ConfigBlockAddress - On return, points to a p= ointer > to the beginning of Config Block Address > + > + @retval EFI_OUT_OF_RESOURCES - Config Block Table is full and cannot a= dd > new Config Block or > + Config Block Offset Table is full and c= annot add new > Config Block. > + @retval EFI_SUCCESS - Successfully added Config Block > +**/ > +EFI_STATUS > +EFIAPI > +AddConfigBlock ( > + IN VOID *ConfigBlockTableAddress, > + OUT VOID **ConfigBlockAddress > + ) > +{ > + CONFIG_BLOCK *TempConfigBlk; > + CONFIG_BLOCK_TABLE_HEADER *ConfigBlkTblAddrPtr; > + CONFIG_BLOCK *ConfigBlkAddrPtr; > + UINT16 ConfigBlkSize; > + > + ConfigBlkTblAddrPtr =3D (CONFIG_BLOCK_TABLE_HEADER > *)ConfigBlockTableAddress; > + ConfigBlkAddrPtr =3D (CONFIG_BLOCK *)(*ConfigBlockAddress); > + ConfigBlkSize =3D ConfigBlkAddrPtr->Header.GuidHob.Header.HobLength; > + DEBUG ((DEBUG_INFO, "Config Block GUID: %g / Config Block Size: 0x%x > bytes\n", &(ConfigBlkAddrPtr->Header.GuidHob.Name), ConfigBlkSize)); > + if ((ConfigBlkSize % 4) !=3D 0) { > + DEBUG ((DEBUG_ERROR, "Config Block must be multiples of 4 bytes\n"))= ; > + return EFI_INVALID_PARAMETER; > + } > + if (ConfigBlkTblAddrPtr->AvailableSize < ConfigBlkSize) { > + DEBUG ((DEBUG_ERROR, "Config Block Table is full and cannot add new > Config Block.\n")); > + DEBUG ((DEBUG_ERROR, "Available Config Block Size: 0x%x bytes / > Requested Config Block Size: 0x%x bytes\n", > ConfigBlkTblAddrPtr->AvailableSize, ConfigBlkSize)); > + return EFI_OUT_OF_RESOURCES; > + } > + > + TempConfigBlk =3D (CONFIG_BLOCK *)((UINTN)ConfigBlkTblAddrPtr + > (UINTN)(ConfigBlkTblAddrPtr->Header.GuidHob.Header.HobLength - > ConfigBlkTblAddrPtr->AvailableSize)); > + CopyMem (&TempConfigBlk->Header, &ConfigBlkAddrPtr->Header, > sizeof(CONFIG_BLOCK_HEADER)); > + > + ConfigBlkTblAddrPtr->NumberOfBlocks++; > + ConfigBlkTblAddrPtr->AvailableSize =3D ConfigBlkTblAddrPtr->AvailableS= ize - > ConfigBlkSize; > + > + *ConfigBlockAddress =3D (VOID *) TempConfigBlk; > + DEBUG ((DEBUG_INFO, "Config Block Address: 0x%x / Available Config Blo= ck > Size: 0x%x bytes\n", (UINT32)(UINTN)*ConfigBlockAddress, > ConfigBlkTblAddrPtr->AvailableSize)); > + return EFI_SUCCESS; > +} > + > +/** > + Retrieve a specific Config Block data by GUID > + > + @param[in] ConfigBlockTableAddress - A pointer to the beginn= ing > of Config Block Table Address > + @param[in] ConfigBlockGuid - A pointer to the GUID u= ses to > search specific Config Block > + @param[out] ConfigBlockAddress - On return, points to a > pointer to the beginning of Config Block Address > + > + @retval EFI_NOT_FOUND - Could not find the Config Block > + @retval EFI_SUCCESS - Config Block found and return > +**/ > +EFI_STATUS > +EFIAPI > +GetConfigBlock ( > + IN VOID *ConfigBlockTableAddress, > + IN EFI_GUID *ConfigBlockGuid, > + OUT VOID **ConfigBlockAddress > + ) > +{ > + UINT16 OffsetIndex; > + CONFIG_BLOCK *TempConfigBlk; > + CONFIG_BLOCK_TABLE_HEADER *ConfigBlkTblAddrPtr; > + UINT32 ConfigBlkTblHdrSize; > + UINT32 ConfigBlkOffset; > + UINT16 NumOfBlocks; > + > + ConfigBlkTblHdrSize =3D (UINT32)(sizeof (CONFIG_BLOCK_TABLE_HEADER)); > + ConfigBlkTblAddrPtr =3D (CONFIG_BLOCK_TABLE_HEADER > *)ConfigBlockTableAddress; > + NumOfBlocks =3D ConfigBlkTblAddrPtr->NumberOfBlocks; > + > + ConfigBlkOffset =3D 0; > + for (OffsetIndex =3D 0; OffsetIndex < NumOfBlocks; OffsetIndex++) { > + if ((ConfigBlkTblHdrSize + ConfigBlkOffset) > > (ConfigBlkTblAddrPtr->Header.GuidHob.Header.HobLength)) { > + break; > + } > + TempConfigBlk =3D (CONFIG_BLOCK *)((UINTN)ConfigBlkTblAddrPtr + > (UINTN)ConfigBlkTblHdrSize + (UINTN)ConfigBlkOffset); > + if (CompareGuid (&(TempConfigBlk->Header.GuidHob.Name), > ConfigBlockGuid)) { > + *ConfigBlockAddress =3D (VOID *)TempConfigBlk; > + return EFI_SUCCESS; > + } > + ConfigBlkOffset =3D ConfigBlkOffset + > TempConfigBlk->Header.GuidHob.Header.HobLength; > + } > + DEBUG ((DEBUG_ERROR, "Could not find the config block.\n")); > + return EFI_NOT_FOUND; > +} > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Library/BaseSiConfigBlockLib/BaseSiC= on > figBlockLib.c > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/BaseSiConfigBlockLib/BaseSiC= on > figBlockLib.c > new file mode 100644 > index 0000000000..16a14b3245 > --- /dev/null > +++ > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/BaseSiConfigBlockLib/BaseSiC= on > figBlockLib.c > @@ -0,0 +1,87 @@ > +/** @file > + This file is BaseSiConfigBlockLib library is used to add config blocks > + to config block header. > + > + Copyright (c) 2019 Intel Corporation. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > +**/ > + > +#include > +#include > +#include > +#include > +#include > +#include > + > + > +/** > + GetComponentConfigBlockTotalSize get config block table total size. > + > + @param[in] ComponentBlocks Component blocks array > + @param[in] TotalBlockCount Number of blocks > + > + @retval Size of config block table > +**/ > +UINT16 > +EFIAPI > +GetComponentConfigBlockTotalSize ( > + IN COMPONENT_BLOCK_ENTRY *ComponentBlocks, > + IN UINT16 TotalBlockCount > + ) > +{ > + UINT16 TotalBlockSize; > + UINT16 BlockCount; > + > + TotalBlockSize =3D 0; > + for (BlockCount =3D 0 ; BlockCount < TotalBlockCount; BlockCount++) { > + TotalBlockSize +=3D (UINT32) ComponentBlocks[BlockCount].Size; > + DEBUG ((DEBUG_INFO, "TotalBlockSize after adding Block[0x%x]=3D 0x%x= \n", > BlockCount, TotalBlockSize)); > + } > + > + return TotalBlockSize; > +} > + > +/** > + AddComponentConfigBlocks add all config blocks. > + > + @param[in] ConfigBlockTableAddress The pointer to add config blocks > + @param[in] ComponentBlocks Config blocks array > + @param[in] TotalBlockCount Number of blocks > + > + @retval EFI_SUCCESS The policy default is initialize= d. > + @retval EFI_OUT_OF_RESOURCES Insufficient resources to create > buffer > +**/ > +EFI_STATUS > +EFIAPI > +AddComponentConfigBlocks ( > + IN VOID *ConfigBlockTableAddress, > + IN COMPONENT_BLOCK_ENTRY *ComponentBlocks, > + IN UINT16 TotalBlockCount > + ) > +{ > + UINT16 BlockCount; > + VOID *ConfigBlockPointer; > + CONFIG_BLOCK ConfigBlockBuf; > + EFI_STATUS Status; > + > + Status =3D EFI_SUCCESS; > + > + // > + // Initialize ConfigBlockPointer to NULL > + // > + ConfigBlockPointer =3D NULL; > + // > + // Loop to identify each config block from ComponentBlocks[] Table and= add > each of them > + // > + for (BlockCount =3D 0 ; BlockCount < TotalBlockCount; BlockCount++) { > + CopyMem (&(ConfigBlockBuf.Header.GuidHob.Name), > ComponentBlocks[BlockCount].Guid, sizeof (EFI_GUID)); > + ConfigBlockBuf.Header.GuidHob.Header.HobLength =3D > ComponentBlocks[BlockCount].Size; > + ConfigBlockBuf.Header.Revision =3D > ComponentBlocks[BlockCount].Revision; > + ConfigBlockPointer =3D (VOID *)&ConfigBlockBuf; > + Status =3D AddConfigBlock ((VOID *)ConfigBlockTableAddress, (VOID > *)&ConfigBlockPointer); > + ASSERT_EFI_ERROR (Status); > + ComponentBlocks[BlockCount].LoadDefault (ConfigBlockPointer); > + } > + return Status; > +} > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Library/DxeAslUpdateLib/DxeAslUpdate > Lib.c > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/DxeAslUpdateLib/DxeAslUpdate > Lib.c > new file mode 100644 > index 0000000000..04cf66fd2f > --- /dev/null > +++ > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/DxeAslUpdateLib/DxeAslUpdate > Lib.c > @@ -0,0 +1,403 @@ > +/** @file > + Boot service DXE ASL update library implementation. > + > + These functions in this file can be called during DXE and cannot be ca= lled > during runtime > + or in SMM which should use a RT or SMM library. > + > + This library uses the ACPI Support protocol. > + > + Copyright (c) 2019 Intel Corporation. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > +**/ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include > + > +// > +// Function implemenations > +// > +static EFI_ACPI_SDT_PROTOCOL *mAcpiSdt =3D NULL; > +static EFI_ACPI_TABLE_PROTOCOL *mAcpiTable =3D NULL; > + > +/** > + Initialize the ASL update library state. > + This must be called prior to invoking other library functions. > + > + @retval EFI_SUCCESS - The function completed successfully. > +**/ > +EFI_STATUS > +InitializeAslUpdateLib ( > + VOID > + ) > +{ > + EFI_STATUS Status; > + > + /// > + /// Locate ACPI tables > + /// > + Status =3D gBS->LocateProtocol (&gEfiAcpiSdtProtocolGuid, NULL, (VOID = **) > &mAcpiSdt); > + ASSERT_EFI_ERROR (Status); > + Status =3D gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOI= D **) > &mAcpiTable); > + ASSERT_EFI_ERROR (Status); > + return Status; > +} > + > + > +/** > + This procedure will update immediate value assigned to a Name > + > + @param[in] AslSignature - The signature of Operation Region that = we > want to update. > + @param[in] Buffer - source of data to be written over origi= nal aml > + @param[in] Length - length of data to be overwritten > + > + @retval EFI_SUCCESS - The function completed successfully. > + @retval EFI_NOT_FOUND - Failed to locate AcpiTable. > +**/ > +EFI_STATUS > +UpdateNameAslCode ( > + IN UINT32 AslSignature, > + IN VOID *Buffer, > + IN UINTN Length > + ) > +{ > + EFI_STATUS Status; > + EFI_ACPI_DESCRIPTION_HEADER *Table; > + UINT8 *CurrPtr; > + UINT32 *Signature; > + UINT8 *DsdtPointer; > + UINTN Handle; > + UINT8 DataSize; > + > + if (mAcpiTable =3D=3D NULL) { > + InitializeAslUpdateLib (); > + if (mAcpiTable =3D=3D NULL) { > + return EFI_NOT_READY; > + } > + } > + > + /// > + /// Locate table with matching ID > + /// > + Handle =3D 0; > + Status =3D LocateAcpiTableBySignature ( > + > EFI_ACPI_3_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE, > + (EFI_ACPI_DESCRIPTION_HEADER **) &Table, > + &Handle > + ); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + /// > + /// Point to the beginning of the DSDT table > + /// > + CurrPtr =3D (UINT8 *) Table; > + if (CurrPtr =3D=3D NULL) { > + return EFI_NOT_FOUND; > + } > + > + /// > + /// Loop through the ASL looking for values that we must fix up. > + /// > + for (DsdtPointer =3D CurrPtr; DsdtPointer < (CurrPtr + > ((EFI_ACPI_COMMON_HEADER *) CurrPtr)->Length); DsdtPointer++) { > + /// > + /// Get a pointer to compare for signature > + /// > + Signature =3D (UINT32 *) DsdtPointer; > + /// > + /// Check if this is the Device Object signature we are looking for > + /// > + if ((*Signature) =3D=3D AslSignature) { > + /// > + /// Look for Name Encoding > + /// > + if (*(DsdtPointer-1) =3D=3D AML_NAME_OP) { > + /// > + /// Check if size of new and old data is the same > + /// > + DataSize =3D *(DsdtPointer+4); > + if ((Length =3D=3D 1 && DataSize =3D=3D 0xA) || > + (Length =3D=3D 2 && DataSize =3D=3D 0xB) || > + (Length =3D=3D 4 && DataSize =3D=3D 0xC)) { > + CopyMem (DsdtPointer+5, Buffer, Length); > + } else if (Length =3D=3D 1 && ((*(UINT8*) Buffer) =3D=3D 0 || (*= (UINT8*) Buffer) =3D=3D > 1) && (DataSize =3D=3D 0 || DataSize =3D=3D 1)) { > + CopyMem (DsdtPointer+4, Buffer, Length); > + } else { > + FreePool (Table); > + return EFI_BAD_BUFFER_SIZE; > + } > + Status =3D mAcpiTable->UninstallAcpiTable ( > + mAcpiTable, > + Handle > + ); > + Handle =3D 0; > + Status =3D mAcpiTable->InstallAcpiTable ( > + mAcpiTable, > + Table, > + Table->Length, > + &Handle > + ); > + FreePool (Table); > + return Status; > + } > + } > + } > + return EFI_NOT_FOUND; > +} > + > +/** > + This procedure will update the name of ASL Method > + > + @param[in] AslSignature - The signature of Operation Region that = we > want to update. > + @param[in] Buffer - source of data to be written over origi= nal aml > + @param[in] Length - length of data to be overwritten > + > + @retval EFI_SUCCESS - The function completed successfully. > + @retval EFI_NOT_FOUND - Failed to locate AcpiTable. > +**/ > +EFI_STATUS > +UpdateMethodAslCode ( > + IN UINT32 AslSignature, > + IN VOID *Buffer, > + IN UINTN Length > + ) > +{ > + EFI_STATUS Status; > + EFI_ACPI_DESCRIPTION_HEADER *Table; > + UINT8 *CurrPtr; > + UINT32 *Signature; > + UINT8 *DsdtPointer; > + UINTN Handle; > + > + if (mAcpiTable =3D=3D NULL) { > + InitializeAslUpdateLib (); > + if (mAcpiTable =3D=3D NULL) { > + return EFI_NOT_READY; > + } > + } > + > + /// > + /// Locate table with matching ID > + /// > + Handle =3D 0; > + Status =3D LocateAcpiTableBySignature ( > + > EFI_ACPI_3_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE, > + (EFI_ACPI_DESCRIPTION_HEADER **) &Table, > + &Handle > + ); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + /// > + /// Point to the beginning of the DSDT table > + /// > + CurrPtr =3D (UINT8 *) Table; > + if (CurrPtr =3D=3D NULL) { > + return EFI_NOT_FOUND; > + } > + > + /// > + /// Loop through the ASL looking for values that we must fix up. > + /// > + for (DsdtPointer =3D CurrPtr; DsdtPointer < (CurrPtr + > ((EFI_ACPI_COMMON_HEADER *) CurrPtr)->Length); DsdtPointer++) { > + /// > + /// Get a pointer to compare for signature > + /// > + Signature =3D (UINT32 *) DsdtPointer; > + /// > + /// Check if this is the Device Object signature we are looking for > + /// > + if ((*Signature) =3D=3D AslSignature) { > + /// > + /// Look for Name Encoding > + /// > + if ((*(DsdtPointer-3) =3D=3D AML_METHOD_OP) > + || (*(DsdtPointer-2) =3D=3D AML_METHOD_OP) > + ) > + { > + CopyMem (DsdtPointer, Buffer, Length); > + Status =3D mAcpiTable->UninstallAcpiTable ( > + mAcpiTable, > + Handle > + ); > + Handle =3D 0; > + Status =3D mAcpiTable->InstallAcpiTable ( > + mAcpiTable, > + Table, > + Table->Length, > + &Handle > + ); > + FreePool (Table); > + return Status; > + } > + } > + } > + return EFI_NOT_FOUND; > +} > + > +/** > + This function uses the ACPI SDT protocol to locate an ACPI table. > + It is really only useful for finding tables that only have a single in= stance, > + e.g. FADT, FACS, MADT, etc. It is not good for locating SSDT, etc. > + > + @param[in] Signature - Pointer to an ASCII string containing= the > OEM Table ID from the ACPI table header > + @param[in, out] Table - Updated with a pointer to the table > + @param[in, out] Handle - AcpiSupport protocol table handle for= the > table found > + @param[in, out] Version - The version of the table desired > + > + @retval EFI_SUCCESS - The function completed successfully. > +**/ > +EFI_STATUS > +LocateAcpiTableBySignature ( > + IN UINT32 Signature, > + IN OUT EFI_ACPI_DESCRIPTION_HEADER **Table, > + IN OUT UINTN *Handle > + ) > +{ > + EFI_STATUS Status; > + INTN Index; > + EFI_ACPI_TABLE_VERSION Version; > + EFI_ACPI_DESCRIPTION_HEADER *OrgTable; > + > + if (mAcpiSdt =3D=3D NULL) { > + InitializeAslUpdateLib (); > + if (mAcpiSdt =3D=3D NULL) { > + return EFI_NOT_READY; > + } > + } > + > + /// > + /// Locate table with matching ID > + /// > + Version =3D 0; > + Index =3D 0; > + do { > + Status =3D mAcpiSdt->GetAcpiTable (Index, (EFI_ACPI_SDT_HEADER > **)&OrgTable, &Version, Handle); > + if (Status =3D=3D EFI_NOT_FOUND) { > + break; > + } > + ASSERT_EFI_ERROR (Status); > + Index++; > + } while (OrgTable->Signature !=3D Signature); > + > + if (Status !=3D EFI_NOT_FOUND) { > + *Table =3D AllocateCopyPool (OrgTable->Length, OrgTable); > + ASSERT (*Table); > + } > + > + /// > + /// If we found the table, there will be no error. > + /// > + return Status; > +} > + > +/** > + This function uses the ACPI SDT protocol to locate an ACPI SSDT table. > + > + @param[in] TableId - Pointer to an ASCII string containing t= he OEM > Table ID from the ACPI table header > + @param[in] TableIdSize - Length of the TableId to match. Table = ID are > 8 bytes long, this function > + will consider it a match if the first T= ableIdSize bytes > match > + @param[in, out] Table - Updated with a pointer to the table > + @param[in, out] Handle - AcpiSupport protocol table handle for t= he > table found > + @param[in, out] Version - See AcpiSupport protocol, GetAcpiTable > function for use > + > + @retval EFI_SUCCESS - The function completed successfully. > +**/ > +EFI_STATUS > +LocateAcpiTableByOemTableId ( > + IN UINT8 *TableId, > + IN UINT8 TableIdSize, > + IN OUT EFI_ACPI_DESCRIPTION_HEADER **Table, > + IN OUT UINTN *Handle > + ) > +{ > + EFI_STATUS Status; > + INTN Index; > + EFI_ACPI_TABLE_VERSION Version; > + EFI_ACPI_DESCRIPTION_HEADER *OrgTable; > + > + if (mAcpiSdt =3D=3D NULL) { > + InitializeAslUpdateLib (); > + if (mAcpiSdt =3D=3D NULL) { > + return EFI_NOT_READY; > + } > + } > + /// > + /// Locate table with matching ID > + /// > + Version =3D 0; > + Index =3D 0; > + do { > + Status =3D mAcpiSdt->GetAcpiTable (Index, (EFI_ACPI_SDT_HEADER > **)&OrgTable, &Version, Handle); > + if (Status =3D=3D EFI_NOT_FOUND) { > + break; > + } > + ASSERT_EFI_ERROR (Status); > + Index++; > + } while (CompareMem (&(OrgTable->OemTableId), TableId, TableIdSize)); > + > + if (Status !=3D EFI_NOT_FOUND) { > + *Table =3D AllocateCopyPool (OrgTable->Length, OrgTable); > + ASSERT (*Table); > + } > + > + /// > + /// If we found the table, there will be no error. > + /// > + return Status; > +} > + > +/** > + This function calculates and updates an UINT8 checksum. > + > + @param[in] Buffer Pointer to buffer to checksum > + @param[in] Size Number of bytes to checksum > + @param[in] ChecksumOffset Offset to place the checksum result in > + > + @retval EFI_SUCCESS The function completed successfully. > +**/ > +EFI_STATUS > +AcpiChecksum ( > + IN VOID *Buffer, > + IN UINTN Size, > + IN UINTN ChecksumOffset > + ) > +{ > + UINT8 Sum; > + UINT8 *Ptr; > + > + Sum =3D 0; > + /// > + /// Initialize pointer > + /// > + Ptr =3D Buffer; > + > + /// > + /// set checksum to 0 first > + /// > + Ptr[ChecksumOffset] =3D 0; > + > + /// > + /// add all content of buffer > + /// > + while (Size--) { > + Sum =3D (UINT8) (Sum + (*Ptr++)); > + } > + /// > + /// set checksum > + /// > + Ptr =3D Buffer; > + Ptr[ChecksumOffset] =3D (UINT8) (0xff - Sum + 1); > + > + return EFI_SUCCESS; > +} > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Library/DxeAslUpdateLibNull/DxeAslUp > dateLibNull.c > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/DxeAslUpdateLibNull/DxeAslUp > dateLibNull.c > new file mode 100644 > index 0000000000..a7ce92b7c3 > --- /dev/null > +++ > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/DxeAslUpdateLibNull/DxeAslUp > dateLibNull.c > @@ -0,0 +1,126 @@ > +/** @file > + Boot service DXE ASL update library implementation. > + > + These functions in this file can be called during DXE and cannot be ca= lled > during runtime > + or in SMM which should use a RT or SMM library. > + > + This library uses the ACPI Support protocol. > + > + Copyright (c) 2019 Intel Corporation. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > +**/ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include > + > +// > +// Function implemenations > +// > + > +/** > + Initialize the ASL update library state. > + This must be called prior to invoking other library functions. > + > + @retval EFI_SUCCESS - The function completed successfully. > +**/ > +EFI_STATUS > +InitializeAslUpdateLib ( > + VOID > + ) > +{ > + return EFI_SUCCESS; > +} > + > + > +/** > + This procedure will update immediate value assigned to a Name > + > + @param[in] AslSignature - The signature of Operation Region that = we > want to update. > + @param[in] Buffer - source of data to be written over origi= nal aml > + @param[in] Length - length of data to be overwritten > + > + @retval EFI_SUCCESS - The function completed successfully. > +**/ > +EFI_STATUS > +UpdateNameAslCode ( > + IN UINT32 AslSignature, > + IN VOID *Buffer, > + IN UINTN Length > + ) > +{ > + return EFI_SUCCESS; > +} > + > + > +/** > + This function uses the ACPI SDT protocol to locate an ACPI table. > + It is really only useful for finding tables that only have a single in= stance, > + e.g. FADT, FACS, MADT, etc. It is not good for locating SSDT, etc. > + > + @param[in] Signature - Pointer to an ASCII string containing= the > OEM Table ID from the ACPI table header > + @param[in, out] Table - Updated with a pointer to the table > + @param[in, out] Handle - AcpiSupport protocol table handle for= the > table found > + @param[in, out] Version - The version of the table desired > + > + @retval EFI_SUCCESS - The function completed successfully. > +**/ > +EFI_STATUS > +LocateAcpiTableBySignature ( > + IN UINT32 Signature, > + IN OUT EFI_ACPI_DESCRIPTION_HEADER **Table, > + IN OUT UINTN *Handle > + ) > +{ > + return EFI_SUCCESS; > +} > + > +/** > + This function uses the ACPI SDT protocol to locate an ACPI SSDT table. > + > + @param[in] TableId - Pointer to an ASCII string containing t= he OEM > Table ID from the ACPI table header > + @param[in] TableIdSize - Length of the TableId to match. Table = ID are > 8 bytes long, this function > + will consider it a match if the first T= ableIdSize bytes > match > + @param[in, out] Table - Updated with a pointer to the table > + @param[in, out] Handle - AcpiSupport protocol table handle for t= he > table found > + @param[in, out] Version - See AcpiSupport protocol, GetAcpiTable > function for use > + > + @retval EFI_SUCCESS - The function completed successfully. > +**/ > +EFI_STATUS > +LocateAcpiTableByOemTableId ( > + IN UINT8 *TableId, > + IN UINT8 TableIdSize, > + IN OUT EFI_ACPI_DESCRIPTION_HEADER **Table, > + IN OUT UINTN *Handle > + ) > +{ > + return EFI_SUCCESS; > +} > + > +/** > + This function calculates and updates an UINT8 checksum. > + > + @param[in] Buffer Pointer to buffer to checksum > + @param[in] Size Number of bytes to checksum > + @param[in] ChecksumOffset Offset to place the checksum result in > + > + @retval EFI_SUCCESS The function completed successfully. > +**/ > +EFI_STATUS > +AcpiChecksum ( > + IN VOID *Buffer, > + IN UINTN Size, > + IN UINTN ChecksumOffset > + ) > +{ > + return EFI_SUCCESS; > +} > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiDxeSmmMmPciLib/PeiDxeSm > mMmPciLib.c > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiDxeSmmMmPciLib/PeiDxeSm > mMmPciLib.c > new file mode 100644 > index 0000000000..5085f29d6d > --- /dev/null > +++ > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiDxeSmmMmPciLib/PeiDxeSm > mMmPciLib.c > @@ -0,0 +1,32 @@ > +/** @file > + This file contains routines that get PCI Express Address > + > + Copyright (c) 2019 Intel Corporation. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > +**/ > + > +#include > +#include > +#include > + > +/** > + This procedure will get PCIE address > + > + @param[in] Bus Pci Bus Number > + @param[in] Device Pci Device Number > + @param[in] Function Pci Function Number > + > + @retval PCIE address > +**/ > +UINTN > +MmPciBase ( > + IN UINT32 Bus, > + IN UINT32 Device, > + IN UINT32 Function > + ) > +{ > + ASSERT ((Bus <=3D 0xFF) && (Device <=3D 0x1F) && (Function <=3D 0x7)); > + > + return ((UINTN) PcdGet64 (PcdPciExpressBaseAddress) + (UINTN) (Bus << = 20) > + (UINTN) (Device << 15) + (UINTN) (Function << 12)); > +} > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiInstallStallPpiLib/PeiSta= llPpiLi > b.c > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiInstallStallPpiLib/PeiSta= llPpiLi > b.c > new file mode 100644 > index 0000000000..d462aef407 > --- /dev/null > +++ > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiInstallStallPpiLib/PeiSta= llPpiLi > b.c > @@ -0,0 +1,78 @@ > +/** @file > + Library to install StallPpi. > + > + Copyright (c) 2019 Intel Corporation. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > +**/ > + > +#include > +#include > +#include > +#include > +#include > + > +#define PEI_STALL_RESOLUTION 1 > + > +/** > + This function provides a blocking stall for reset at least the given n= umber of > microseconds > + stipulated in the final argument. > + > + @param PeiServices General purpose services available to every PEIM. > + @param this Pointer to the local data for the interface. > + @param Microseconds number of microseconds for which to stall. > + > + @retval EFI_SUCCESS the function provided at least the required stall= . > +**/ > +EFI_STATUS > +EFIAPI > +Stall ( > + IN CONST EFI_PEI_SERVICES **PeiServices, > + IN CONST EFI_PEI_STALL_PPI *This, > + IN UINTN Microseconds > + ); > + > + > +EFI_PEI_STALL_PPI mStallPpi =3D { > + PEI_STALL_RESOLUTION, > + Stall > +}; > + > +EFI_PEI_PPI_DESCRIPTOR mPeiInstallStallPpi =3D { > + (EFI_PEI_PPI_DESCRIPTOR_PPI | > EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST), > + &gEfiPeiStallPpiGuid, > + &mStallPpi > +}; > + > +EFI_STATUS > +EFIAPI > +Stall ( > + IN CONST EFI_PEI_SERVICES **PeiServices, > + IN CONST EFI_PEI_STALL_PPI *This, > + IN UINTN Microseconds > + ) > +{ > + MicroSecondDelay (Microseconds); > + return EFI_SUCCESS; > +} > + > +/** > + This function will install the StallPpi. > + > + @retval EFI_SUCCESS if StallPpi is installed successfully. > +**/ > +EFI_STATUS > +EFIAPI > +InstallStallPpi ( > + VOID > + ) > +{ > + EFI_STATUS Status; > + > + DEBUG((DEBUG_INFO, "Installing StallPpi \n")); > + > + Status =3D PeiServicesInstallPpi (&mPeiInstallStallPpi); > + ASSERT_EFI_ERROR (Status); > + > + return Status; > +} > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiPolicyLib/PeiSiPolicyLi= b.c > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiPolicyLib/PeiSiPolicyLi= b.c > new file mode 100644 > index 0000000000..de8d9745d3 > --- /dev/null > +++ > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiPolicyLib/PeiSiPolicyLi= b.c > @@ -0,0 +1,214 @@ > +/** @file > + This file is PeiSiPolicyLib library creates default settings of RC > + Policy and installs RC Policy PPI. > + > + Copyright (c) 2019 Intel Corporation. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > +**/ > + > +#include "PeiSiPolicyLibrary.h" > +#include > + > +/** > + Get Si config block table total size. > + > + @retval Size of PCH config block table > +**/ > +UINT16 > +EFIAPI > +SiGetConfigBlockTotalSize ( > + VOID > + ) > +{ > + return (UINT16) sizeof (SI_CONFIG); > +} > + > +EFI_STATUS > +EFIAPI > +LoadSiConfigBlockDefault ( > + IN VOID *ConfigBlockPointer > + ) > +{ > + SI_CONFIG *SiConfig; > + > + SiConfig =3D ConfigBlockPointer; > + > + DEBUG ((DEBUG_INFO, "SiConfig->Header.GuidHob.Name =3D %g\n", > &SiConfig->Header.GuidHob.Name)); > + DEBUG ((DEBUG_INFO, "SiConfig->Header.GuidHob.Header.HobLength =3D > 0x%x\n", SiConfig->Header.GuidHob.Header.HobLength)); > + > + SiConfig->Header.Revision =3D SI_CONFIG_REVISION; > + > + return EFI_SUCCESS; > +} > + > +EFI_STATUS > +EFIAPI > +SiAddConfigBlocks ( > + IN VOID *ConfigBlockTableAddress > + ) > +{ > + VOID *ConfigBlockPointer; > + EFI_STATUS Status; > + CONFIG_BLOCK_HEADER SiBlock; > + > + // > + // Initalize SiBlock > + // > + CopyMem (&(SiBlock.GuidHob.Name), &gSiConfigGuid, sizeof (EFI_GUID)); > + SiBlock.GuidHob.Header.HobLength =3D sizeof (SI_CONFIG); > + SiBlock.Revision =3D SI_CONFIG_REVISION; > + // > + // Initialize ConfigBlockPointer > + // > + ConfigBlockPointer =3D (VOID *)&SiBlock; > + // > + // Add config block fro SiBlock > + // > + DEBUG ((DEBUG_INFO, "gSiConfigGuid =3D %g\n", &gSiConfigGuid)); > + DEBUG ((DEBUG_INFO, "SiConfig->Header.GuidHob.Name =3D %g\n", > &(SiBlock.GuidHob.Name))); > + Status =3D AddConfigBlock (ConfigBlockTableAddress, (VOID *) > &ConfigBlockPointer); > + ASSERT_EFI_ERROR (Status); > + > + LoadSiConfigBlockDefault ((VOID *) ConfigBlockPointer); > + > + return Status; > +} > + > +/** > + SiCreateConfigBlocks creates the config blocksg of Silicon Policy. > + It allocates and zero out buffer, and fills in the Intel default setti= ngs. > + > + @param[out] SiPolicyPpi The pointer to get Silicon Policy PPI = instance > + > + @retval EFI_SUCCESS The policy default is initialized. > + @retval EFI_OUT_OF_RESOURCES Insufficient resources to create buffe= r > +**/ > +EFI_STATUS > +EFIAPI > +SiCreateConfigBlocks ( > + OUT SI_POLICY_PPI **SiPolicyPpi > + ) > +{ > + UINT16 TotalBlockSize; > + EFI_STATUS Status; > + SI_POLICY_PPI *SiPolicy; > + UINT16 RequiredSize; > + > + SiPolicy =3D NULL; > + // > + // TotalBlockSize =3D Si, Pch, ME, SA and CPU config block size. > + // > + TotalBlockSize =3D SiGetConfigBlockTotalSize () + > + PchGetConfigBlockTotalSize () + > + MeGetConfigBlockTotalSize () + > + SaGetConfigBlockTotalSize () + > + CpuGetConfigBlockTotalSize (); > + DEBUG ((DEBUG_INFO, "TotalBlockSize =3D 0x%x\n", TotalBlockSize)); > + > + RequiredSize =3D sizeof (CONFIG_BLOCK_TABLE_HEADER) + TotalBlockSize; > + > + Status =3D CreateConfigBlockTable (RequiredSize, (VOID *) &SiPolicy); > + ASSERT_EFI_ERROR (Status); > + > + // > + // General initialization > + // > + SiPolicy->TableHeader.Header.Revision =3D SI_POLICY_REVISION; > + // > + // Add config blocks. > + // > + Status =3D SiAddConfigBlocks ((VOID *) SiPolicy); > + ASSERT_EFI_ERROR (Status); > + Status =3D PchAddConfigBlocks ((VOID *) SiPolicy); > + ASSERT_EFI_ERROR (Status); > + Status =3D MeAddConfigBlocks ((VOID *) SiPolicy); > + ASSERT_EFI_ERROR (Status); > + Status =3D SaAddConfigBlocks ((VOID *) SiPolicy); > + ASSERT_EFI_ERROR (Status); > + Status =3D CpuAddConfigBlocks ((VOID *) SiPolicy); > + ASSERT_EFI_ERROR (Status); > + > + // > + // Assignment for returning SaInitPolicy config block base address > + // > + *SiPolicyPpi =3D SiPolicy; > + return Status; > +} > + > +/** > + Print out all silicon policy information. > + > + @param[in] SiPolicyPpi The pointer to Silicon Policy PPI insta= nce > + > + @retval none > +**/ > +VOID > +DumpSiPolicy ( > + IN SI_POLICY_PPI *SiPolicyPpi > + ) > +{ > + // > + // Print SI config blocks and serial out. > + // > + SiPrintPolicyPpi (SiPolicyPpi); > + // > + // Print PCH config blocks and serial out. > + // > + PchPrintPolicyPpi (SiPolicyPpi); > + // > + // Print ME config blocks and serial out. > + // > + MePrintPolicyPpi (SiPolicyPpi); > + // > + // Print SA config blocks and serial out. > + // > + SaPrintPolicyPpi (SiPolicyPpi); > + // > + // Print CPU config block and serial out. > + // > + CpuPrintPolicy (SiPolicyPpi); > +} > + > +/** > + SiInstallPolicyPpi installs SiPolicyPpi. > + While installed, RC assumes the Policy is ready and finalized. So plea= se > update and override > + any setting before calling this function. > + > + @param[in] SiPolicyPpi The pointer to Silicon Policy PPI insta= nce > + > + @retval EFI_SUCCESS The policy is installed. > + @retval EFI_OUT_OF_RESOURCES Insufficient resources to create buffer > +**/ > +EFI_STATUS > +EFIAPI > +SiInstallPolicyPpi ( > + IN SI_POLICY_PPI *SiPolicyPpi > + ) > +{ > + EFI_STATUS Status; > + EFI_PEI_PPI_DESCRIPTOR *SiPolicyPpiDesc; > + SI_CONFIG *SiConfig; > + > + SiPolicyPpiDesc =3D (EFI_PEI_PPI_DESCRIPTOR *) AllocateZeroPool (sizeo= f > (EFI_PEI_PPI_DESCRIPTOR)); > + if (SiPolicyPpiDesc =3D=3D NULL) { > + ASSERT (FALSE); > + return EFI_OUT_OF_RESOURCES; > + } > + > + SiPolicyPpiDesc->Flags =3D EFI_PEI_PPI_DESCRIPTOR_PPI | > EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST; > + SiPolicyPpiDesc->Guid =3D &gSiPolicyPpiGuid; > + SiPolicyPpiDesc->Ppi =3D SiPolicyPpi; > + Status =3D GetConfigBlock ((VOID *) SiPolicyPpi, &gSiConfigGuid, (VOID= *) > &SiConfig); > + ASSERT_EFI_ERROR (Status); > + > + DEBUG ((DEBUG_INFO, "Dump Silicon Policy update by Platform...\n")); > + DumpSiPolicy (SiPolicyPpi); > + > + // > + // Install Silicon Policy PPI > + // > + Status =3D PeiServicesInstallPpi (SiPolicyPpiDesc); > + ASSERT_EFI_ERROR (Status); > + return Status; > +} > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiPolicyLib/PeiSiPolicyLi= bPre > Mem.c > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiPolicyLib/PeiSiPolicyLi= bPre > Mem.c > new file mode 100644 > index 0000000000..499f895e8e > --- /dev/null > +++ > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiPolicyLib/PeiSiPolicyLi= bPre > Mem.c > @@ -0,0 +1,122 @@ > +/** @file > + This file is PeiSiPolicyLib library creates default settings of RC > + Policy and installs RC Policy PPI. > + > + Copyright (c) 2019 Intel Corporation. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > +**/ > + > +#include "PeiSiPolicyLibrary.h" > +#include > + > +/** > + SiCreatePreMemConfigBlocks creates the config blocksg of Silicon PREME= M > Policy. > + It allocates and zero out buffer, and fills in the Intel default setti= ngs. > + > + @param[out] SiPreMemPolicyPpi The pointer to get Silicon Policy PPI > instance > + > + @retval EFI_SUCCESS The policy default is initialized. > + @retval EFI_OUT_OF_RESOURCES Insufficient resources to create buffe= r > +**/ > +EFI_STATUS > +EFIAPI > +SiCreatePreMemConfigBlocks ( > + OUT SI_PREMEM_POLICY_PPI **SiPreMemPolicyPpi > + ) > +{ > + UINT16 TotalBlockSize; > + EFI_STATUS Status; > + SI_PREMEM_POLICY_PPI *SiPreMemPolicy; > + UINT16 RequiredSize; > + > + SiPreMemPolicy =3D NULL; > + // > + // TotalBlockSize =3D Pch , SA, ME and CPU config block size. > + // > + TotalBlockSize =3D PchGetPreMemConfigBlockTotalSize () + > + MeGetConfigBlockTotalSizePreMem () + > + SaGetConfigBlockTotalSizePreMem () + > + CpuGetPreMemConfigBlockTotalSize (); > + DEBUG ((DEBUG_INFO, "TotalBlockSize =3D 0x%x\n", TotalBlockSize)); > + > + RequiredSize =3D sizeof (CONFIG_BLOCK_TABLE_HEADER) + TotalBlockSize; > + > + Status =3D CreateConfigBlockTable (RequiredSize, (VOID *)&SiPreMemPoli= cy); > + ASSERT_EFI_ERROR (Status); > + > + // > + // General initialization > + // > + SiPreMemPolicy->TableHeader.Header.Revision =3D > SI_PREMEM_POLICY_REVISION; > + // > + // Add config blocks. > + // > + Status =3D PchAddPreMemConfigBlocks ((VOID *) SiPreMemPolicy); > + ASSERT_EFI_ERROR (Status); > + Status =3D MeAddConfigBlocksPreMem ((VOID *) SiPreMemPolicy); > + ASSERT_EFI_ERROR (Status); > + Status =3D SaAddConfigBlocksPreMem ((VOID *) SiPreMemPolicy); > + ASSERT_EFI_ERROR (Status); > + Status =3D CpuAddPreMemConfigBlocks ((VOID *) SiPreMemPolicy); > + ASSERT_EFI_ERROR (Status); > + // > + // Assignment for returning SaInitPolicy config block base address > + // > + *SiPreMemPolicyPpi =3D SiPreMemPolicy; > + return Status; > +} > + > +/** > + SiPreMemInstallPolicyPpi installs SiPreMemPolicyPpi. > + While installed, RC assumes the Policy is ready and finalized. So plea= se > update and override > + any setting before calling this function. > + > + @param[in] SiPreMemPolicyPpi The pointer to Silicon Policy PPI insta= nce > + > + @retval EFI_SUCCESS The policy is installed. > + @retval EFI_OUT_OF_RESOURCES Insufficient resources to create buffer > +**/ > +EFI_STATUS > +EFIAPI > +SiPreMemInstallPolicyPpi ( > + IN SI_PREMEM_POLICY_PPI *SiPolicyPreMemPpi > + ) > +{ > + EFI_STATUS Status; > + EFI_PEI_PPI_DESCRIPTOR *SiPolicyPreMemPpiDesc; > + > + SiPolicyPreMemPpiDesc =3D (EFI_PEI_PPI_DESCRIPTOR *) AllocateZeroPool > (sizeof (EFI_PEI_PPI_DESCRIPTOR)); > + if (SiPolicyPreMemPpiDesc =3D=3D NULL) { > + ASSERT (FALSE); > + return EFI_OUT_OF_RESOURCES; > + } > + > + SiPolicyPreMemPpiDesc->Flags =3D EFI_PEI_PPI_DESCRIPTOR_PPI | > EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST; > + SiPolicyPreMemPpiDesc->Guid =3D &gSiPreMemPolicyPpiGuid; > + SiPolicyPreMemPpiDesc->Ppi =3D SiPolicyPreMemPpi; > + > + // > + // Print whole PCH_POLICY_PPI and serial out. > + // > + PchPreMemPrintPolicyPpi (SiPolicyPreMemPpi); > + // > + // Print ME config blocks and serial out. > + // > + MePrintPolicyPpiPreMem (SiPolicyPreMemPpi); > + // > + // Print whole SI_POLICY_PPI and serial out. > + // > + SaPrintPolicyPpiPreMem (SiPolicyPreMemPpi); > + // > + // Print whole CPU of SI_PREMEM_POLICY_PPI and serial out. > + // > + CpuPreMemPrintPolicy (SiPolicyPreMemPpi); > + // > + // Install Silicon Policy PPI > + // > + Status =3D PeiServicesInstallPpi (SiPolicyPreMemPpiDesc); > + ASSERT_EFI_ERROR (Status); > + return Status; > +} > + > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiPolicyLib/SiPrintPolicy= .c > b/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiPolicyLib/SiPrintPolicy= .c > new file mode 100644 > index 0000000000..cf7e1b2308 > --- /dev/null > +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiPolicyLib/SiPrintPo= licy.c > @@ -0,0 +1,36 @@ > +/** @file > + This file is PeiSiPolicyLib library for printing Policy settings. > + > + Copyright (c) 2019 Intel Corporation. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > +**/ > + > +#include "PeiSiPolicyLibrary.h" > + > +/** > + Print whole SI_POLICY_PPI and serial out. > + > + @param[in] SiPolicyPpi The RC Policy PPI instance > +**/ > +VOID > +EFIAPI > +SiPrintPolicyPpi ( > + IN SI_POLICY_PPI *SiPolicyPpi > + ) > +{ > + DEBUG_CODE_BEGIN (); > + SI_CONFIG *SiConfig; > + EFI_STATUS Status; > + > + Status =3D GetConfigBlock ((VOID *) SiPolicyPpi, &gSiConfigGuid, (VOID= *) > &SiConfig); > + ASSERT_EFI_ERROR (Status); > + > + DEBUG ((DEBUG_INFO, "------------------------ Silicon Print Policy Sta= rt > ------------------------\n")); > + DEBUG ((DEBUG_INFO, " CsmFlag=3D %x\n", SiConfig->CsmFlag)); > + DEBUG ((DEBUG_INFO, " TraceHubMemBase =3D 0x%08x\n", > SiConfig->TraceHubMemBase)); > + > + DEBUG ((DEBUG_INFO, "------------------------ Silicon Print Policy End > --------------------------\n")); > + DEBUG_CODE_END (); > +} > + > -- > 2.16.2.windows.1