From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=fail (domain: intel.com, ip: , mailfrom: chasel.chiu@intel.com) Received: from mga12.intel.com (mga12.intel.com []) by groups.io with SMTP; Fri, 16 Aug 2019 18:12:57 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Aug 2019 18:12:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,395,1559545200"; d="scan'208";a="328835688" Received: from kmsmsx151.gar.corp.intel.com ([172.21.73.86]) by orsmga004.jf.intel.com with ESMTP; 16 Aug 2019 18:12:56 -0700 Received: from pgsmsx111.gar.corp.intel.com ([169.254.2.22]) by KMSMSX151.gar.corp.intel.com ([169.254.10.91]) with mapi id 14.03.0439.000; Sat, 17 Aug 2019 09:12:55 +0800 From: "Chiu, Chasel" To: "Kubacki, Michael A" , "devel@edk2.groups.io" CC: "Chaganty, Rangasai V" , "Desimone, Nathaniel L" , "Gao, Liming" , "Kinney, Michael D" , "Sinha, Ankit" Subject: Re: [edk2-platforms][PATCH V1 16/37] CoffeelakeSiliconPkg/Me: Add library instances Thread-Topic: [edk2-platforms][PATCH V1 16/37] CoffeelakeSiliconPkg/Me: Add library instances Thread-Index: AQHVVJEXCneRQpgeb0uxjLapFz5SBKb+iKFg Date: Sat, 17 Aug 2019 01:12:54 +0000 Message-ID: <3C3EFB470A303B4AB093197B6777CCEC50462320@PGSMSX111.gar.corp.intel.com> References: <20190817001603.30632-1-michael.a.kubacki@intel.com> <20190817001603.30632-17-michael.a.kubacki@intel.com> In-Reply-To: <20190817001603.30632-17-michael.a.kubacki@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYmJjZGM1YjUtMDE3Zi00ZGQ5LTgzNmUtNWViNzc3MjEzNWYwIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiQXZhMDlmK1ppVDMrbVJlZDdYTEYrSW5HRFJFbHEwa0JBN2o2WTFLb1lIRWFVZ0NWK0h1cEMrZG5qRjR3K1J4ZSJ9 x-ctpclassification: CTP_NT x-originating-ip: [172.30.20.206] MIME-Version: 1.0 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Chasel Chiu > -----Original Message----- > From: Kubacki, Michael A > Sent: Saturday, August 17, 2019 8:16 AM > To: devel@edk2.groups.io > Cc: Chaganty, Rangasai V ; Chiu, Chasel > ; Desimone, Nathaniel L > ; Gao, Liming ; > Kinney, Michael D ; Sinha, Ankit > > Subject: [edk2-platforms][PATCH V1 16/37] CoffeelakeSiliconPkg/Me: Add > library instances >=20 > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D2082 >=20 > Adds ME library class instances. >=20 > * PeiMePolicyLib - PEI ME policy configuration services. >=20 > Cc: Sai Chaganty > Cc: Chasel Chiu > Cc: Nate DeSimone > Cc: Liming Gao > Cc: Michael D Kinney > Cc: Ankit Sinha > Signed-off-by: Michael Kubacki > --- >=20 > Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePolicyLib/PeiMePolicyL= i > b.inf | 44 ++++ >=20 > Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePolicyLib/PeiMePolicyL= i > brary.h | 25 ++ >=20 > Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePolicyLib/PeiMePolicyL= i > b.c | 251 ++++++++++++++++++++ > 3 files changed, 320 insertions(+) >=20 > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePolicyLib/PeiMePolic= y > Lib.inf > b/Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePolicyLib/PeiMePolic= y > Lib.inf > new file mode 100644 > index 0000000000..85a227f950 > --- /dev/null > +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePolicyLib/PeiMe > +++ PolicyLib.inf > @@ -0,0 +1,44 @@ > +## @file > +# Component description file for the PeiMePolicyLib libbrary. > +# > +# Copyright (c) 2019 Intel Corporation. All rights reserved.
# # > +SPDX-License-Identifier: BSD-2-Clause-Patent # ## > + > +[Defines] > +INF_VERSION =3D 0x00010017 > +BASE_NAME =3D PeiMePolicyLib > +FILE_GUID =3D 2655FA94-4559-F393-B0B1-85A8E79C1532 > +VERSION_STRING =3D 1.0 > +MODULE_TYPE =3D PEIM > +LIBRARY_CLASS =3D PeiMePolicyLib > + > + > +[LibraryClasses] > +DebugLib > +IoLib > +PeiServicesLib > +BaseMemoryLib > +MemoryAllocationLib > +ConfigBlockLib > + > + > +[Packages] > +MdePkg/MdePkg.dec > +CoffeelakeSiliconPkg/SiPkg.dec > + > +[Sources] > +PeiMePolicyLib.c > +PeiMePolicyLibrary.h > + > + > +[Ppis] > +gSiPolicyPpiGuid ## PRODUCES > +gSiPreMemPolicyPpiGuid ## PRODUCES > + > + > +[Guids] > +gMePeiPreMemConfigGuid > +gMePeiConfigGuid > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePolicyLib/PeiMePolic= y > Library.h > b/Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePolicyLib/PeiMePolic= y > Library.h > new file mode 100644 > index 0000000000..3ac6a639e9 > --- /dev/null > +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePolicyLib/PeiMe > +++ PolicyLibrary.h > @@ -0,0 +1,25 @@ > +/** @file > + Header file for the PeiMePolicy library. > + > + Copyright (c) 2019 Intel Corporation. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent **/ > + > +#ifndef _PEI_ME_POLICY_LIBRARY_H_ > +#define _PEI_ME_POLICY_LIBRARY_H_ > + > +#include > +#include > +#include > +#include > +#include #include > +#include #include #include > + #include > +#include #include > + > +#endif // _PEI_ME_POLICY_LIBRARY_H_ > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePolicyLib/PeiMePolic= y > Lib.c > b/Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePolicyLib/PeiMePolic= y > Lib.c > new file mode 100644 > index 0000000000..6f3d70b841 > --- /dev/null > +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePolicyLib/PeiMe > +++ PolicyLib.c > @@ -0,0 +1,251 @@ > +/** @file > + This file is PeiMePolicy library. > + > + Copyright (c) 2019 Intel Corporation. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent **/ > + > +#include "PeiMePolicyLibrary.h" > + > +/** > + Load default settings for ME config block in pre-mem phase. > + > + @param[in] ConfigBlockPointer The pointer to the confi= g block > +**/ > +VOID > +LoadMePeiPreMemDefault ( > + IN VOID *ConfigBlockPointer > + ); > + > +/** > + Load default settings for ME config block in PEI phase. > + > + @param[in] ConfigBlockPointer The pointer to the confi= g block > +**/ > +VOID > +LoadMePeiDefault ( > + IN VOID *ConfigBlockPointer > + ); > + > +STATIC COMPONENT_BLOCK_ENTRY mMeCompontBlockPreMemBlocks [] =3D { > + {&gMePeiPreMemConfigGuid, sizeof (ME_PEI_PREMEM_CONFIG), > +ME_PEI_PREMEM_CONFIG_REVISION, LoadMePeiPreMemDefault} }; > + > +STATIC COMPONENT_BLOCK_ENTRY mMeCompontBlockBlocks [] =3D { > + {&gMePeiConfigGuid, sizeof (ME_PEI_CONFIG), > ME_PEI_CONFIG_REVISION, LoadMePeiDefault} > +}; > + > +/** > + Load default settings for ME config block in pre-mem phase. > + > + @param[in] ConfigBlockPointer The pointer to the confi= g block > +**/ > +VOID > +LoadMePeiPreMemDefault ( > + IN VOID *ConfigBlockPointer > + ) > +{ > + ME_PEI_PREMEM_CONFIG *MePeiPreMemConfig; > + MePeiPreMemConfig =3D ConfigBlockPointer; > + > + MePeiPreMemConfig->HeciTimeouts =3D 1; > + > + MePeiPreMemConfig->Heci1BarAddress =3D 0xFED1A000; > + MePeiPreMemConfig->Heci2BarAddress =3D 0xFED1B000; > + MePeiPreMemConfig->Heci3BarAddress =3D 0xFED1C000; > + > + // > + // Test policies > + // > + MePeiPreMemConfig->SendDidMsg =3D 1; > + > + MePeiPreMemConfig->KtDeviceEnable =3D 1; > +} > + > +/** > + Load default settings for ME config block in PEI phase. > + > + @param[in] ConfigBlockPointer The pointer to the confi= g block > +**/ > +VOID > +LoadMePeiDefault ( > + IN VOID *ConfigBlockPointer > + ) > +{ > + ME_PEI_CONFIG *MePeiConfig; > + MePeiConfig =3D ConfigBlockPointer; > + > + MePeiConfig->EndOfPostMessage =3D EOP_SEND_IN_DXE; > + MePeiConfig->MeUnconfigOnRtcClear =3D 1; } > + > +/** > + Dump values of ME config block in pre-mem phase. > + > + @param[in] MePeiPreMemConfig The pointer to the co= nfig > block > +**/ > +VOID > +EFIAPI > +PrintMePeiPreMemConfig ( > + IN ME_PEI_PREMEM_CONFIG *MePeiPreMemConfig > + ) > +{ > + DEBUG_CODE_BEGIN (); > + DEBUG ((DEBUG_INFO, "------------------------ ME_PEI_PREMEM_CONFIG > -----------------\n")); > + DEBUG ((DEBUG_INFO, " Revision : 0x%x\n", > MePeiPreMemConfig->Header.Revision)); > + ASSERT (MePeiPreMemConfig->Header.Revision =3D=3D > +ME_PEI_PREMEM_CONFIG_REVISION); > + > + DEBUG ((DEBUG_INFO, " HeciTimeouts : 0x%x\n", > MePeiPreMemConfig->HeciTimeouts)); > + DEBUG ((DEBUG_INFO, " DidInitStat : 0x%x\n", > MePeiPreMemConfig->DidInitStat)); > + DEBUG ((DEBUG_INFO, " DisableCpuReplacedPolling : 0x%x\n", > MePeiPreMemConfig->DisableCpuReplacedPolling)); > + DEBUG ((DEBUG_INFO, " SendDidMsg : 0x%x\n", > MePeiPreMemConfig->SendDidMsg)); > + DEBUG ((DEBUG_INFO, " DisableHeciRetry : 0x%x\n", > MePeiPreMemConfig->DisableHeciRetry)); > + DEBUG ((DEBUG_INFO, " DisableMessageCheck : 0x%x\n", > MePeiPreMemConfig->DisableMessageCheck)); > + DEBUG ((DEBUG_INFO, " SkipMbpHob : 0x%x\n", > MePeiPreMemConfig->SkipMbpHob)); > + DEBUG ((DEBUG_INFO, " HeciCommunication2 : 0x%x\n", > MePeiPreMemConfig->HeciCommunication2)); > + DEBUG ((DEBUG_INFO, " KtDeviceEnable : 0x%x\n", > MePeiPreMemConfig->KtDeviceEnable)); > + DEBUG ((DEBUG_INFO, " Heci1BarAddress : 0x%x\n", > MePeiPreMemConfig->Heci1BarAddress)); > + DEBUG ((DEBUG_INFO, " Heci2BarAddress : 0x%x\n", > MePeiPreMemConfig->Heci2BarAddress)); > + DEBUG ((DEBUG_INFO, " Heci3BarAddress : 0x%x\n", > MePeiPreMemConfig->Heci3BarAddress)); > + DEBUG_CODE_END (); > +} > + > +/** > + Dump values of ME config block in PEI phase. > + > + @param[in] MePeiConfig The pointer to the config bl= ock > +**/ > +VOID > +EFIAPI > +PrintMePeiConfig ( > + IN ME_PEI_CONFIG *MePeiConfig > + ) > +{ > + DEBUG_CODE_BEGIN (); > + DEBUG ((DEBUG_INFO, "------------------------ ME_PEI_CONFIG > -----------------\n")); > + DEBUG ((DEBUG_INFO, " Revision : 0x%x\n", > MePeiConfig->Header.Revision)); > + ASSERT (MePeiConfig->Header.Revision =3D=3D ME_PEI_CONFIG_REVISION); > + > + DEBUG ((DEBUG_INFO, " MctpBroadcastCycle : 0x%x\n", > MePeiConfig->MctpBroadcastCycle)); > + DEBUG ((DEBUG_INFO, " EndOfPostMessage : 0x%x\n", > MePeiConfig->EndOfPostMessage)); > + DEBUG ((DEBUG_INFO, " Heci3Enabled : 0x%x\n", > MePeiConfig->Heci3Enabled)); > + DEBUG ((DEBUG_INFO, " DisableD0I3SettingForHeci : 0x%x\n", > MePeiConfig->DisableD0I3SettingForHeci)); > + DEBUG ((DEBUG_INFO, " MeUnconfigOnRtcClear : 0x%x\n", > MePeiConfig->MeUnconfigOnRtcClear)); > + > + DEBUG_CODE_END (); > +} > + > +/** > + Print PEI ME config block > + > + @param[in] SiPolicyPpiPreMem The RC Policy PPI instance **/ VOID > +EFIAPI MePrintPolicyPpiPreMem ( > + IN SI_PREMEM_POLICY_PPI *SiPolicyPpiPreMem > + ) > +{ > + DEBUG_CODE_BEGIN (); > + EFI_STATUS Status; > + ME_PEI_PREMEM_CONFIG *MePeiPreMemConfig; > + > + Status =3D GetConfigBlock ((VOID *) SiPolicyPpiPreMem, > + &gMePeiPreMemConfigGuid, (VOID *) &MePeiPreMemConfig); > + ASSERT_EFI_ERROR (Status); > + > + DEBUG ((DEBUG_INFO, "\n---------------------- Me Config Block Pre-Mem > +Print Begin -----------------\n")); > + PrintMePeiPreMemConfig (MePeiPreMemConfig); > + DEBUG ((DEBUG_INFO, "\n---------------------- Me Config Block Pre-Mem > +Print End -------------------\n")); > + DEBUG_CODE_END (); > +} > + > +/** > + Print PEI ME config block > + > + @param[in] SiPolicyPpi The RC Policy PPI instance **/ VOID EFIAPI > +MePrintPolicyPpi ( > + IN SI_POLICY_PPI *SiPolicyPpi > + ) > +{ > + DEBUG_CODE_BEGIN (); > + EFI_STATUS Status; > + ME_PEI_CONFIG *MePeiConfig; > + > + Status =3D GetConfigBlock ((VOID *) SiPolicyPpi, &gMePeiConfigGuid, > + (VOID *) &MePeiConfig); ASSERT_EFI_ERROR (Status); > + > + DEBUG ((DEBUG_INFO, "\n---------------------- Me Config Block Print > +Begin -----------------\n")); > + PrintMePeiConfig (MePeiConfig); > + DEBUG ((DEBUG_INFO, "\n---------------------- Me Config Block Print > +End -------------------\n")); > + DEBUG_CODE_END (); > +} > + > +/** > + Get ME config block table total size. > + > + @retval Size of ME config block table > +**/ > +UINT16 > +EFIAPI > +MeGetConfigBlockTotalSizePreMem ( > + VOID > + ) > +{ > + return GetComponentConfigBlockTotalSize > +(&mMeCompontBlockPreMemBlocks[0], sizeof > (mMeCompontBlockPreMemBlocks) > +/ sizeof (COMPONENT_BLOCK_ENTRY)); } > + > +/** > + Get ME config block table total size. > + > + @retval Size of ME config block table > +**/ > +UINT16 > +EFIAPI > +MeGetConfigBlockTotalSize ( > + VOID > + ) > +{ > + return GetComponentConfigBlockTotalSize > (&mMeCompontBlockBlocks[0], > +sizeof (mMeCompontBlockBlocks) / sizeof (COMPONENT_BLOCK_ENTRY)); } > + > +/** > + MeAddConfigBlocksPreMem add all config blocks. > + > + @param[in] ConfigBlockTableAddress The pointer to add config blocks > + > + @retval EFI_SUCCESS The policy default is initialize= d. > + @retval EFI_OUT_OF_RESOURCES Insufficient resources to create > buffer > +**/ > +EFI_STATUS > +EFIAPI > +MeAddConfigBlocksPreMem ( > + IN VOID *ConfigBlockTableAddress > + ) > +{ > + DEBUG ((DEBUG_INFO, "Me AddConfigBlocks. TotalBlockCount =3D 0x%x\n", > +sizeof (mMeCompontBlockPreMemBlocks) / sizeof > +(COMPONENT_BLOCK_ENTRY))); > + > + return AddComponentConfigBlocks (ConfigBlockTableAddress, > +&mMeCompontBlockPreMemBlocks[0], sizeof > (mMeCompontBlockPreMemBlocks) / > +sizeof (COMPONENT_BLOCK_ENTRY)); } > + > +/** > + MeAddConfigBlocks add all config blocks. > + > + @param[in] ConfigBlockTableAddress The pointer to add config blocks > + > + @retval EFI_SUCCESS The policy default is initialize= d. > + @retval EFI_OUT_OF_RESOURCES Insufficient resources to create > buffer > +**/ > +EFI_STATUS > +EFIAPI > +MeAddConfigBlocks ( > + IN VOID *ConfigBlockTableAddress > + ) > +{ > + DEBUG ((DEBUG_INFO, "ME AddConfigBlocks. TotalBlockCount =3D 0x%x\n", > +sizeof (mMeCompontBlockBlocks) / sizeof (COMPONENT_BLOCK_ENTRY))); > + > + return AddComponentConfigBlocks (ConfigBlockTableAddress, > +&mMeCompontBlockBlocks[0], sizeof (mMeCompontBlockBlocks) / sizeof > +(COMPONENT_BLOCK_ENTRY)); } > -- > 2.16.2.windows.1