From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=fail (domain: intel.com, ip: , mailfrom: chasel.chiu@intel.com) Received: from mga01.intel.com (mga01.intel.com []) by groups.io with SMTP; Fri, 16 Aug 2019 18:16:11 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Aug 2019 18:16:11 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,395,1559545200"; d="scan'208";a="376875593" Received: from pgsmsx104.gar.corp.intel.com ([10.221.44.91]) by fmsmga005.fm.intel.com with ESMTP; 16 Aug 2019 18:16:10 -0700 Received: from pgsmsx111.gar.corp.intel.com ([169.254.2.22]) by PGSMSX104.gar.corp.intel.com ([169.254.3.208]) with mapi id 14.03.0439.000; Sat, 17 Aug 2019 09:16:09 +0800 From: "Chiu, Chasel" To: "Kubacki, Michael A" , "devel@edk2.groups.io" CC: "Chaganty, Rangasai V" , "Desimone, Nathaniel L" , "Gao, Liming" , "Kinney, Michael D" , "Sinha, Ankit" Subject: Re: [edk2-platforms][PATCH V1 20/37] CoffeelakeSiliconPkg/Pch: Add SMM library instances Thread-Topic: [edk2-platforms][PATCH V1 20/37] CoffeelakeSiliconPkg/Pch: Add SMM library instances Thread-Index: AQHVVJEePOascTy8s0WYVEuNgjE3p6b+iYqQ Date: Sat, 17 Aug 2019 01:16:09 +0000 Message-ID: <3C3EFB470A303B4AB093197B6777CCEC50462418@PGSMSX111.gar.corp.intel.com> References: <20190817001603.30632-1-michael.a.kubacki@intel.com> <20190817001603.30632-21-michael.a.kubacki@intel.com> In-Reply-To: <20190817001603.30632-21-michael.a.kubacki@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiODg4N2IxYWItYjVmMy00MTA0LWEwMzMtOTQyZTBkMTMyOWVmIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiM2ZYdGtYVUdxNllxMHAxWWdtXC9tenFERzNYazl1NGFxa3BcL1UrRDBLYnVJWXJxOFR0RlA5aWViZzIxbmlvNytLIn0= x-ctpclassification: CTP_NT x-originating-ip: [172.30.20.206] MIME-Version: 1.0 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Chasel Chiu > -----Original Message----- > From: Kubacki, Michael A > Sent: Saturday, August 17, 2019 8:16 AM > To: devel@edk2.groups.io > Cc: Chaganty, Rangasai V ; Chiu, Chasel > ; Desimone, Nathaniel L > ; Gao, Liming ; > Kinney, Michael D ; Sinha, Ankit > > Subject: [edk2-platforms][PATCH V1 20/37] CoffeelakeSiliconPkg/Pch: Add > SMM library instances >=20 > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D2082 >=20 > Adds PCH SMM library class instances. >=20 > * SmmSpiFlashCommonLib >=20 > Cc: Sai Chaganty > Cc: Chasel Chiu > Cc: Nate DeSimone > Cc: Liming Gao > Cc: Michael D Kinney > Cc: Ankit Sinha > Signed-off-by: Michael Kubacki > --- >=20 > Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/Sm > mSpiFlashCommonLib.inf | 51 +++++ >=20 > Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiF > lashCommon.c | 196 ++++++++++++++++++++ >=20 > Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiF > lashCommonSmmLib.c | 54 ++++++ > 3 files changed, 301 insertions(+) >=20 > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/S > mmSpiFlashCommonLib.inf > b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/S > mmSpiFlashCommonLib.inf > new file mode 100644 > index 0000000000..abc919867c > --- /dev/null > +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLi > +++ b/SmmSpiFlashCommonLib.inf > @@ -0,0 +1,51 @@ > +## @file > +# SMM Library instance of Spi Flash Common Library Class # # Copyright > +(c) 2019 Intel Corporation. All rights reserved.
# # > +SPDX-License-Identifier: BSD-2-Clause-Patent # ## > + > +[Defines] > + INF_VERSION =3D 0x00010017 > + BASE_NAME =3D SmmSpiFlashCommonLib > + FILE_GUID =3D 9632D96E-E849-4217-9217-DC500B8AAE4= 7 > + VERSION_STRING =3D 1.0 > + MODULE_TYPE =3D DXE_SMM_DRIVER > + LIBRARY_CLASS =3D SpiFlashCommonLib|DXE_SMM_DRIVER > + CONSTRUCTOR =3D SmmSpiFlashCommonLibConstructor > +# > +# The following information is for reference only and not required by th= e > build tools. > +# > +# VALID_ARCHITECTURES =3D IA32 X64 > +# > + > +[LibraryClasses] > + PciLib > + IoLib > + MemoryAllocationLib > + BaseLib > + UefiLib > + SmmServicesTableLib > + BaseMemoryLib > + DebugLib > + MmPciLib > + > +[Packages] > + MdePkg/MdePkg.dec > + CoffeelakeSiliconPkg/SiPkg.dec > + > +[Pcd] > + gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES > + gSiPkgTokenSpaceGuid.PcdBiosSize ## CONSUMES > + > +[Sources] > + SpiFlashCommonSmmLib.c > + SpiFlashCommon.c > + > +[Protocols] > + gPchSmmSpiProtocolGuid ## CONSUMES > + > +[Depex.X64.DXE_SMM_DRIVER] > + gPchSmmSpiProtocolGuid > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/S > piFlashCommon.c > b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/S > piFlashCommon.c > new file mode 100644 > index 0000000000..53711db632 > --- /dev/null > +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLi > +++ b/SpiFlashCommon.c > @@ -0,0 +1,196 @@ > +/** @file > + Wrap EFI_SPI_PROTOCOL to provide some library level interfaces > + for module use. > + > + Copyright (c) 2019 Intel Corporation. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent **/ > + > +#include > +#include > +#include > +#include > +#include > +#include > + > + > +PCH_SPI_PROTOCOL *mSpiProtocol; > + > +// > +// FlashAreaBaseAddress and Size for boottime and runtime usage. > +// > +UINTN mFlashAreaBaseAddress =3D 0; > +UINTN mFlashAreaSize =3D 0; > + > +/** > + Enable block protection on the Serial Flash device. > + > + @retval EFI_SUCCESS Opertion is successful. > + @retval EFI_DEVICE_ERROR If there is any device errors. > + > +**/ > +EFI_STATUS > +EFIAPI > +SpiFlashLock ( > + VOID > + ) > +{ > + return EFI_SUCCESS; > +} > + > +/** > + Read NumBytes bytes of data from the address specified by > + PAddress into Buffer. > + > + @param[in] Address The starting physical address of the rea= d. > + @param[in,out] NumBytes On input, the number of bytes to read. O= n > output, the number > + of bytes actually read. > + @param[out] Buffer The destination data buffer for the read= . > + > + @retval EFI_SUCCESS Opertion is successful. > + @retval EFI_DEVICE_ERROR If there is any device errors. > + > +**/ > +EFI_STATUS > +EFIAPI > +SpiFlashRead ( > + IN UINTN Address, > + IN OUT UINT32 *NumBytes, > + OUT UINT8 *Buffer > + ) > +{ > + ASSERT ((NumBytes !=3D NULL) && (Buffer !=3D NULL)); > + if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) { > + return EFI_INVALID_PARAMETER; > + } > + > + // > + // This function is implemented specifically for those platforms // > + at which the SPI device is memory mapped for read. So this // > + function just do a memory copy for Spi Flash Read. > + // > + CopyMem (Buffer, (VOID *) Address, *NumBytes); > + > + return EFI_SUCCESS; > +} > + > +/** > + Write NumBytes bytes of data from Buffer to the address specified by > + PAddresss. > + > + @param[in] Address The starting physical address of the w= rite. > + @param[in,out] NumBytes On input, the number of bytes to write= . > On output, > + the actual number of bytes written. > + @param[in] Buffer The source data buffer for the write. > + > + @retval EFI_SUCCESS Opertion is successful. > + @retval EFI_DEVICE_ERROR If there is any device errors. > + > +**/ > +EFI_STATUS > +EFIAPI > +SpiFlashWrite ( > + IN UINTN Address, > + IN OUT UINT32 *NumBytes, > + IN UINT8 *Buffer > + ) > +{ > + EFI_STATUS Status; > + UINTN Offset; > + UINT32 Length; > + UINT32 RemainingBytes; > + > + ASSERT ((NumBytes !=3D NULL) && (Buffer !=3D NULL)); if ((NumBytes = =3D=3D > + NULL) || (Buffer =3D=3D NULL)) { > + return EFI_INVALID_PARAMETER; > + } > + > + ASSERT (Address >=3D mFlashAreaBaseAddress); > + > + Offset =3D Address - mFlashAreaBaseAddress; > + > + ASSERT ((*NumBytes + Offset) <=3D mFlashAreaSize); > + > + Status =3D EFI_SUCCESS; > + RemainingBytes =3D *NumBytes; > + > + > + while (RemainingBytes > 0) { > + if (RemainingBytes > SECTOR_SIZE_4KB) { > + Length =3D SECTOR_SIZE_4KB; > + } else { > + Length =3D RemainingBytes; > + } > + Status =3D mSpiProtocol->FlashWrite ( > + mSpiProtocol, > + FlashRegionBios, > + (UINT32) Offset, > + Length, > + Buffer > + ); > + if (EFI_ERROR (Status)) { > + break; > + } > + RemainingBytes -=3D Length; > + Offset +=3D Length; > + Buffer +=3D Length; > + } > + > + // > + // Actual number of bytes written > + // > + *NumBytes -=3D RemainingBytes; > + > + return Status; > +} > + > +/** > + Erase the block starting at Address. > + > + @param[in] Address The starting physical address of the block= to be > erased. > + This library assume that caller garantee t= hat the > PAddress > + is at the starting address of this block. > + @param[in] NumBytes On input, the number of bytes of the logic= al > block to be erased. > + On output, the actual number of bytes eras= ed. > + > + @retval EFI_SUCCESS. Opertion is successful. > + @retval EFI_DEVICE_ERROR If there is any device errors. > + > +**/ > +EFI_STATUS > +EFIAPI > +SpiFlashBlockErase ( > + IN UINTN Address, > + IN UINTN *NumBytes > + ) > +{ > + EFI_STATUS Status; > + UINTN Offset; > + UINTN RemainingBytes; > + > + ASSERT (NumBytes !=3D NULL); > + if (NumBytes =3D=3D NULL) { > + return EFI_INVALID_PARAMETER; > + } > + > + ASSERT (Address >=3D mFlashAreaBaseAddress); > + > + Offset =3D Address - mFlashAreaBaseAddress; > + > + ASSERT ((*NumBytes % SECTOR_SIZE_4KB) =3D=3D 0); ASSERT ((*NumBytes + > + Offset) <=3D mFlashAreaSize); > + > + Status =3D EFI_SUCCESS; > + RemainingBytes =3D *NumBytes; > + > + > + Status =3D mSpiProtocol->FlashErase ( > + mSpiProtocol, > + FlashRegionBios, > + (UINT32) Offset, > + (UINT32) RemainingBytes > + ); > + return Status; > +} > + > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/S > piFlashCommonSmmLib.c > b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/S > piFlashCommonSmmLib.c > new file mode 100644 > index 0000000000..43c0218d85 > --- /dev/null > +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLi > +++ b/SpiFlashCommonSmmLib.c > @@ -0,0 +1,54 @@ > +/** @file > + SMM Library instance of SPI Flash Common Library Class > + > + Copyright (c) 2019 Intel Corporation. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent **/ > + > +#include > +#include #include > + > +extern PCH_SPI_PROTOCOL *mSpiProtocol; > + > +extern UINTN mFlashAreaBaseAddress; > +extern UINTN mFlashAreaSize; > + > +/** > + The library constructuor. > + > + The function does the necessary initialization work for this library > + instance. > + > + @param[in] ImageHandle The firmware allocated handle for the UE= FI > image. > + @param[in] SystemTable A pointer to the EFI system table. > + > + @retval EFI_SUCCESS The function always return EFI_SUCCESS f= or > now. > + It will ASSERT on error for debug versio= n. > + @retval EFI_ERROR Please reference LocateProtocol for erro= r code > details. > +**/ > +EFI_STATUS > +EFIAPI > +SmmSpiFlashCommonLibConstructor ( > + IN EFI_HANDLE ImageHandle, > + IN EFI_SYSTEM_TABLE *SystemTable > + ) > +{ > + EFI_STATUS Status; > + > + mFlashAreaBaseAddress =3D (UINTN)PcdGet32 (PcdBiosAreaBaseAddress); > + mFlashAreaSize =3D (UINTN)PcdGet32 (PcdBiosSize); > + > + // > + // Locate the SMM SPI protocol. > + // > + Status =3D gSmst->SmmLocateProtocol ( > + &gPchSmmSpiProtocolGuid, > + NULL, > + (VOID **) &mSpiProtocol > + ); > + ASSERT_EFI_ERROR (Status); > + > + return Status; > +} > -- > 2.16.2.windows.1