From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.115, mailfrom: chasel.chiu@intel.com) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by groups.io with SMTP; Thu, 05 Sep 2019 00:27:41 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Sep 2019 00:27:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,469,1559545200"; d="scan'208";a="358362634" Received: from pgsmsx108.gar.corp.intel.com ([10.221.44.103]) by orsmga005.jf.intel.com with ESMTP; 05 Sep 2019 00:27:39 -0700 Received: from pgsmsx111.gar.corp.intel.com ([169.254.2.22]) by PGSMSX108.gar.corp.intel.com ([169.254.8.125]) with mapi id 14.03.0439.000; Thu, 5 Sep 2019 15:27:39 +0800 From: "Chiu, Chasel" To: "Zhang, Shenglei" , "devel@edk2.groups.io" CC: "Kubacki, Michael A" , "Desimone, Nathaniel L" , "Gao, Liming" Subject: Re: [PATCH v2] MinPlatformPkg/SecFspWrapperPlatformSecLib: Change TopOfTemporaryRam type Thread-Topic: [PATCH v2] MinPlatformPkg/SecFspWrapperPlatformSecLib: Change TopOfTemporaryRam type Thread-Index: AQHVY7HlJhfN9Zc+fkqSAqSETH2Wxaccr1Ww Date: Thu, 5 Sep 2019 07:27:38 +0000 Message-ID: <3C3EFB470A303B4AB093197B6777CCEC504821E7@PGSMSX111.gar.corp.intel.com> References: <20190905061932.28428-1-shenglei.zhang@intel.com> In-Reply-To: <20190905061932.28428-1-shenglei.zhang@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMGJmODM3YzAtMmM0Ny00ZmVkLTk0YzMtZjdiNGY5MTA1NzFhIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoibHpVQXNvVWtjWjdldlRZTHhKd1crZ3NNcE8zUklwWVM2OHd6MjZDNFwvRXlhcXB6ZjdlclltTlBUSGNUYThyUUwifQ== x-ctpclassification: CTP_NT x-originating-ip: [172.30.20.206] MIME-Version: 1.0 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Chasel Chiu > -----Original Message----- > From: Zhang, Shenglei > Sent: Thursday, September 5, 2019 2:20 PM > To: devel@edk2.groups.io > Cc: Kubacki, Michael A ; Chiu, Chasel > ; Desimone, Nathaniel L > ; Gao, Liming > Subject: [PATCH v2] MinPlatformPkg/SecFspWrapperPlatformSecLib: Change > TopOfTemporaryRam type >=20 > Update the type of TopOfTemporaryRam from UINT32 to UINTN. > This change is intended to support X64 build scenarios. > The original code(line 64) may cast the overfloewed result produced by > "(TopOfTemporaryRam - sizeof (UINT32))"from 32bit to 64bit. >=20 > Cc: Michael Kubacki > Cc: Chasel Chiu > Cc: Nate DeSimone > Cc: Liming Gao > Signed-off-by: Shenglei Zhang > --- > v2: As TopOfTemporaryRam is defined as UINTN in v2, remove > all the related casting operations which exist in v1 patch. >=20 > .../SecFspWrapperPlatformSecLib/SecGetPerformance.c | 8 ++++---- > .../SecFspWrapperPlatformSecLib/SecPlatformInformation.c | 6 +++--- > 2 files changed, 7 insertions(+), 7 deletions(-) >=20 > diff --git > a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor > mSecLib/SecGetPerformance.c > b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor > mSecLib/SecGetPerformance.c > index c4eeb2b1..8535ae04 100644 > --- > a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor > mSecLib/SecGetPerformance.c > +++ > b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlat > +++ formSecLib/SecGetPerformance.c > @@ -41,7 +41,7 @@ SecGetPerformance ( > { > UINT32 Size; > UINT32 Count; > - UINT32 TopOfTemporaryRam; > + UINTN TopOfTemporaryRam; > UINT64 Ticker; > VOID *TopOfTemporaryRamPpi; > EFI_STATUS Status; > @@ -77,12 +77,12 @@ SecGetPerformance ( > // | TSC[31:00] | > // |--------------| > // > - TopOfTemporaryRam =3D (UINT32)(UINTN)TopOfTemporaryRamPpi - > sizeof(UINT32); > + TopOfTemporaryRam =3D (UINTN)TopOfTemporaryRamPpi - sizeof(UINT32); > TopOfTemporaryRam -=3D sizeof(UINT32) * 2; > - Count =3D *(UINT32 *) (UINTN) (TopOfTemporaryRam - sizeof > (UINT32)); > + Count =3D *(UINT32 *)(TopOfTemporaryRam - sizeof > (UINT32)); > Size =3D Count * sizeof (UINT32); >=20 > - Ticker =3D *(UINT64 *) (UINTN) (TopOfTemporaryRam - sizeof (UINT32) - = Size > - sizeof (UINT32) * 2); > + Ticker =3D *(UINT64 *) (TopOfTemporaryRam - sizeof (UINT32) - Size - > + sizeof (UINT32) * 2); > Performance->ResetEnd =3D GetTimeInNanoSecond (Ticker); >=20 > return EFI_SUCCESS; > diff --git > a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor > mSecLib/SecPlatformInformation.c > b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor > mSecLib/SecPlatformInformation.c > index 5b94ed2b..ade36ab5 100644 > --- > a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor > mSecLib/SecPlatformInformation.c > +++ > b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlat > +++ formSecLib/SecPlatformInformation.c > @@ -36,7 +36,7 @@ SecPlatformInformation ( > UINT32 *Bist; > UINT32 Size; > UINT32 Count; > - UINT32 TopOfTemporaryRam; > + UINTN TopOfTemporaryRam; > VOID *TopOfTemporaryRamPpi; > EFI_STATUS Status; >=20 > @@ -59,9 +59,9 @@ SecPlatformInformation ( > // This routine copies the BIST information to the buffer pointed by > // PlatformInformationRecord for output. > // > - TopOfTemporaryRam =3D (UINT32)(UINTN)TopOfTemporaryRamPpi - sizeof > (UINT32); > + TopOfTemporaryRam =3D (UINTN)TopOfTemporaryRamPpi - sizeof (UINT32); > TopOfTemporaryRam -=3D sizeof(UINT32) * 2; > - Count =3D *((UINT32 *)(UINTN) (TopOfTemporaryRam - sizeof > (UINT32))); > + Count =3D *((UINT32 *)(TopOfTemporaryRam - sizeof > (UINT32))); > Size =3D Count * sizeof (IA32_HANDOFF_STATUS); >=20 > if ((*StructureSize) < (UINT64) Size) { > -- > 2.18.0.windows.1