From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.31, mailfrom: chasel.chiu@intel.com) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by groups.io with SMTP; Tue, 08 Oct 2019 09:26:33 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Oct 2019 09:26:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,270,1566889200"; d="scan'208";a="218333272" Received: from kmsmsx152.gar.corp.intel.com ([172.21.73.87]) by fmsmga004.fm.intel.com with ESMTP; 08 Oct 2019 09:26:30 -0700 Received: from pgsmsx112.gar.corp.intel.com ([169.254.3.2]) by KMSMSX152.gar.corp.intel.com ([169.254.11.65]) with mapi id 14.03.0439.000; Wed, 9 Oct 2019 00:20:43 +0800 From: "Chiu, Chasel" To: "Kubacki, Michael A" , "devel@edk2.groups.io" CC: "Desimone, Nathaniel L" Subject: Re: [edk2-platforms][PATCH V1 03/17] KabylakeOpenBoardPkg/KabylakeRvp3: DSC cleanup Thread-Topic: [edk2-platforms][PATCH V1 03/17] KabylakeOpenBoardPkg/KabylakeRvp3: DSC cleanup Thread-Index: AQHVfZemmmIYAqlTlECe0d2Ktj+si6dQ7WBg Date: Tue, 8 Oct 2019 16:20:42 +0000 Message-ID: <3C3EFB470A303B4AB093197B6777CCEC504F2030@PGSMSX112.gar.corp.intel.com> References: <20191008051645.22052-1-michael.a.kubacki@intel.com> <20191008051645.22052-4-michael.a.kubacki@intel.com> In-Reply-To: <20191008051645.22052-4-michael.a.kubacki@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiM2U0ZmVhNDEtOGY3YS00YjczLWIyYTEtNDc5OTk4MDMwZGQ5IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiUVNnZFoyNjh1Q1NyN2F0TVRuN1NvTU9VVlFJVmJ4eFBEOUFFcXJIVGRqaHQ0NCtGdnl2MXVqRU5LXC9mdFBrSEMifQ== x-ctpclassification: CTP_NT x-originating-ip: [172.30.20.206] MIME-Version: 1.0 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Chasel Chiu > -----Original Message----- > From: Kubacki, Michael A > Sent: Tuesday, October 8, 2019 1:17 PM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Desimone, Nathaniel L > > Subject: [edk2-platforms][PATCH V1 03/17] > KabylakeOpenBoardPkg/KabylakeRvp3: DSC cleanup >=20 > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D2242 >=20 > This change refactors OpenBoardPkg.dsc and OpenBoardPkgPcd.dsc to > consolidate redundant sections and better group file content to > improve maintainability and readability. >=20 > The same pattern made in this change for KabylakeRvp3 is being > applied to all existing board packages in Platform/Intel to improve > overall consistency. >=20 > Cc: Chasel Chiu > Cc: Nate DeSimone > Signed-off-by: Michael Kubacki > --- > Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc > | 521 ++++++++++--------- >=20 > Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc > | 547 ++++++++++---------- > 2 files changed, 539 insertions(+), 529 deletions(-) >=20 > diff --git > a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc > b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc > index a3378d3c5d..efc4c2dca8 100644 > --- > a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc > +++ > b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc > @@ -1,5 +1,5 @@ > ## @file > -# Platform description. > +# The main build description file for the KabylakeRvp3 board. > # > # Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
> # > @@ -7,11 +7,6 @@ > # > ## > [Defines] > - # > - # Set platform specific package/folder name, same as passed from > PREBUILD script. > - # PLATFORM_PACKAGE would be the same as PLATFORM_NAME as well > as package build folder > - # DEFINE only takes effect at R9 DSC and FDF. > - # > DEFINE PLATFORM_PACKAGE =3D MinPlatformPkg > DEFINE PLATFORM_SI_PACKAGE =3D > KabylakeSiliconPkg > DEFINE PLATFORM_SI_BIN_PACKAGE =3D > KabylakeSiliconBinPkg > @@ -20,7 +15,7 @@ > DEFINE PROJECT =3D > $(PLATFORM_BOARD_PACKAGE)/$(BOARD) >=20 > # > - # Platform On/Off features are defined here > + # Include PCD configuration for this board. > # > !include OpenBoardPkgPcd.dsc >=20 > @@ -68,8 +63,6 @@ > SUPPORTED_ARCHITECTURES =3D IA32|X64 > BUILD_TARGETS =3D DEBUG|RELEASE > SKUID_IDENTIFIER =3D ALL > - > - > FLASH_DEFINITION =3D > $(PROJECT)/OpenBoardPkg.fdf >=20 > FIX_LOAD_TOP_MEMORY_ADDRESS =3D 0x0 > @@ -82,172 +75,205 @@ >=20 >=20 > ################################################################ > ################ > # > -# SKU Identification section - list of all SKU IDs supported by this > -# Platform. > +# SKU Identification section - list of all SKU IDs supported by this boa= rd. > # >=20 > ################################################################ > ################ > [SkuIds] > - 0|DEFAULT # The entry: 0|DEFAULT is reserved and > always required. > - 4|KabylakeRvp3 > + 0x00|DEFAULT # 0|DEFAULT is reserved and always > required. > + 0x04|KabylakeRvp3 > 0x60|KabyLakeYLpddr3Rvp3 >=20 >=20 > ################################################################ > ################ > # > -# Library Class section - list of all Library Classes needed by this Pla= tform. > +# Includes section - other DSC file contents included for this board bui= ld. > # >=20 > ################################################################ > ################ >=20 > +####################################### > +# Library Includes > +####################################### > !include $(PLATFORM_PACKAGE)/Include/Dsc/CoreCommonLib.dsc > !include $(PLATFORM_PACKAGE)/Include/Dsc/CorePeiLib.dsc > !include $(PLATFORM_PACKAGE)/Include/Dsc/CoreDxeLib.dsc > +!include $(PLATFORM_SI_PACKAGE)/SiPkgCommonLib.dsc > +!include $(PLATFORM_SI_PACKAGE)/SiPkgPeiLib.dsc > +!include $(PLATFORM_SI_PACKAGE)/SiPkgDxeLib.dsc > + > +####################################### > +# Component Includes > +####################################### > +[Components.IA32] > +!include $(PLATFORM_PACKAGE)/Include/Dsc/CorePeiInclude.dsc > +!include $(PLATFORM_SI_PACKAGE)/SiPkgPei.dsc > + > +[Components.X64] > +!include $(PLATFORM_PACKAGE)/Include/Dsc/CoreDxeInclude.dsc > +!include $(PLATFORM_SI_PACKAGE)/SiPkgDxe.dsc > + > +####################################### > +# Build Option Includes > +####################################### > +!include $(PLATFORM_SI_PACKAGE)/SiPkgBuildOption.dsc > +!include OpenBoardPkgBuildOption.dsc > + > +############################################################### > ################# > +# > +# Library Class section - list of all Library Classes needed by this boa= rd. > +# > +############################################################### > ################# >=20 > [LibraryClasses.common] > - > - PeiLib|$(PLATFORM_PACKAGE)/Library/PeiLib/PeiLib.inf > - > ReportFvLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/PeiReportFvLib/Pei > ReportFvLib.inf > - > - > PciHostBridgeLib|$(PLATFORM_PACKAGE)/Pci/Library/PciHostBridgeLibSimple > /PciHostBridgeLibSimple.inf > - > PciSegmentInfoLib|$(PLATFORM_PACKAGE)/Pci/Library/PciSegmentInfoLibSim > ple/PciSegmentInfoLibSimple.inf > - > PlatformBootManagerLib|$(PLATFORM_PACKAGE)/Bds/Library/DxePlatformB > ootManagerLib/DxePlatformBootManagerLib.inf > - > I2cAccessLib|$(PLATFORM_BOARD_PACKAGE)/Library/PeiI2cAccessLib/PeiI2cA > ccessLib.inf > - > GpioExpanderLib|$(PLATFORM_BOARD_PACKAGE)/Library/BaseGpioExpande > rLib/BaseGpioExpanderLib.inf > - > - > PlatformHookLib|$(PROJECT)/Library/BasePlatformHookLib/BasePlatformHo > okLib.inf > - > - > FspWrapperHobProcessLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiF > spWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf > - > PlatformSecLib|$(PLATFORM_BOARD_PACKAGE)/FspWrapper/Library/SecFsp > WrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf > - > + ####################################### > + # Edk2 Packages > + ####################################### >=20 > FspWrapperApiLib|IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/Bas > eFspWrapperApiLib.inf >=20 > FspWrapperApiTestLib|IntelFsp2WrapperPkg/Library/PeiFspWrapperApiTestL > ib/PeiFspWrapperApiTestLib.inf >=20 > - > FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFsp > WrapperPlatformLib/PeiFspWrapperPlatformLib.inf > - > -!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection =3D=3D 1 > - # > - # Below library are used by FSP API mode > - # > - > SiliconPolicyUpdateLib|$(PROJECT)/FspWrapper/Library/PeiSiliconPolicyUpda > teLibFsp/PeiSiliconPolicyUpdateLibFsp.inf > - > SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitL= ib > Fsp/PeiSiliconPolicyInitLibFsp.inf > -!else > - # > - # Below library are used by FSP Dispatch mode and non-FSP build (EDK2 > build) > - # > - > SiliconPolicyUpdateLib|$(PROJECT)/Policy/Library/PeiSiliconPolicyUpdateLi= b/ > PeiSiliconPolicyUpdateLib.inf > - > SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitL= ib > Fsp/PeiSiliconPolicyInitLibFspAml.inf > -!endif > - > + ####################################### > + # Silicon Initialization Package > + ####################################### >=20 > ConfigBlockLib|$(PLATFORM_SI_PACKAGE)/Library/BaseConfigBlockLib/BaseC > onfigBlockLib.inf >=20 > SiliconInitLib|$(PLATFORM_SI_PACKAGE)/Library/SiliconInitLib/SiliconInitL= ib.i > nf >=20 > +!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection =3D=3D 1 > + # > + # FSP API mode > + # > + > SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitL= ib > Fsp/PeiSiliconPolicyInitLibFsp.inf > +!else > + # > + # FSP Dispatch mode and non-FSP build (EDK2 build) > + # > + > SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitL= ib > Fsp/PeiSiliconPolicyInitLibFspAml.inf > +!endif > + > + ##################################### > + # Platform Package > + ##################################### >=20 > BoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/BoardInitLibNull/B > oardInitLibNull.inf > + > FspWrapperHobProcessLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiF > spWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf > + > FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFsp > WrapperPlatformLib/PeiFspWrapperPlatformLib.inf > + > PciHostBridgeLib|$(PLATFORM_PACKAGE)/Pci/Library/PciHostBridgeLibSimple > /PciHostBridgeLibSimple.inf > + > PciSegmentInfoLib|$(PLATFORM_PACKAGE)/Pci/Library/PciSegmentInfoLibSim > ple/PciSegmentInfoLibSimple.inf > + PeiLib|$(PLATFORM_PACKAGE)/Library/PeiLib/PeiLib.inf > + > PlatformBootManagerLib|$(PLATFORM_PACKAGE)/Bds/Library/DxePlatformB > ootManagerLib/DxePlatformBootManagerLib.inf > + > ReportFvLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/PeiReportFvLib/Pei > ReportFvLib.inf >=20 > TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLibNu > ll/TestPointCheckLibNull.inf >=20 > -# Tbt > -!if gBoardModuleTokenSpaceGuid.PcdTbtEnable =3D=3D TRUE > - > TbtCommonLib|$(PLATFORM_BOARD_PACKAGE)/Features/Tbt/Library/PeiDx > eSmmTbtCommonLib/TbtCommonLib.inf > - > DxeTbtPolicyLib|$(PLATFORM_BOARD_PACKAGE)/Features/Tbt/Library/DxeTb > tPolicyLib/DxeTbtPolicyLib.inf > -!endif > + ####################################### > + # Board Package > + ####################################### > EcLib|$(PLATFORM_BOARD_PACKAGE)/Library/BaseEcLib/BaseEcLib.inf > + > GpioExpanderLib|$(PLATFORM_BOARD_PACKAGE)/Library/BaseGpioExpande > rLib/BaseGpioExpanderLib.inf > + > I2cAccessLib|$(PLATFORM_BOARD_PACKAGE)/Library/PeiI2cAccessLib/PeiI2cA > ccessLib.inf > + > PlatformSecLib|$(PLATFORM_BOARD_PACKAGE)/FspWrapper/Library/SecFsp > WrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf >=20 > -# > -# Silicon Init Package > -# > -!include $(PLATFORM_SI_PACKAGE)/SiPkgCommonLib.dsc > - > -[LibraryClasses.IA32] > - # > - # PEI phase common > - # > - > FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFsp > WrapperPlatformLib/PeiFspWrapperPlatformLib.inf > -!if $(TARGET) =3D=3D DEBUG > - > TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/P > eiTestPointCheckLib.inf > -!endif > - > TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/PeiTestPointLi > b.inf > - > MultiBoardInitSupportLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/Mult > iBoardInitSupportLib/PeiMultiBoardInitSupportLib.inf > - > BoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/MultiBoardInitSup > portLib/PeiMultiBoardInitSupportLib.inf > - > -# Tbt > + # Thunderbolt > !if gBoardModuleTokenSpaceGuid.PcdTbtEnable =3D=3D TRUE > - > PeiTbtPolicyLib|$(PLATFORM_BOARD_PACKAGE)/Features/Tbt/Library/PeiTbt > PolicyLib/PeiTbtPolicyLib.inf > - > PeiDTbtInitLib|$(PLATFORM_BOARD_PACKAGE)/Features/Tbt/Library/Private/ > PeiDTbtInitLib/PeiDTbtInitLib.inf > + > DxeTbtPolicyLib|$(PLATFORM_BOARD_PACKAGE)/Features/Tbt/Library/DxeTb > tPolicyLib/DxeTbtPolicyLib.inf > + > TbtCommonLib|$(PLATFORM_BOARD_PACKAGE)/Features/Tbt/Library/PeiDx > eSmmTbtCommonLib/TbtCommonLib.inf > +!endif > + > + ####################################### > + # Board-specific > + ####################################### > + > PlatformHookLib|$(PROJECT)/Library/BasePlatformHookLib/BasePlatformHo > okLib.inf > +!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection =3D=3D 1 > + # > + # FSP API mode > + # > + > SiliconPolicyUpdateLib|$(PROJECT)/FspWrapper/Library/PeiSiliconPolicyUpda > teLibFsp/PeiSiliconPolicyUpdateLibFsp.inf > +!else > + # > + # FSP Dispatch mode and non-FSP build (EDK2 build) > + # > + > SiliconPolicyUpdateLib|$(PROJECT)/Policy/Library/PeiSiliconPolicyUpdateLi= b/ > PeiSiliconPolicyUpdateLib.inf > !endif > -# > -# Silicon Init Package > -# > -!include $(PLATFORM_SI_PACKAGE)/SiPkgPeiLib.dsc >=20 > [LibraryClasses.IA32.SEC] > + ####################################### > + # Platform Package > + ####################################### >=20 > TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/S > ecTestPointCheckLib.inf >=20 > SecBoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/SecBoardInitLi > bNull/SecBoardInitLibNull.inf >=20 > -[LibraryClasses.X64] > - # > - # DXE phase common > - # > - > FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/DxeFsp > WrapperPlatformLib/DxeFspWrapperPlatformLib.inf > +[LibraryClasses.common.PEIM] > + ####################################### > + # Platform Package > + ####################################### > + > BoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/MultiBoardInitSup > portLib/PeiMultiBoardInitSupportLib.inf > + > FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFsp > WrapperPlatformLib/PeiFspWrapperPlatformLib.inf > + > MultiBoardInitSupportLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/Mult > iBoardInitSupportLib/PeiMultiBoardInitSupportLib.inf > + > TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/PeiTestPointLi > b.inf > !if $(TARGET) =3D=3D DEBUG > - > TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/D > xeTestPointCheckLib.inf > + > TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/P > eiTestPointCheckLib.inf > !endif > - > TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/DxeTestPointL > ib.inf > - > MultiBoardInitSupportLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/Mult > iBoardInitSupportLib/DxeMultiBoardInitSupportLib.inf > + > + ####################################### > + # Board Package > + ####################################### > + # Thunderbolt > +!if gBoardModuleTokenSpaceGuid.PcdTbtEnable =3D=3D TRUE > + > PeiDTbtInitLib|$(PLATFORM_BOARD_PACKAGE)/Features/Tbt/Library/Private/ > PeiDTbtInitLib/PeiDTbtInitLib.inf > + > PeiTbtPolicyLib|$(PLATFORM_BOARD_PACKAGE)/Features/Tbt/Library/PeiTbt > PolicyLib/PeiTbtPolicyLib.inf > +!endif > + > +[LibraryClasses.common.DXE_DRIVER] > + ####################################### > + # Silicon Initialization Package > + ####################################### > + > SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/DxeSiliconPolicyInitL= ib > /DxeSiliconPolicyInitLib.inf > + > + ####################################### > + # Platform Package > + ####################################### > + > BoardAcpiTableLib|$(PLATFORM_PACKAGE)/Acpi/Library/MultiBoardAcpiSup > portLib/DxeMultiBoardAcpiSupportLib.inf >=20 > BoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/MultiBoardInitSup > portLib/DxeMultiBoardInitSupportLib.inf > + > FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/DxeFsp > WrapperPlatformLib/DxeFspWrapperPlatformLib.inf >=20 > MultiBoardAcpiSupportLib|$(PLATFORM_PACKAGE)/Acpi/Library/MultiBoard > AcpiSupportLib/DxeMultiBoardAcpiSupportLib.inf > - > BoardAcpiTableLib|$(PLATFORM_PACKAGE)/Acpi/Library/MultiBoardAcpiSup > portLib/DxeMultiBoardAcpiSupportLib.inf > + > MultiBoardInitSupportLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/Mult > iBoardInitSupportLib/DxeMultiBoardInitSupportLib.inf > + > TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/DxeTestPointL > ib.inf >=20 > - > SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/DxeSiliconPolicyInitL= ib > /DxeSiliconPolicyInitLib.inf > +!if $(TARGET) =3D=3D DEBUG > + > TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/D > xeTestPointCheckLib.inf > +!endif > + > + ####################################### > + # Board-specific > + ####################################### >=20 > SiliconPolicyUpdateLib|$(PROJECT)/Policy/Library/DxeSiliconPolicyUpdateLi= b/ > DxeSiliconPolicyUpdateLib.inf >=20 > -# > -# Silicon Init Package > -# > -!include $(PLATFORM_SI_PACKAGE)/SiPkgDxeLib.dsc > +[LibraryClasses.X64.DXE_RUNTIME_DRIVER] > + ####################################### > + # Silicon Initialization Package > + ####################################### > + > ResetSystemLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/DxeRuntimeResetSys > temLib/DxeRuntimeResetSystemLib.inf >=20 > [LibraryClasses.X64.DXE_SMM_DRIVER] > + ####################################### > + # Silicon Initialization Package > + ####################################### >=20 > SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCo > mmonLib/SmmSpiFlashCommonLib.inf > -!if $(TARGET) =3D=3D DEBUG > - > TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/S > mmTestPointCheckLib.inf > -!endif > - > TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/SmmTestPoin > tLib.inf > - > MultiBoardAcpiSupportLib|$(PLATFORM_PACKAGE)/Acpi/Library/MultiBoard > AcpiSupportLib/SmmMultiBoardAcpiSupportLib.inf > + > + ####################################### > + # Platform Package > + ####################################### >=20 > BoardAcpiEnableLib|$(PLATFORM_PACKAGE)/Acpi/Library/MultiBoardAcpiSu > pportLib/SmmMultiBoardAcpiSupportLib.inf > - > -[LibraryClasses.X64.DXE_RUNTIME_DRIVER] > - > ResetSystemLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/DxeRuntimeResetSys > temLib/DxeRuntimeResetSystemLib.inf > + > MultiBoardAcpiSupportLib|$(PLATFORM_PACKAGE)/Acpi/Library/MultiBoard > AcpiSupportLib/SmmMultiBoardAcpiSupportLib.inf > + > TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/SmmTestPoin > tLib.inf > +!if $(TARGET) =3D=3D DEBUG > + > TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/S > mmTestPointCheckLib.inf > +!endif >=20 > [Components.IA32] > - > -# > -# Common > -# > -!include $(PLATFORM_PACKAGE)/Include/Dsc/CorePeiInclude.dsc > - > - # > - # FSP wrapper SEC Core > - # > + ####################################### > + # Edk2 Packages > + ####################################### > UefiCpuPkg/SecCore/SecCore.inf { > > - #PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf > } >=20 > -# > -# Silicon > -# > -!include $(PLATFORM_SI_PACKAGE)/SiPkgPei.dsc > - > -# > -# Platform > -# > - $(PLATFORM_PACKAGE)/PlatformInit/ReportFv/ReportFvPei.inf > - > $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf > { > - > -!if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport =3D=3D FALSE > - > BoardInitLib|$(PROJECT)/Library/BoardInitLib/PeiBoardInitPreMemLib.inf > -!else > - > NULL|$(PROJECT)/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf > -!endif > - } > - > !if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection =3D=3D 1 > # > # In FSP API mode the policy has to be installed before FSP Wrapper > updating UPD. > @@ -257,16 +283,13 @@ > >=20 > SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitL= ib > Dependency/PeiPreMemSiliconPolicyInitLibDependency.inf > } > - > $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPreMe > m.inf { > + IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf { > > - # > - # Hook a library constructor to update some policy fields when polic= y > installed. > - # > - > NULL|$(PLATFORM_BOARD_PACKAGE)/FspWrapper/Library/PeiSiliconPolicyN > otifyLib/PeiPreMemSiliconPolicyNotifyLib.inf > + > SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitL= ib > Dependency/PeiPostMemSiliconPolicyInitLibDependency.inf > } > !else > # > - # In FSP Dispatch mode the policy will be installed after FSP-M dispat= ched. > (only PrePolicy silicon-init executed) > + # In FSP Dispatch mode the policy will be installed after FSP-M dispat= ched > (only PrePolicy silicon-init executed). > # Do not add policy dependency and let FspmWrapper report FSP-M FV > to dispatcher. > # > IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf { > @@ -274,89 +297,98 @@ >=20 > SiliconPolicyInitLib|MinPlatformPkg/PlatformInit/Library/SiliconPolicyIni= tLib > Null/SiliconPolicyInitLibNull.inf > } > # > - # FSP Dispatch mode will consume DefaultPolicyInit PPI produced by FSP > to install a default policy PPI. > - # Similar as UPD in FSP API mode, DefaultPolicyInit PPI in Dispatch mo= de > can generate different policy structure > - # for different FSP revisions, but they must maintain backward > compatibility. > + # In FSP Dispatch mode the policy will be installed after FSP-S dispat= ched > (only PrePolicy silicon-init executed). > + # Do not add policy dependency and let FspsWrapper report FSP-S FV to > dispatcher. > # > - > $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPreMe > m.inf { > + IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf { > > - > SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitL= ib > /PeiPreMemSiliconPolicyInitLib.inf > + > SiliconPolicyInitLib|MinPlatformPkg/PlatformInit/Library/SiliconPolicyIni= tLib > Null/SiliconPolicyInitLibNull.inf > } > !endif >=20 > + ####################################### > + # Silicon Initialization Package > + ####################################### > + IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf > + > IntelSiliconPkg/Feature/VTd/PlatformVTdInfoSamplePei/PlatformVTdInfoSam > plePei.inf > + > + ####################################### > + # Platform Package > + ####################################### > + $(PLATFORM_PACKAGE)/PlatformInit/ReportFv/ReportFvPei.inf > + > $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf > { > + > + !if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport =3D=3D FALSE > + > BoardInitLib|$(PROJECT)/Library/BoardInitLib/PeiBoardInitPreMemLib.inf > + !else > + > NULL|$(PROJECT)/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf > + !endif > + } > + >=20 > $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitPei/PlatformInitPostMem.in > f { > > -!if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport =3D=3D FALSE > - > BoardInitLib|$(PROJECT)/Library/BoardInitLib/PeiBoardInitPostMemLib.inf > -!else > - > NULL|$(PROJECT)/Library/BoardInitLib/PeiMultiBoardInitPostMemLib.inf > -!endif > + !if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport =3D=3D FALSE > + > BoardInitLib|$(PROJECT)/Library/BoardInitLib/PeiBoardInitPostMemLib.inf > + !else > + > NULL|$(PROJECT)/Library/BoardInitLib/PeiMultiBoardInitPostMemLib.inf > + !endif > } >=20 > !if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection =3D=3D 1 > - # > - # In FSP API mode the policy has to be installed before FSP Wrapper > updating UPD. > - # Add policy as dependency for FSP Wrapper > - # > - IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf { > + > $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPreMe > m.inf { > > - > SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitL= ib > Dependency/PeiPostMemSiliconPolicyInitLibDependency.inf > + # > + # Hook a library constructor to update some policy fields when polic= y > is installed. > + # > + > NULL|$(PLATFORM_BOARD_PACKAGE)/FspWrapper/Library/PeiSiliconPolicyN > otifyLib/PeiPreMemSiliconPolicyNotifyLib.inf > } >=20 > $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPostMe > m.inf > !else > - # > - # In FSP Dispatch mode the policy will be installed after FSP-S dispat= ched. > (only PrePolicy silicon-init executed) > - # Do not add policy dependency and let FspsWrapper report FSP-S FV to > dispatcher. > - # > - IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf { > - > - > SiliconPolicyInitLib|MinPlatformPkg/PlatformInit/Library/SiliconPolicyIni= tLib > Null/SiliconPolicyInitLibNull.inf > - } > # > # FSP Dispatch mode will consume DefaultPolicyInit PPI produced by FSP > to install a default policy PPI. > # Similar as UPD in FSP API mode, DefaultPolicyInit PPI in Dispatch mo= de > can generate different policy structure > # for different FSP revisions, but they must maintain backward > compatibility. > # > + > $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPreMe > m.inf { > + > + > SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitL= ib > /PeiPreMemSiliconPolicyInitLib.inf > + } >=20 > $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPostMe > m.inf { > >=20 > SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitL= ib > /PeiPostMemSiliconPolicyInitLib.inf > } > !endif >=20 > -# > -# Security > -# > - > !if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable =3D=3D TRUE > $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformPei/Tcg2PlatformPei.inf > !endif >=20 > - IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf > - > IntelSiliconPkg/Feature/VTd/PlatformVTdInfoSamplePei/PlatformVTdInfoSam > plePei.inf > - > -# Tbt > + ####################################### > + # Board Package > + ####################################### > + # Thunderbolt > !if gBoardModuleTokenSpaceGuid.PcdTbtEnable =3D=3D TRUE > $(PLATFORM_BOARD_PACKAGE)/Features/Tbt/TbtInit/Pei/PeiTbtInit.inf > !endif >=20 > [Components.X64] > - > -# > -# Common > -# > -!include $(PLATFORM_PACKAGE)/Include/Dsc/CoreDxeInclude.dsc > - > - UefiCpuPkg/CpuDxe/CpuDxe.inf > + ####################################### > + # Edk2 Packages > + ####################################### > + MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf > + MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf > MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf > - > MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf > - MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf > - MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf >=20 > MdeModulePkg/Universal/Console/GraphicsOutputDxe/GraphicsOutputDxe. > inf > + UefiCpuPkg/CpuDxe/CpuDxe.inf >=20 > +!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection =3D=3D 1 > # > - # Shell > + # FSP API mode > # > + IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf > +!endif > + > ShellPkg/Application/Shell/Shell.inf { > > gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE > @@ -376,92 +408,79 @@ > ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf > } >=20 > -# > -# Silicon > -# > -!include $(PLATFORM_SI_PACKAGE)/SiPkgDxe.dsc > - > -# Tbt > -!if gBoardModuleTokenSpaceGuid.PcdTbtEnable =3D=3D TRUE > - $(PLATFORM_BOARD_PACKAGE)/Features/Tbt/TbtInit/Smm/TbtSmm.inf > - $(PLATFORM_BOARD_PACKAGE)/Features/Tbt/TbtInit/Dxe/TbtDxe.inf > - $(PLATFORM_BOARD_PACKAGE)/Features/PciHotPlug/PciHotPlug.inf > -!endif > - > -# > -# Platform > -# > - $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyDxe/SiliconPolicyDxe.inf > - $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitDxe/PlatformInitDxe.inf > -!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection =3D=3D 1 > - # > - # Below module is used by FSP API mode > - # > - IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf > -!endif > - > $(PLATFORM_PACKAGE)/FspWrapper/SaveMemoryConfig/SaveMemoryConfig > .inf > - > - $(PLATFORM_PACKAGE)/Test/TestPointStubDxe/TestPointStubDxe.inf > - $(PLATFORM_PACKAGE)/Test/TestPointDumpApp/TestPointDumpApp.inf > - > -# > -# OS Boot > -# > !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE > - $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf { > - > -!if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport =3D=3D FALSE > - > BoardAcpiTableLib|$(PROJECT)/Library/BoardAcpiLib/DxeBoardAcpiTableLib.i > nf > -!else > - > NULL|$(PROJECT)/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf > -!endif > - } > - $(PLATFORM_BOARD_PACKAGE)/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf { > - > -!if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport =3D=3D FALSE > - > BoardAcpiTableLib|$(PROJECT)/Library/BoardAcpiLib/DxeBoardAcpiTableLib.i > nf > -!else > - > NULL|$(PROJECT)/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf > -!endif > - } > - $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf { > - > -!if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport =3D=3D FALSE > - > BoardAcpiEnableLib|$(PROJECT)/Library/BoardAcpiLib/SmmBoardAcpiEnabl > eLib.inf > -!else > - > NULL|$(PROJECT)/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.inf > -!endif > - } > - > - $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf > - > $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf > - > UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf { > > gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80080046 > > -!if $(TARGET) =3D=3D DEBUG > - > DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.i > nf > -!endif > + !if $(TARGET) =3D=3D DEBUG > + > DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.i > nf > + !endif > } > - > -!endif > - > -# > -# Security > -# > - $(PLATFORM_PACKAGE)/Hsti/HstiIbvPlatformDxe/HstiIbvPlatformDxe.inf > - > -!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable =3D=3D TRUE > - $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf > !endif >=20 > + ####################################### > + # Silicon Initialization Package > + ####################################### > IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf > - > -# > -# Other > -# > $(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf >=20 > -!include $(PLATFORM_SI_PACKAGE)/SiPkgBuildOption.dsc > -!include OpenBoardPkgBuildOption.dsc > + ####################################### > + # Platform Package > + ####################################### > + > $(PLATFORM_PACKAGE)/FspWrapper/SaveMemoryConfig/SaveMemoryConfig > .inf > + $(PLATFORM_PACKAGE)/Hsti/HstiIbvPlatformDxe/HstiIbvPlatformDxe.inf > + $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitDxe/PlatformInitDxe.inf > + $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyDxe/SiliconPolicyDxe.inf > + $(PLATFORM_PACKAGE)/Test/TestPointDumpApp/TestPointDumpApp.inf > + $(PLATFORM_PACKAGE)/Test/TestPointStubDxe/TestPointStubDxe.inf > + > +!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable =3D=3D TRUE > + $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf > +!endif > + > +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE > + > + $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf > + > $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf > + > + $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf { > + > + !if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport =3D=3D FALSE > + > BoardAcpiEnableLib|$(PROJECT)/Library/BoardAcpiLib/SmmBoardAcpiEnabl > eLib.inf > + !else > + > NULL|$(PROJECT)/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.inf > + !endif > + } > + > + $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf { > + > + !if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport =3D=3D FALSE > + > BoardAcpiTableLib|$(PROJECT)/Library/BoardAcpiLib/DxeBoardAcpiTableLib.i > nf > + !else > + > NULL|$(PROJECT)/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf > + !endif > + } > + > +!endif > + > + ####################################### > + # Board Package > + ####################################### > + # Thunderbolt > +!if gBoardModuleTokenSpaceGuid.PcdTbtEnable =3D=3D TRUE > + $(PLATFORM_BOARD_PACKAGE)/Features/Tbt/TbtInit/Smm/TbtSmm.inf > + $(PLATFORM_BOARD_PACKAGE)/Features/Tbt/TbtInit/Dxe/TbtDxe.inf > + $(PLATFORM_BOARD_PACKAGE)/Features/PciHotPlug/PciHotPlug.inf > +!endif > + > +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE > + $(PLATFORM_BOARD_PACKAGE)/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf { > + > + !if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport =3D=3D FALSE > + > BoardAcpiTableLib|$(PROJECT)/Library/BoardAcpiLib/DxeBoardAcpiTableLib.i > nf > + !else > + > NULL|$(PROJECT)/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf > + !endif > + } > +!endif > diff --git > a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.d > sc > b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.d > sc > index edb4013cc0..15d05bea43 100644 > --- > a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.d > sc > +++ > b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.d > sc > @@ -1,5 +1,5 @@ > ## @file > -# Platform description. > +# PCD configuration build description file for the KabylakeRvp3 board. > # > # Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
> # > @@ -9,12 +9,16 @@ >=20 >=20 > ################################################################ > ################ > # > -# Pcd Section - list of all EDK II PCD Entries defined by this Platform > +# Pcd Section - list of all PCD Entries used by this board. > # >=20 > ################################################################ > ################ > -[PcdsFixedAtBuild] > + > +[PcdsFixedAtBuild.common] > + ###################################### > + # Key Boot Stage and FSP configuration > + ###################################### > # > - # Please select BootStage here. > + # Please select the Boot Stage here. > # Stage 1 - enable debug (system deadloop after debug init) > # Stage 2 - mem init (system deadloop after mem init) > # Stage 3 - boot to shell only > @@ -23,61 +27,87 @@ > # > gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4 >=20 > + # > + # 0: FSP Wrapper is running in Dispatch mode. > + # 1: FSP Wrapper is running in API mode. > + # > + gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0 > + > + # > + # FALSE: The board is not a FSP wrapper (FSP binary not used) > + # TRUE: The board is a FSP wrapper (FSP binary is used) > + # > + gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode|TRUE > + > + # > + # FSP Base address PCD will be updated in FDF basing on flash map. > + # > + gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0 > + gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0 > + > + gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF00000 > + gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000 > + gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF80000 > + gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000 > + gSiPkgTokenSpaceGuid.PcdTsegSize|0x1000000 > + > +!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection =3D=3D 1 > + # > + # FSP API mode does not share stack with the boot loader, > + # so FSP needs more temporary memory for FSP heap + stack size. > + # > + gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize|0x26000 > + # > + # FSP API mode does not need to enlarge the boot loader stack size > + # since the stacks are separate. > + # > + gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x20000 > +!else > + # > + # In FSP Dispatch mode boot loader stack size must be large > + # enough for executing both boot loader and FSP. > + # > + gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x40000 > +!endif > + > +!if (gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode =3D=3D FALSE) > || (gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection =3D=3D 1) > + > gSiPkgTokenSpaceGuid.PcdSiPciExpressBaseAddress|gEfiMdePkgTokenSpaceG > uid.PcdPciExpressBaseAddress > + > gSiPkgTokenSpaceGuid.PcdSiPciExpressRegionLength|gMinPlatformPkgTokenS > paceGuid.PcdPciExpressRegionLength > +!else > + # > + # FSP Dispatch mode requires more platform memory as boot loader and > FSP sharing the same > + # platform memory. > + # > + gSiPkgTokenSpaceGuid.PcdPeiMinMemorySize|0x5500000 > +!endif > + > [PcdsFeatureFlag.common] > - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE > - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE > - gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE > - gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|FALSE > - gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|FALSE > - > -!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 1 > - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|TRUE > -!endif > - > -!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 2 > - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE > - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|TRUE > -!endif > - > -!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 3 > - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE > - gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|TRUE > -!endif > - > -!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 4 > - gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE > -!endif > - > -!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 5 > - gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|TRUE > - gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|TRUE > + ###################################### > + # Edk2 Configuration > + ###################################### > + > gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreImageLoaderSearchTeSection > First|FALSE > + gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|FALSE > +!if $(TARGET) =3D=3D RELEASE > + gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE > +!else > + gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE > !endif > - > - gBoardModuleTokenSpaceGuid.PcdTbtEnable|FALSE > - # > - # More fine granularity control below: > - # > - > - > - gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport|TRUE > - > - > - > -# > -# TRUE is ENABLE. FALSE is DISABLE. > -# > - > -# > -# BIOS build switches configuration > -# > + gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE > + gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileEnable|FALSE > + gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE > + > + ###################################### > + # Silicon Configuration > + ###################################### > + # Build switches > gSiPkgTokenSpaceGuid.PcdOptimizeCompilerEnable|TRUE >=20 > -# CPU > - gSiPkgTokenSpaceGuid.PcdSourceDebugEnable|FALSE > - gSiPkgTokenSpaceGuid.PcdTxtEnable|TRUE #Set to FALSE for GCC Build > @todo Convert TXT ASM to NASM > + # CPU > gSiPkgTokenSpaceGuid.PcdBiosGuardEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdSourceDebugEnable|FALSE > + gSiPkgTokenSpaceGuid.PcdTxtEnable|FALSE >=20 > -# SA > + # SA > gSiPkgTokenSpaceGuid.PcdIgdEnable|TRUE > gSiPkgTokenSpaceGuid.PcdPegEnable|TRUE > gSiPkgTokenSpaceGuid.PcdSgEnable|TRUE > @@ -88,207 +118,133 @@ > gSiPkgTokenSpaceGuid.PcdVtdEnable|TRUE > gSiPkgTokenSpaceGuid.PcdPeiDisplayEnable|TRUE >=20 > -# ME > + # ME > gSiPkgTokenSpaceGuid.PcdAmtEnable|TRUE > gSiPkgTokenSpaceGuid.PcdAtaEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdPttEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdPttEnable|FALSE > gSiPkgTokenSpaceGuid.PcdJhiEnable|TRUE >=20 > + # Others > gSiPkgTokenSpaceGuid.PcdAcpiEnable|TRUE > gSiPkgTokenSpaceGuid.PcdBdatEnable|TRUE > gSiPkgTokenSpaceGuid.PcdBootGuardEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdIntegratedTouchEnable|TRUE > gSiPkgTokenSpaceGuid.PcdCpuPowerOnConfigEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdSiCsmEnable|FALSE > gSiPkgTokenSpaceGuid.PcdEvLoaderEnable|FALSE > - gSiPkgTokenSpaceGuid.PcdTraceHubEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdIntegratedTouchEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdOcWdtEnable|TRUE > gSiPkgTokenSpaceGuid.PcdOverclockEnable|TRUE > gSiPkgTokenSpaceGuid.PcdPpmEnable|TRUE > gSiPkgTokenSpaceGuid.PcdS3Enable|TRUE > gSiPkgTokenSpaceGuid.PcdSerialGpioEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdSiCatalogDebugEnable|FALSE > + gSiPkgTokenSpaceGuid.PcdSiCsmEnable|FALSE > gSiPkgTokenSpaceGuid.PcdSmbiosEnable|TRUE > gSiPkgTokenSpaceGuid.PcdSmmVariableEnable|TRUE > gSiPkgTokenSpaceGuid.PcdSoftwareGuardEnable|TRUE > gSiPkgTokenSpaceGuid.PcdSsaFlagEnable|FALSE > - gSiPkgTokenSpaceGuid.PcdOcWdtEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdSiCatalogDebugEnable|FALSE > - > -# > -# Override some PCDs for specific build requirements. > -# > - # > - # Disable USB debug message when Source Level Debug is enabled > - # because they cannot be enabled at the same time. > - # > - > - gSiPkgTokenSpaceGuid.PcdPttEnable|FALSE > - gSiPkgTokenSpaceGuid.PcdTxtEnable|FALSE > - gSiPkgTokenSpaceGuid.PcdTxtEnable|FALSE > - > - > - > - !if $(TARGET) =3D=3D DEBUG > - gSiPkgTokenSpaceGuid.PcdOptimizeCompilerEnable|TRUE > - !else > - gSiPkgTokenSpaceGuid.PcdOptimizeCompilerEnable|TRUE > - !endif > - > - !if $(TARGET) =3D=3D DEBUG > - gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|TRUE > - !else > - gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE > - !endif > - > + gSiPkgTokenSpaceGuid.PcdTraceHubEnable|TRUE > + > + ###################################### > + # Platform Configuration > + ###################################### > + gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE > + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE > + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE > gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable|FALSE > + gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|FALSE > + gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|FALSE >=20 > - gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE > - > gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreImageLoaderSearchTeSection > First|FALSE > -!if $(TARGET) =3D=3D RELEASE > - gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE > +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 1 > + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|TRUE > +!endif > + > +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 2 > + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE > + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|TRUE > +!endif > + > +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 3 > + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE > + gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|TRUE > +!endif > + > +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 4 > + gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE > +!endif > + > +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 5 > + gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|TRUE > + gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|TRUE > +!endif > + > +!if $(TARGET) =3D=3D DEBUG > + gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|TRUE > !else > - gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE > + gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE > !endif > - gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|FALSE >=20 > - gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileEnable|FALSE > - > - gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE > + ###################################### > + # Board Configuration > + ###################################### > + gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport|TRUE > + gBoardModuleTokenSpaceGuid.PcdTbtEnable|FALSE >=20 > [PcdsFixedAtBuild.common] > - gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode|TRUE > - # > - # 0: FSP Wrapper is running in Dispatch mode. > - # 1: FSP Wrapper is running in API mode. > - # > - gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0 > - > + ###################################### > + # Edk2 Configuration > + ###################################### > +!if $(TARGET) =3D=3D RELEASE > + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0 > + gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x3 > +!else > + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F > + gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07 > +!endif > + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000 > !if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable =3D=3D TRUE > gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0x1 > +!endif > + > + gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|FALSE > + gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserFieldTextColor|0x01 > + gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserSubtitleTextColor|0x0 > + gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x00000800 > + > gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable|$(T > OP_MEMORY_ADDRESS) > + > gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x40 > 0 > +!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable =3D=3D TRUE >=20 > gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|140 > !endif > - > + gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x5000 > + > gEfiMdeModulePkgTokenSpaceGuid.PcdReclaimVariableSpaceAtEndOfDxe|TR > UE > !if gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable =3D=3D TRUE >=20 > gEfiMdeModulePkgTokenSpaceGuid.PcdSmiHandlerProfilePropertyMask|0x1 > !endif > - > - gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2 > - gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8 > - gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|1 > - > - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000 > - > gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000 > - gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF80000 > - gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000 > - gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF00000 > - gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000 > - > -!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection =3D=3D 1 > - # > - # FSP API mode is backward compatible with earlier FSP which > - # does not share stack with boot loader, so FSP needs more > - # temporary memory for FSP heap + stack size. > - # > - gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize | > 0x00026000 > - > - # > - # In FSP API mode, FSP and boot loader runnig on different stack > - # so no need to enlarge boot loader stack size. > - # > - gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x20000 > -!else > - # > - # FSP Dispatch mode will share the same stack and heap with boot > loader, > - # no separate temporary ram required by FSP. > - # > - gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize | 0 > - > - # > - # In FSP Dispatch mode boot loader stack size must be big enough for > executing > - # both boot loader and FSP. > - # > - gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x40000 > -!endif > - > - gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x5000 > - gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x00000800 > - > gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x40 > 0 > - > gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE > - gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|FALSE > - gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|10000 > -!if $(TARGET) =3D=3D RELEASE > - gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0 > - gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x3 > -!else > - gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F > +!if $(TARGET) =3D=3D DEBUG >=20 > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALS > E > - gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07 > !endif > - > gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable|$(T > OP_MEMORY_ADDRESS) > - gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserSubtitleTextColor|0x0 > - gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserFieldTextColor|0x01 > - gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x20000 > - > - > - > - > -gEfiMdeModulePkgTokenSpaceGuid.PcdReclaimVariableSpaceAtEndOfDxe|T > RUE > - > -# > -# 8MB Default > -# > -gSiPkgTokenSpaceGuid.PcdTsegSize|0x800000 > - > -# > -# 16MB TSEG in Debug build only. > -# > -!if $(TARGET) =3D=3D DEBUG > - gSiPkgTokenSpaceGuid.PcdTsegSize|0x1000000 > -!endif > - > - >=20 > + gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoBarEnableMask|0x80 > + gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset|0x40 > gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBusNumber|0x0 > gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciDeviceNumber|0x1F > - gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciFunctionNumber|0x2 > gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciEnableRegisterOffset|0x44 > - gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoBarEnableMask|0x80 > - gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset|0x40 > + gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciFunctionNumber|0x2 > gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddress|0x1800 > - gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset|0x08 > gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddressMask|0xFFFC > + gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset|0x08 >=20 > - !if $(TARGET) =3D=3D RELEASE > - > gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x402 > - !else > - > gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x188 > B > - !endif > - > - > - gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b > - !if $(TARGET) =3D=3D RELEASE > - gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x70 > - !else > - gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0xE0 > - !endif > - > - # > - # FSP Base address PCD will be updated in FDF basing on flash map. > - # > - gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0 > - gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0 > - > - ## Specifies timeout value in microseconds for the BSP to detect all A= Ps > for the first time. > - # @Prompt Timeout for the BSP to detect all APs for the first time. > + # Specifies timeout value in microseconds for the BSP to detect all AP= s > for the first time. > gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|1000 > - > + gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|10000 > + gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x20000 > !if (gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode =3D=3D FALSE) > || (gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection =3D=3D 1) > # > # In non-FSP build (EDK2 build) or FSP API mode below PCD are > FixedAtBuild > # (They will be DynamicEx in FSP Dispatch mode) > # > ## Specifies max supported number of Logical Processors. > - # @Prompt Configure max supported number of Logical Processorss > + # @Prompt Configure max supported number of Logical Processors > gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|12 >=20 > ## Specifies the size of the microcode Region. > @@ -302,17 +258,24 @@ gSiPkgTokenSpaceGuid.PcdTsegSize|0x800000 > # 3: Place AP in the Run-Loop state. > # @Prompt The AP wait loop state. > gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode|2 > - > - > gSiPkgTokenSpaceGuid.PcdSiPciExpressBaseAddress|gEfiMdePkgTokenSpaceG > uid.PcdPciExpressBaseAddress > - > gSiPkgTokenSpaceGuid.PcdSiPciExpressRegionLength|gMinPlatformPkgTokenS > paceGuid.PcdPciExpressRegionLength > -!else > - # > - # FSP Dispatch mode requires more platform memory as boot loader and > FSP sharing the same > - # platform memory. > - # > - gSiPkgTokenSpaceGuid.PcdPeiMinMemorySize|0x5500000 > !endif >=20 > + ###################################### > + # Silicon Configuration > + ###################################### > + > + # Refer to HstiFeatureBit.h for bit definitions > + gSiPkgTokenSpaceGuid.PcdHstiIhvFeature1|0xF2 > + gSiPkgTokenSpaceGuid.PcdHstiIhvFeature2|0x07 > + > + ###################################### > + # Platform Configuration > + ###################################### > + gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|1 > + gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8 > + gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2 > + > gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000 > + > # > # The PCDs are used to control the Windows SMM Security Mitigations > Table - Protection Flags > # > @@ -324,11 +287,18 @@ gSiPkgTokenSpaceGuid.PcdTsegSize|0x800000 > # > gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags|0x07 >=20 > - # > - # See HstiFeatureBit.h for the definition > - # > - gSiPkgTokenSpaceGuid.PcdHstiIhvFeature1|0xF2 > - gSiPkgTokenSpaceGuid.PcdHstiIhvFeature2|0x07 > +!if $(TARGET) =3D=3D RELEASE > + > gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x402 > +!else > + > gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x188 > B > +!endif > + > + gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b > +!if $(TARGET) =3D=3D RELEASE > + > gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x70 > +!else > + > gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0xE0 > +!endif >=20 > !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage =3D=3D 1 > gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, > 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0= x00, > 0x00, 0x00} > @@ -355,90 +325,111 @@ gSiPkgTokenSpaceGuid.PcdTsegSize|0x800000 > !endif >=20 > [PcdsFixedAtBuild.IA32] > + ###################################### > + # Edk2 Configuration > + ###################################### > gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0 > gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress|0xFED00148 > - gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0xA0000 > gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000 >=20 > + ###################################### > + # Platform Configuration > + ###################################### > + gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0xA0000 > + > [PcdsFixedAtBuild.X64] > + ###################################### > + # Edk2 Configuration > + ###################################### > + > # Default platform supported RFC 4646 languages: (American) English >=20 > gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultPlatformLangCodes|"en- > US" >=20 > - > [PcdsPatchableInModule.common] > + ###################################### > + # Edk2 Configuration > + ###################################### > gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0208 > - > gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000046 >=20 > + ###################################### > + # Silicon Configuration > + ###################################### > !if $(TARGET) =3D=3D DEBUG > gSiPkgTokenSpaceGuid.PcdSerialIoUartDebugEnable|1 > !endif >=20 > -[PcdsDynamicHii.X64.DEFAULT] > - > gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGloba > lVariableGuid|0x0|5 # Variable: L"Timeout" > - > gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupp > ort"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport" > - > -!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable =3D=3D TRUE > - > gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGloba > lVariableGuid|0x0|1 # Variable: L"Timeout" > -!endif > - > [PcdsDynamicDefault] > - # > - # FSP Base address PCD will be updated in FDF basing on flash map. > - # > - gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0 > - # Platform will pre-allocate UPD buffer and pass it to FspWrapper > - # Those dummy address will be patched before FspWrapper executing > - gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress|0xFFFFFFFF > - gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0xFFFFFFFF > - > -[PcdsDynamicDefault.common.DEFAULT] > - gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|0x0 > - gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|0x0 > + ###################################### > + # Edk2 Configuration > + ###################################### > gEfiMdeModulePkgTokenSpaceGuid.PcdAtaSmartEnable|TRUE > gEfiMdeModulePkgTokenSpaceGuid.PcdConInConnectOnDemand|FALSE > + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|0x0 > + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|0x0 > + > gEfiMdeModulePkgTokenSpaceGuid.PcdS3BootScriptTablePrivateDataPtr|0x0 > + > # > # Set video to native resolution as Windows 8 WHCK requirement. > # > gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0x0 > gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0x0 >=20 > - > gEfiMdeModulePkgTokenSpaceGuid.PcdS3BootScriptTablePrivateDataPtr|0x0 > - > -[PcdsDynamicDefault.common.DEFAULT] > - # gEfiTpmDeviceInstanceTpm20DtpmGuid > - gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x5a, 0xf2, 0x6b, > 0x28, 0xc3, 0xc2, 0x8c, 0x40, 0xb3, 0xb4, 0x25, 0xe6, 0x75, 0x8b, 0x73, 0= x17} > gEfiSecurityPkgTokenSpaceGuid.PcdTcg2HashAlgorithmBitmap|0 > gEfiSecurityPkgTokenSpaceGuid.PcdTpm2HashMask|0x0000001F > gEfiSecurityPkgTokenSpaceGuid.PcdTpmInitializationPolicy|1 > + gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x5a, 0xf2, 0x6b, > 0x28, 0xc3, 0xc2, 0x8c, 0x40, 0xb3, 0xb4, 0x25, 0xe6, 0x75, 0x8b, 0x73, 0= x17} >=20 > -# Tbt > -gBoardModuleTokenSpaceGuid.PcdDTbtControllerEn | 0x1 > -gBoardModuleTokenSpaceGuid.PcdDTbtControllerType | 0x1 > -gBoardModuleTokenSpaceGuid.PcdDTbtPcieRpNumber | 0x1 > -gBoardModuleTokenSpaceGuid.PcdDTbtGpioAccessType | 0x2 > -gBoardModuleTokenSpaceGuid.PcdExpander | 0x0 > -gBoardModuleTokenSpaceGuid.PcdDTbtGpioLevel | 0x1 > -gBoardModuleTokenSpaceGuid.PcdDTbtForcepowerGpioPad | 13 > -gBoardModuleTokenSpaceGuid.PcdDTbtCioPlugEventGpioPad | 0x02010011 > -gBoardModuleTokenSpaceGuid.PcdDTbtAcpiGpeSignature | 0 > -gBoardModuleTokenSpaceGuid.PcdDTbtAcpiGpeSignaturePorting | 0 > -gBoardModuleTokenSpaceGuid.PcdDTbtSecurityMode | 0x1 > -#gBoardModuleTokenSpaceGuid.PcdDTbtGpio5Filter | 0x0 > -gBoardModuleTokenSpaceGuid.PcdDTbtWakeupSupport | 0x0 > -gBoardModuleTokenSpaceGuid.PcdDTbtHotSMI | 0x1 > -gBoardModuleTokenSpaceGuid.PcdDTbtHotNotify | 0x1 > -gBoardModuleTokenSpaceGuid.PcdDTbtSetClkReq| 0x1 > -gBoardModuleTokenSpaceGuid.PcdDTbtAspm | 0x0 > -gBoardModuleTokenSpaceGuid.PcdDTbtAcDcSwitch | 0x0 > -gBoardModuleTokenSpaceGuid.PcdRtd3Tbt | 0x1 > -gBoardModuleTokenSpaceGuid.PcdRtd3TbtClkReq | 0x1 > -gBoardModuleTokenSpaceGuid.PcdDTbtWin10Support | 0x0 > -gBoardModuleTokenSpaceGuid.PcdRtd3TbtClkReqDelay | 0x0 > -gBoardModuleTokenSpaceGuid.PcdRtd3TbtOffDelay | 5000 > -gBoardModuleTokenSpaceGuid.PcdDTbtPcieExtraBusRsvd | 56 > -gBoardModuleTokenSpaceGuid.PcdDTbtPcieMemRsvd | 100 > -gBoardModuleTokenSpaceGuid.PcdDTbtPcieMemAddrRngMax | 26 > -gBoardModuleTokenSpaceGuid.PcdDTbtPciePMemRsvd | 100 > -gBoardModuleTokenSpaceGuid.PcdDTbtPciePMemAddrRngMax | 28 > -gBoardModuleTokenSpaceGuid.PcdPchPcieRootPortHpe| 0x00000001 > + # > + # FSP Base address PCD will be updated in FDF basing on flash map. > + # > + gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0 > + # Platform will pre-allocate UPD buffer and pass it to FspWrapper > + # Those dummy address will be patched before FspWrapper executing > + gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress|0xFFFFFFFF > + gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0xFFFFFFFF > + > + ###################################### > + # Board Configuration > + ###################################### > + > + # Thunderbolt Configuration > + gBoardModuleTokenSpaceGuid.PcdDTbtAcDcSwitch|0x0 > + gBoardModuleTokenSpaceGuid.PcdDTbtAcpiGpeSignature|0 > + gBoardModuleTokenSpaceGuid.PcdDTbtAcpiGpeSignaturePorting|0 > + gBoardModuleTokenSpaceGuid.PcdDTbtAspm|0x0 > + > gBoardModuleTokenSpaceGuid.PcdDTbtCioPlugEventGpioPad|0x02010011 > + gBoardModuleTokenSpaceGuid.PcdDTbtControllerEn|0x1 > + gBoardModuleTokenSpaceGuid.PcdDTbtControllerType|0x1 > + gBoardModuleTokenSpaceGuid.PcdDTbtForcepowerGpioPad|13 > + gBoardModuleTokenSpaceGuid.PcdDTbtGpioAccessType|0x2 > + gBoardModuleTokenSpaceGuid.PcdDTbtGpioLevel|0x1 > + gBoardModuleTokenSpaceGuid.PcdDTbtHotNotify|0x1 > + gBoardModuleTokenSpaceGuid.PcdDTbtHotSMI|0x1 > + gBoardModuleTokenSpaceGuid.PcdDTbtPcieExtraBusRsvd|56 > + gBoardModuleTokenSpaceGuid.PcdDTbtPcieMemAddrRngMax|26 > + gBoardModuleTokenSpaceGuid.PcdDTbtPcieMemRsvd|100 > + gBoardModuleTokenSpaceGuid.PcdDTbtPciePMemAddrRngMax|28 > + gBoardModuleTokenSpaceGuid.PcdDTbtPciePMemRsvd|100 > + gBoardModuleTokenSpaceGuid.PcdDTbtPcieRpNumber|0x1 > + gBoardModuleTokenSpaceGuid.PcdDTbtSecurityMode|0x1 > + gBoardModuleTokenSpaceGuid.PcdDTbtSetClkReq|0x1 > + gBoardModuleTokenSpaceGuid.PcdDTbtWakeupSupport|0x0 > + gBoardModuleTokenSpaceGuid.PcdDTbtWin10Support|0x0 > + gBoardModuleTokenSpaceGuid.PcdExpander|0x0 > + gBoardModuleTokenSpaceGuid.PcdPchPcieRootPortHpe|0x00000001 > + gBoardModuleTokenSpaceGuid.PcdRtd3Tbt|0x1 > + gBoardModuleTokenSpaceGuid.PcdRtd3TbtClkReq|0x1 > + gBoardModuleTokenSpaceGuid.PcdRtd3TbtClkReqDelay|0x0 > + gBoardModuleTokenSpaceGuid.PcdRtd3TbtOffDelay|5000 > + > +[PcdsDynamicHii.X64.DEFAULT] > + ###################################### > + # Edk2 Configuration > + ###################################### > + > gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupp > ort"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport" > +!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable =3D=3D TRUE > + > gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGloba > lVariableGuid|0x0|1 # Variable: L"Timeout" > +!else > + > gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGloba > lVariableGuid|0x0|5 # Variable: L"Timeout" > +!endif > -- > 2.16.2.windows.1