From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mx.groups.io with SMTP id smtpd.web12.52.1570552252182793154 for ; Tue, 08 Oct 2019 09:30:52 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.120, mailfrom: chasel.chiu@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Oct 2019 09:30:51 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,270,1566889200"; d="scan'208";a="193422869" Received: from pgsmsx102.gar.corp.intel.com ([10.221.44.80]) by fmsmga007.fm.intel.com with ESMTP; 08 Oct 2019 09:30:50 -0700 Received: from pgsmsx112.gar.corp.intel.com ([169.254.3.2]) by PGSMSX102.gar.corp.intel.com ([169.254.6.203]) with mapi id 14.03.0439.000; Wed, 9 Oct 2019 00:30:49 +0800 From: "Chiu, Chasel" To: "Kubacki, Michael A" , "devel@edk2.groups.io" CC: "Desimone, Nathaniel L" Subject: Re: [edk2-platforms][PATCH V1 09/17] WhiskeylakeOpenBoardPkg/WhiskeylakeURvp: Remove OpenBoardPkgConfig.dsc Thread-Topic: [edk2-platforms][PATCH V1 09/17] WhiskeylakeOpenBoardPkg/WhiskeylakeURvp: Remove OpenBoardPkgConfig.dsc Thread-Index: AQHVfZesK4Iq4wDrHkm8tpdnm51MeKdQ8EIQ Date: Tue, 8 Oct 2019 16:30:48 +0000 Message-ID: <3C3EFB470A303B4AB093197B6777CCEC504F20A6@PGSMSX112.gar.corp.intel.com> References: <20191008051645.22052-1-michael.a.kubacki@intel.com> <20191008051645.22052-10-michael.a.kubacki@intel.com> In-Reply-To: <20191008051645.22052-10-michael.a.kubacki@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNDY2ZjM0NjAtY2Q0Ny00M2YxLWI1NGUtZjdhYjMwOWJjZWMyIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiU1pNRGROMnhWMXVBVnR4SVFDbmxSWEtBSmhQYU43QnFJNDZJejJHRFNVUGlNdnZTanhEem1URVlFM01XaW4zeCJ9 x-ctpclassification: CTP_NT x-originating-ip: [172.30.20.206] MIME-Version: 1.0 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Chasel Chiu > -----Original Message----- > From: Kubacki, Michael A > Sent: Tuesday, October 8, 2019 1:17 PM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Desimone, Nathaniel L > > Subject: [edk2-platforms][PATCH V1 09/17] > WhiskeylakeOpenBoardPkg/WhiskeylakeURvp: Remove > OpenBoardPkgConfig.dsc >=20 > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D2243 >=20 > The location for PCD configuration is currently inconsistent in > WhiskeylakeOpenBoardPkg. A large set of FeaturePCD definitions are in > OpenBoardPkgConfig.dsc while other PCD definitions (including > FeaturePCD) are located in OpenBoardPkgPcd.dsc. >=20 > This change consolidates PCD configuration for the WhiskeylakeURvp board > to OpenBoardPkgPcd.dsc and removes OpenBoardPkgConfig.dsc. >=20 > Cc: Chasel Chiu > Cc: Nate DeSimone > Signed-off-by: Michael Kubacki > --- >=20 > Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg. > dsc | 1 - >=20 > Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg > Config.dsc | 128 -------------------- >=20 > Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg > Pcd.dsc | 116 ++++++++++++++++++ > 3 files changed, 116 insertions(+), 129 deletions(-) >=20 > diff --git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardP > kg.dsc > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardP > kg.dsc > index 9a516cad60..1d07fdea84 100644 > --- > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardP > kg.dsc > +++ > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardP > k > +++ g.dsc > @@ -26,7 +26,6 @@ > # > # Platform On/Off features are defined here > # > - !include OpenBoardPkgConfig.dsc > !include OpenBoardPkgPcd.dsc >=20 >=20 > ################################################################ > ################ > diff --git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardP > kgConfig.dsc > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardP > kgConfig.dsc > deleted file mode 100644 > index c68fecf50e..0000000000 > --- > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardP > kgConfig.dsc > +++ /dev/null > @@ -1,128 +0,0 @@ > -## @file > -# Platform configuration file. > -# > -# > -# Copyright (c) 2019, Intel Corporation. All rights reserved.
-# -# > SPDX-License-Identifier: BSD-2-Clause-Patent -# -# -## > - > -[PcdsFixedAtBuild] > - # > - # Please select BootStage here. > - # Stage 1 - enable debug (system deadloop after debug init) > - # Stage 2 - mem init (system deadloop after mem init) > - # Stage 3 - boot to shell only > - # Stage 4 - boot to OS > - # Stage 5 - boot to OS with security boot enabled > - # > - gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4 > - > -[PcdsFeatureFlag] > - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE > - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE > - gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE > - gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|FALSE > - gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|FALSE > - > -!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 1 > - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|TRUE > -!endif > - > -!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 2 > - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE > - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|TRUE > -!endif > - > -!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 3 > - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE > - gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|TRUE > -!endif > - > -!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 4 > - gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE > -!endif > - > -!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 5 > - gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|TRUE > - gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|TRUE > -!endif > - > - gBoardModuleTokenSpaceGuid.PcdTbtEnable|FALSE > - # > - # More fine granularity control below: > - # > - > - gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport|TRUE > - > -# > -# TRUE is ENABLE. FALSE is DISABLE. > -# > -# > -# BIOS build switches configuration > -# > - gSiPkgTokenSpaceGuid.PcdOptimizeCompilerEnable|TRUE > - > -# CPU > - gSiPkgTokenSpaceGuid.PcdSourceDebugEnable|FALSE > - > -# SA > - gSiPkgTokenSpaceGuid.PcdIgdEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdPegEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdSgEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdSaDmiEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdSaOcEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdVtdEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdPeiDisplayEnable|TRUE > - > -# ME > - gSiPkgTokenSpaceGuid.PcdAtaEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdPttEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdJhiEnable|TRUE > - > - gSiPkgTokenSpaceGuid.PcdAcpiEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdBdatEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdIntegratedTouchEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdCpuPowerOnConfigEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdSiCsmEnable|FALSE > - gSiPkgTokenSpaceGuid.PcdTraceHubEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdOverclockEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdPpmEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdS3Enable|TRUE > - gSiPkgTokenSpaceGuid.PcdSmbiosEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdSmmVariableEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdUseHpetTimer|TRUE > # TRUE - HPET / FALSE - 8254 timer is used. > - gSiPkgTokenSpaceGuid.PcdOcWdtEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdSiCatalogDebugEnable|FALSE > - > - gSiPkgTokenSpaceGuid.PcdSerialIoUartEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdCflCpuEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdIpuEnable|TRUE > - gSiPkgTokenSpaceGuid.PcdGnaEnable|TRUE > - > -# > -# Override some PCDs for specific build requirements. > -# > - # > - # Disable USB debug message when Source Level Debug is enabled > - # because they cannot be enabled at the same time. > - # > - > - gSiPkgTokenSpaceGuid.PcdPttEnable|FALSE > - > - !if $(TARGET) =3D=3D DEBUG > - gSiPkgTokenSpaceGuid.PcdOptimizeCompilerEnable|TRUE > - !else > - gSiPkgTokenSpaceGuid.PcdOptimizeCompilerEnable|TRUE > - !endif > - > - !if $(TARGET) =3D=3D DEBUG > - gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|TRUE > - !else > - gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE > - !endif > - > - gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable|FALSE > - > diff --git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardP > kgPcd.dsc > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardP > kgPcd.dsc > index 96d65133ae..24e3da6686 100644 > --- > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardP > kgPcd.dsc > +++ > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardP > k > +++ gPcd.dsc > @@ -14,7 +14,123 @@ > # Pcd Section - list of all EDK II PCD Entries defined by this Platform = # > ################################################################ > ################ > +[PcdsFixedAtBuild] > + # > + # Please select BootStage here. > + # Stage 1 - enable debug (system deadloop after debug init) > + # Stage 2 - mem init (system deadloop after mem init) > + # Stage 3 - boot to shell only > + # Stage 4 - boot to OS > + # Stage 5 - boot to OS with security boot enabled > + # > + gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4 > + > [PcdsFeatureFlag.common] > + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE > + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE > + gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE > + gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|FALSE > + gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|FALSE > + > +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 1 > + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|TRUE > +!endif > + > +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 2 > + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE > + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|TRUE > +!endif > + > +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 3 > + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE > + gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|TRUE > +!endif > + > +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 4 > + gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE > +!endif > + > +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 5 > + gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|TRUE > + gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|TRUE > +!endif > + > + gBoardModuleTokenSpaceGuid.PcdTbtEnable|FALSE > + # > + # More fine granularity control below: > + # > + > + gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport|TRUE > + > +# > +# TRUE is ENABLE. FALSE is DISABLE. > +# > +# > +# BIOS build switches configuration > +# > + gSiPkgTokenSpaceGuid.PcdOptimizeCompilerEnable|TRUE > + > +# CPU > + gSiPkgTokenSpaceGuid.PcdSourceDebugEnable|FALSE > + > +# SA > + gSiPkgTokenSpaceGuid.PcdIgdEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdPegEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdSgEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdSaDmiEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdSaOcEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdVtdEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdPeiDisplayEnable|TRUE > + > +# ME > + gSiPkgTokenSpaceGuid.PcdAtaEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdPttEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdJhiEnable|TRUE > + > + gSiPkgTokenSpaceGuid.PcdAcpiEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdBdatEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdIntegratedTouchEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdCpuPowerOnConfigEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdSiCsmEnable|FALSE > + gSiPkgTokenSpaceGuid.PcdTraceHubEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdOverclockEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdPpmEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdS3Enable|TRUE > + gSiPkgTokenSpaceGuid.PcdSmbiosEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdSmmVariableEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdUseHpetTimer|TRUE > # TRUE - HPET / FALSE - 8254 timer is used. > + gSiPkgTokenSpaceGuid.PcdOcWdtEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdSiCatalogDebugEnable|FALSE > + > + gSiPkgTokenSpaceGuid.PcdSerialIoUartEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdCflCpuEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdIpuEnable|TRUE > + gSiPkgTokenSpaceGuid.PcdGnaEnable|TRUE > + > +# > +# Override some PCDs for specific build requirements. > +# > + # > + # Disable USB debug message when Source Level Debug is enabled > + # because they cannot be enabled at the same time. > + # > + > + gSiPkgTokenSpaceGuid.PcdPttEnable|FALSE > + > + !if $(TARGET) =3D=3D DEBUG > + gSiPkgTokenSpaceGuid.PcdOptimizeCompilerEnable|TRUE > + !else > + gSiPkgTokenSpaceGuid.PcdOptimizeCompilerEnable|TRUE > + !endif > + > + !if $(TARGET) =3D=3D DEBUG > + gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|TRUE > + !else > + gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE > + !endif > + > + gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable|FALSE > + >=20 > #gEfiMdeModulePkgTokenSpaceGuid.PcdFrameworkCompatibilitySupport|T > RUE > gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE >=20 > gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreImageLoaderSearchTeSection > First|FALSE > -- > 2.16.2.windows.1