From mboxrd@z Thu Jan  1 00:00:00 1970
Authentication-Results: mx.groups.io;
 dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.43, mailfrom: chasel.chiu@intel.com)
Received: from mga05.intel.com (mga05.intel.com [192.55.52.43])
 by groups.io with SMTP; Tue, 08 Oct 2019 09:32:45 -0700
X-Amp-Result: SKIPPED(no attachment in message)
X-Amp-File-Uploaded: False
Received: from orsmga001.jf.intel.com ([10.7.209.18])
  by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Oct 2019 09:32:45 -0700
X-ExtLoop1: 1
X-IronPort-AV: E=Sophos;i="5.67,270,1566889200"; 
   d="scan'208";a="277148724"
Received: from pgsmsx111.gar.corp.intel.com ([10.108.55.200])
  by orsmga001.jf.intel.com with ESMTP; 08 Oct 2019 09:32:44 -0700
Received: from pgsmsx109.gar.corp.intel.com (10.221.44.109) by
 PGSMSX111.gar.corp.intel.com (10.108.55.200) with Microsoft SMTP Server (TLS)
 id 14.3.439.0; Wed, 9 Oct 2019 00:32:43 +0800
Received: from pgsmsx112.gar.corp.intel.com ([169.254.3.2]) by
 PGSMSX109.gar.corp.intel.com ([169.254.14.150]) with mapi id 14.03.0439.000;
 Wed, 9 Oct 2019 00:32:43 +0800
From: "Chiu, Chasel" <chasel.chiu@intel.com>
To: "Kubacki, Michael A" <michael.a.kubacki@intel.com>, "devel@edk2.groups.io"
	<devel@edk2.groups.io>
CC: "Desimone, Nathaniel L" <nathaniel.l.desimone@intel.com>
Subject: Re: [edk2-platforms][PATCH V1 11/17] WhiskeylakeOpenBoardPkg/WhiskeylakeURvp: Update FSP base PCDs
Thread-Topic: [edk2-platforms][PATCH V1 11/17]
 WhiskeylakeOpenBoardPkg/WhiskeylakeURvp: Update FSP base PCDs
Thread-Index: AQHVfZetoD76ptOb8U+KomeYTGut2qdQ8McA
Date: Tue, 8 Oct 2019 16:32:42 +0000
Message-ID: <3C3EFB470A303B4AB093197B6777CCEC504F20C4@PGSMSX112.gar.corp.intel.com>
References: <20191008051645.22052-1-michael.a.kubacki@intel.com>
 <20191008051645.22052-12-michael.a.kubacki@intel.com>
In-Reply-To: <20191008051645.22052-12-michael.a.kubacki@intel.com>
Accept-Language: en-US
X-MS-Has-Attach: 
X-MS-TNEF-Correlator: 
dlp-product: dlpe-windows
dlp-version: 11.2.0.6
dlp-reaction: no-action
x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMDdhNmU0Y2ItOWZlNS00ZjExLWIzNzQtNTA3NzkwYjU1MjZjIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiUUVMbzNlekNsMnFvcVRhSGt1ZVpJYmFxVVNhUTRiVGlQNHdwdU9CbEROeW5mVVBERjRHbDRRaVBJeW9vUjVZQyJ9
x-ctpclassification: CTP_NT
x-originating-ip: [172.30.20.206]
MIME-Version: 1.0
Return-Path: chasel.chiu@intel.com
Content-Language: en-US
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: quoted-printable


Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>

> -----Original Message-----
> From: Kubacki, Michael A <michael.a.kubacki@intel.com>
> Sent: Tuesday, October 8, 2019 1:17 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone@intel.com>
> Subject: [edk2-platforms][PATCH V1 11/17]
> WhiskeylakeOpenBoardPkg/WhiskeylakeURvp: Update FSP base PCDs
>=20
> Sets the FSP-T, FSP-M, and FSP-S base address PCDs based on the flash map=
.
>=20
> Previously these were hardcoded in the DSC file.
>=20
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Signed-off-by: Michael Kubacki <michael.a.kubacki@intel.com>
> ---
>=20
> Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.
> fdf | 3 +++
>  1 file changed, 3 insertions(+)
>=20
> diff --git
> a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardP
> kg.fdf
> b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardP
> kg.fdf
> index 611078e4b4..30ce0b9b79 100644
> ---
> a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardP
> kg.fdf
> +++
> b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardP
> kg.fdf
> @@ -55,6 +55,9 @@ SET
> gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize    =3D
> gSiPkgTokenSpaceG
>  SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset  =3D
> gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
>  SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D
> gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
>  SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize    =3D
> gSiPkgTokenSpaceGuid.PcdBiosSize
> +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress       =3D
> $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
> $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
> +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress       =3D
> $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
> $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
> +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress       =3D
> $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
> $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
>  SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress    =3D
> gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
>  SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize           =3D
> gSiPkgTokenSpaceGuid.PcdBiosSize
>=20
> ################################################################
> ################
> --
> 2.16.2.windows.1