From: "Chiu, Chasel" <chasel.chiu@intel.com>
To: "Desimone, Nathaniel L" <nathaniel.l.desimone@intel.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Kubacki, Michael A" <michael.a.kubacki@intel.com>,
"Gao, Liming" <liming.gao@intel.com>
Subject: Re: [edk2-platforms] [PATCH V1 09/13] MinPlatformPkg: FSP Dispatch Mode Support for PlatformSecLib
Date: Thu, 14 Nov 2019 15:17:34 +0000 [thread overview]
Message-ID: <3C3EFB470A303B4AB093197B6777CCEC505A5E06@PGSMSX111.gar.corp.intel.com> (raw)
In-Reply-To: <20191114060655.5161-10-nathaniel.l.desimone@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
> -----Original Message-----
> From: Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>
> Sent: Thursday, November 14, 2019 2:07 PM
> To: devel@edk2.groups.io
> Cc: Kubacki, Michael A <michael.a.kubacki@intel.com>; Chiu, Chasel
> <chasel.chiu@intel.com>; Gao, Liming <liming.gao@intel.com>
> Subject: [edk2-platforms] [PATCH V1 09/13] MinPlatformPkg: FSP Dispatch
> Mode Support for PlatformSecLib
>
> Cc: Michael Kubacki <michael.a.kubacki@intel.com>
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Cc: Liming Gao <liming.gao@intel.com>
> Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
> ---
> .../FspWrapperPlatformSecLib.c | 34 ++++++++++++---
> .../SecFspWrapperPlatformSecLib.inf | 7 +++-
> .../SecTempRamDone.c | 42
> +++++++++++++++----
> .../Intel/MinPlatformPkg/MinPlatformPkg.dec | 28 ++++++++++++-
> 4 files changed, 95 insertions(+), 16 deletions(-)
>
> diff --git
> a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor
> mSecLib/FspWrapperPlatformSecLib.c
> b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor
> mSecLib/FspWrapperPlatformSecLib.c
> index 303f3aac40..876c073fc4 100644
> ---
> a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor
> mSecLib/FspWrapperPlatformSecLib.c
> +++
> b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlat
> +++ formSecLib/FspWrapperPlatformSecLib.c
> @@ -1,7 +1,7 @@
> /** @file Provide FSP wrapper platform sec related function. -Copyright
> (c) 2017, Intel Corporation. All rights reserved.<BR>+Copyright (c) 2017 - 2019,
> Intel Corporation. All rights reserved.<BR> SPDX-License-Identifier:
> BSD-2-Clause-Patent **/@@ -12,6 +12,7 @@ SPDX-License-Identifier:
> BSD-2-Clause-Patent
> #include <Ppi/SecPerformance.h> #include <Ppi/FirmwareVolumeInfo.h>
> #include <Ppi/TopOfTemporaryRam.h>+#include <Ppi/PeiCoreFvLocation.h>
> #include <Guid/FirmwareFileSystem2.h> #include
> <Library/LocalApicLib.h>@@ -66,6 +67,18 @@ PEI_SEC_PERFORMANCE_PPI
> mSecPerformancePpi = {
> SecGetPerformance }; +EFI_PEI_CORE_FV_LOCATION_PPI
> mPeiCoreFvLocationPpi = {+ (VOID *) (UINTN) FixedPcdGet32
> (PcdFspmBaseAddress)+};++EFI_PEI_PPI_DESCRIPTOR
> mPeiCoreFvLocationPpiList[] = {+ {+ EFI_PEI_PPI_DESCRIPTOR_PPI,+
> &gEfiPeiCoreFvLocationPpiGuid,+ &mPeiCoreFvLocationPpi+ }+};+
> EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformPpi[] =
> { { EFI_PEI_PPI_DESCRIPTOR_PPI,@@ -129,6 +142,8 @@
> SecPlatformMain (
> ) { EFI_PEI_PPI_DESCRIPTOR *PpiList;+ UINT8
> TopOfTemporaryRamPpiIndex;+ UINT8
> *CopyDestinationPointer; DEBUG ((DEBUG_INFO, "FSP Wrapper
> BootFirmwareVolumeBase - 0x%x\n",
> SecCoreData->BootFirmwareVolumeBase)); DEBUG ((DEBUG_INFO, "FSP
> Wrapper BootFirmwareVolumeSize - 0x%x\n",
> SecCoreData->BootFirmwareVolumeSize));@@ -150,13 +165,22 @@
> SecPlatformMain (
> // Use middle of Heap as temp buffer, it will be copied by caller. // Do
> not use Stack, because it will cause wrong calculation on stack by PeiCore
> //- PpiList = (VOID *)((UINTN)SecCoreData->PeiTemporaryRamBase +
> (UINTN)SecCoreData->PeiTemporaryRamSize/2);- CopyMem (PpiList,
> mPeiSecPlatformPpi, sizeof(mPeiSecPlatformPpi));-+ PpiList = (VOID
> *)((UINTN) SecCoreData->PeiTemporaryRamBase + (UINTN)
> SecCoreData->PeiTemporaryRamSize/2);+ CopyDestinationPointer = (UINT8
> *) PpiList;+ TopOfTemporaryRamPpiIndex = 0;+ if ((PcdGet8
> (PcdFspModeSelection) == 0) && PcdGetBool
> (PcdFspDispatchModeUseFspPeiMain)) {+ //+ // In Dispatch mode,
> wrapper should provide PeiCoreFvLocationPpi.+ //+ CopyMem
> (CopyDestinationPointer, mPeiCoreFvLocationPpiList, sizeof
> (mPeiCoreFvLocationPpiList));+ TopOfTemporaryRamPpiIndex = 1;+
> CopyDestinationPointer += sizeof (mPeiCoreFvLocationPpiList);+ }+
> CopyMem (CopyDestinationPointer, mPeiSecPlatformPpi,
> sizeof(mPeiSecPlatformPpi)); // // Patch TopOfTemporaryRamPpi //-
> PpiList[0].Ppi = (VOID *)((UINTN)SecCoreData->TemporaryRamBase +
> SecCoreData->TemporaryRamSize);+
> PpiList[TopOfTemporaryRamPpiIndex].Ppi = (VOID *)((UINTN)
> SecCoreData->TemporaryRamBase + SecCoreData->TemporaryRamSize);
> return PpiList; }diff --git
> a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor
> mSecLib/SecFspWrapperPlatformSecLib.inf
> b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor
> mSecLib/SecFspWrapperPlatformSecLib.inf
> index 3f5a63f273..02c720c73d 100644
> ---
> a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor
> mSecLib/SecFspWrapperPlatformSecLib.inf
> +++
> b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlat
> +++ formSecLib/SecFspWrapperPlatformSecLib.inf
> @@ -72,18 +72,20 @@
> BoardInitLib SecBoardInitLib TestPointCheckLib+
> PeiServicesTablePointerLib [Ppis] gEfiSecPlatformInformationPpiGuid
> ## CONSUMES gPeiSecPerformancePpiGuid ##
> CONSUMES gTopOfTemporaryRamPpiGuid ## PRODUCES
> gEfiPeiFirmwareVolumeInfoPpiGuid ## PRODUCES+
> gFspTempRamExitPpiGuid ## CONSUMES [Pcd]
> gUefiCpuPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize
> ## CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress
> ## CONSUMES gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize
> ## CONSUMES-
> gMinPlatformPkgTokenSpaceGuid.PcdSecSerialPortDebugEnable ##
> CONSUMES+
> gMinPlatformPkgTokenSpaceGuid.PcdSecSerialPortDebugEnable
> ## CONSUMES [FixedPcd]
> gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress
> ## CONSUMES@@ -91,3 +93,6 @@
> gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset
> ## CONSUMES
> gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress
> ## CONSUMES
> gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize
> ## CONSUMES+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress
> ## CONSUMES+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection
> ## CONSUMES+
> gMinPlatformPkgTokenSpaceGuid.PcdFspDispatchModeUseFspPeiMain
> ## CONSUMESdiff --git
> a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor
> mSecLib/SecTempRamDone.c
> b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor
> mSecLib/SecTempRamDone.c
> index cde8a80a4e..922e4ec204 100644
> ---
> a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor
> mSecLib/SecTempRamDone.c
> +++
> b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlat
> +++ formSecLib/SecTempRamDone.c
> @@ -1,7 +1,7 @@
> /** @file Provide SecTemporaryRamDone function. -Copyright (c) 2017,
> Intel Corporation. All rights reserved.<BR>+Copyright (c) 2017 - 2019, Intel
> Corporation. All rights reserved.<BR> SPDX-License-Identifier:
> BSD-2-Clause-Patent **/@@ -9,6 +9,7 @@ SPDX-License-Identifier:
> BSD-2-Clause-Patent
> #include <PiPei.h> #include <Ppi/TemporaryRamDone.h>+#include
> <Ppi/TempRamExitPpi.h> #include <Library/BaseMemoryLib.h> #include
> <Library/DebugLib.h>@@ -17,6 +18,7 @@ SPDX-License-Identifier:
> BSD-2-Clause-Patent #include <Library/FspWrapperPlatformLib.h> #include
> <Library/FspWrapperApiLib.h> #include <Library/BoardInitLib.h>+#include
> <Library/PeiServicesTablePointerLib.h> /** This interface disables
> temporary memory in SEC Phase.@@ -29,17 +31,41 @@
> SecPlatformDisableTemporaryMemory (
> { EFI_STATUS Status; VOID
> *TempRamExitParam;+ CONST EFI_PEI_SERVICES **PeiServices;+
> FSP_TEMP_RAM_EXIT_PPI *TempRamExitPpi;++ DEBUG
> ((DEBUG_INFO, "SecPlatformDisableTemporaryMemory enter\n")); -
> DEBUG((DEBUG_INFO, "SecPlatformDisableTemporaryMemory enter\n"));-
> Status = BoardInitBeforeTempRamExit (); ASSERT_EFI_ERROR (Status); -
> TempRamExitParam = UpdateTempRamExitParam ();- Status =
> CallTempRamExit (TempRamExitParam);- DEBUG((DEBUG_INFO,
> "TempRamExit status: 0x%x\n", Status));- ASSERT_EFI_ERROR(Status);- +
> if (PcdGet8 (PcdFspModeSelection) == 1) {+ //+ // FSP API mode+
> //+ TempRamExitParam = UpdateTempRamExitParam ();+ Status =
> CallTempRamExit (TempRamExitParam);+ DEBUG ((DEBUG_INFO,
> "TempRamExit status: 0x%x\n", Status));+ ASSERT_EFI_ERROR
> (Status);+ } else {+ //+ // FSP Dispatch mode+ //+
> PeiServices = GetPeiServicesTablePointer ();+ Status =
> (*PeiServices)->LocatePpi (+ PeiServices,+
> &gFspTempRamExitPpiGuid,+ 0,+
> NULL,+ (VOID **)
> &TempRamExitPpi+ );+
> ASSERT_EFI_ERROR (Status);+ if (EFI_ERROR (Status)) {+
> return;+ }+ TempRamExitPpi->TempRamExit (NULL);+ }+ Status =
> BoardInitAfterTempRamExit (); ASSERT_EFI_ERROR (Status); diff --git
> a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
> b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
> index a851021c0b..856c17f737 100644
> --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
> +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
> @@ -69,8 +69,6 @@ SetCacheMtrrLib|Include/Library/SetCacheMtrrLib.h
> [PcdsFixedAtBuild, PcdsPatchableInModule]
> -gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode|FALSE|BOOLEA
> N|0x80000008-
> gMinPlatformPkgTokenSpaceGuid.PcdFspMaxUpdSize|0x00000000|UINT32|0
> x80000000
> gMinPlatformPkgTokenSpaceGuid.PcdFspReservedSizeOnStackTop|0x0000004
> 0|UINT32|0x80000001
> gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0x00000000|UINT32
> |0x80000002@@ -272,6 +270,32 @@
> gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0|UINT32|0x900000
> 19
> #
> gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4|UINT8|0xF00000A0 + ##
> FSP Boot Mode Selector+ # FALSE: The board is not a FSP wrapper (FSP
> binary not used)+ # TRUE: The board is a FSP wrapper (FSP binary is
> used)+ #+
> gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode|FALSE|BOOLEA
> N|0x80000008++ ## FSP Dispatch Mode: Use the PEI Main Binary Included
> in FSP-M+ # FALSE: The PEI Main included in FvPreMemory is used to
> dispatch all PEIMs+ # (both inside FSP and outside FSP).+ #
> Pros:+ # * PEI Main is re-built from source and is always the
> latest version+ # * Platform code can link any desired
> LibraryClass to PEI Main+ # (Ex: Custom DebugLib instance,
> SerialPortLib, etc.)+ # Cons:+ # * The PEI Main being
> used to execute FSP PEIMs is not the PEI Main+ # that the
> FSP PEIMs were tested with, adding risk of breakage.+ # * Two
> copies of PEI Main will exist in the final binary,+ # #1 in
> FSP-M, #2 in FvPreMemory. The copy in FSP-M is never+ #
> executed, wasting space.+ #+ # <b>TRUE</b>: The PEI Main included in
> FSP is used to dispatch all PEIMs+ # (both inside FSP and outside
> FSP). PEI Main will not be included in+ # FvPreMemory. This is the
> default and is the recommended choice.+ #+
> gMinPlatformPkgTokenSpaceGuid.PcdFspDispatchModeUseFspPeiMain|TRUE
> |BOOLEAN|0xF00000A8+ [PcdsFeatureFlag]
> gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit
> |FALSE|BOOLEAN|0xF00000A1--
> 2.23.0.windows.1
next prev parent reply other threads:[~2019-11-14 15:17 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-14 6:06 [edk2-platforms] [PATCH V1 00/13] SecFspWrapperPlatformSecLib Cleanup Nate DeSimone
2019-11-14 6:06 ` [edk2-platforms] [PATCH V1 01/13] KabylakeSiliconPkg: Change MODULE_TYPE of SiliconInitLib to PEIM Nate DeSimone
2019-11-14 15:15 ` Chiu, Chasel
2019-11-15 8:59 ` Chaganty, Rangasai V
2019-11-16 2:53 ` Kubacki, Michael A
2019-11-14 6:06 ` [edk2-platforms] [PATCH V1 02/13] KabylakeOpenBoardPkg: Update location of SiliconInitLib Nate DeSimone
2019-11-14 15:15 ` Chiu, Chasel
2019-11-16 2:53 ` Kubacki, Michael A
2019-11-14 6:06 ` [edk2-platforms] [PATCH V1 03/13] KabylakeSiliconPkg: Cleanup old comments Nate DeSimone
2019-11-14 15:16 ` Chiu, Chasel
2019-11-16 2:53 ` Kubacki, Michael A
2019-11-18 9:15 ` Chaganty, Rangasai V
2019-11-14 6:06 ` [edk2-platforms] [PATCH V1 04/13] CoffeeLakeSiliconPkg: Move TcoWdtHob.h Nate DeSimone
2019-11-14 15:16 ` Chiu, Chasel
2019-11-16 2:53 ` Kubacki, Michael A
2019-11-18 9:41 ` Chaganty, Rangasai V
2019-11-14 6:06 ` [edk2-platforms] [PATCH V1 05/13] CoffeelakeSiliconPkg: Add SiliconInitLib Nate DeSimone
2019-11-14 15:16 ` Chiu, Chasel
2019-11-16 2:53 ` Kubacki, Michael A
2019-11-18 19:14 ` Chaganty, Rangasai V
2019-11-14 6:06 ` [edk2-platforms] [PATCH V1 06/13] WhiskeylakeOpenBoardPkg: Add SiliconInitLib APIs to BoardInitLib Nate DeSimone
2019-11-14 15:16 ` Chiu, Chasel
2019-11-16 2:53 ` Kubacki, Michael A
2019-11-14 6:06 ` [edk2-platforms] [PATCH V1 07/13] WhiskeylakeOpenBoardPkg: Whitespace cleanup in BoardInitLib Nate DeSimone
2019-11-14 15:17 ` Chiu, Chasel
2019-11-16 2:53 ` Kubacki, Michael A
2019-11-14 6:06 ` [edk2-platforms] [PATCH V1 08/13] WhiskeylakeOpenBoardPkg: Remove SecFspWrapperPlatformSecLib override Nate DeSimone
2019-11-14 15:17 ` Chiu, Chasel
2019-11-16 2:53 ` Kubacki, Michael A
2019-11-14 6:06 ` [edk2-platforms] [PATCH V1 09/13] MinPlatformPkg: FSP Dispatch Mode Support for PlatformSecLib Nate DeSimone
2019-11-14 15:17 ` Chiu, Chasel [this message]
2019-11-16 2:54 ` Kubacki, Michael A
2019-11-14 6:06 ` [edk2-platforms] [PATCH V1 10/13] MinPlatformPkg: Coding style cleanups in MinPlatformPkg.dec Nate DeSimone
2019-11-14 15:17 ` Chiu, Chasel
2019-11-16 2:54 ` Kubacki, Michael A
2019-11-14 6:06 ` [edk2-platforms] [PATCH V1 11/13] KabylakeOpenBoardPkg: Add support for PcdFspDispatchModeUseFspPeiMain Nate DeSimone
2019-11-14 15:18 ` Chiu, Chasel
2019-11-16 2:54 ` Kubacki, Michael A
2019-11-14 6:06 ` [edk2-platforms] [PATCH V1 12/13] KabylakeOpenBoardPkg: Remove SecFspWrapperPlatformSecLib override Nate DeSimone
2019-11-14 15:18 ` Chiu, Chasel
2019-11-16 2:54 ` Kubacki, Michael A
2019-11-14 6:06 ` [edk2-platforms] [PATCH V1 13/13] MinPlatformPkg: Remove BoardInitLib dependency from PlatformSecLib Nate DeSimone
2019-11-14 15:18 ` Chiu, Chasel
2019-11-16 2:56 ` Kubacki, Michael A
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=3C3EFB470A303B4AB093197B6777CCEC505A5E06@PGSMSX111.gar.corp.intel.com \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox