From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga18.intel.com (mga18.intel.com []) by mx.groups.io with SMTP id smtpd.web09.5512.1573744660875911946 for ; Thu, 14 Nov 2019 07:17:41 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=fail (domain: intel.com, ip: , mailfrom: chasel.chiu@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Nov 2019 07:17:38 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,304,1569308400"; d="scan'208";a="207819840" Received: from pgsmsx101.gar.corp.intel.com ([10.221.44.78]) by orsmga003.jf.intel.com with ESMTP; 14 Nov 2019 07:17:36 -0800 Received: from pgsmsx111.gar.corp.intel.com ([169.254.2.24]) by PGSMSX101.gar.corp.intel.com ([10.221.44.78]) with mapi id 14.03.0439.000; Thu, 14 Nov 2019 23:17:35 +0800 From: "Chiu, Chasel" To: "Desimone, Nathaniel L" , "devel@edk2.groups.io" CC: "Kubacki, Michael A" , "Gao, Liming" Subject: Re: [edk2-platforms] [PATCH V1 09/13] MinPlatformPkg: FSP Dispatch Mode Support for PlatformSecLib Thread-Topic: [edk2-platforms] [PATCH V1 09/13] MinPlatformPkg: FSP Dispatch Mode Support for PlatformSecLib Thread-Index: AQHVmrPucXoKyJan+kiZFm0W+8JpP6eKx9cw Date: Thu, 14 Nov 2019 15:17:34 +0000 Message-ID: <3C3EFB470A303B4AB093197B6777CCEC505A5E06@PGSMSX111.gar.corp.intel.com> References: <20191114060655.5161-1-nathaniel.l.desimone@intel.com> <20191114060655.5161-10-nathaniel.l.desimone@intel.com> In-Reply-To: <20191114060655.5161-10-nathaniel.l.desimone@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiOTBiYjFmZjAtOTQ5ZS00N2EzLWI5NGItN2Y0ZGVlNDJkNjI3IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiM0tidXRIaTE2SmFlMjNCNGtsaEdHYW42RWZ4UVVSQm5LVlRGenYrY0NlSFFBWlNySUFob29tM0s1d0gxaVJkcCJ9 x-ctpclassification: CTP_NT x-originating-ip: [172.30.20.205] MIME-Version: 1.0 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Chasel Chiu > -----Original Message----- > From: Desimone, Nathaniel L > Sent: Thursday, November 14, 2019 2:07 PM > To: devel@edk2.groups.io > Cc: Kubacki, Michael A ; Chiu, Chasel > ; Gao, Liming > Subject: [edk2-platforms] [PATCH V1 09/13] MinPlatformPkg: FSP Dispatch > Mode Support for PlatformSecLib >=20 > Cc: Michael Kubacki > Cc: Chasel Chiu > Cc: Liming Gao > Signed-off-by: Nate DeSimone > --- > .../FspWrapperPlatformSecLib.c | 34 ++++++++++++--- > .../SecFspWrapperPlatformSecLib.inf | 7 +++- > .../SecTempRamDone.c | 42 > +++++++++++++++---- > .../Intel/MinPlatformPkg/MinPlatformPkg.dec | 28 ++++++++++++- > 4 files changed, 95 insertions(+), 16 deletions(-) >=20 > diff --git > a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor > mSecLib/FspWrapperPlatformSecLib.c > b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor > mSecLib/FspWrapperPlatformSecLib.c > index 303f3aac40..876c073fc4 100644 > --- > a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor > mSecLib/FspWrapperPlatformSecLib.c > +++ > b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlat > +++ formSecLib/FspWrapperPlatformSecLib.c > @@ -1,7 +1,7 @@ > /** @file Provide FSP wrapper platform sec related function. -Copyrigh= t > (c) 2017, Intel Corporation. All rights reserved.
+Copyright (c) 2017 = - 2019, > Intel Corporation. All rights reserved.
SPDX-License-Identifier: > BSD-2-Clause-Patent **/@@ -12,6 +12,7 @@ SPDX-License-Identifier: > BSD-2-Clause-Patent > #include #include > #include +#include > #include #include > @@ -66,6 +67,18 @@ PEI_SEC_PERFORMANCE_PPI > mSecPerformancePpi =3D { > SecGetPerformance }; +EFI_PEI_CORE_FV_LOCATION_PPI > mPeiCoreFvLocationPpi =3D {+ (VOID *) (UINTN) FixedPcdGet32 > (PcdFspmBaseAddress)+};++EFI_PEI_PPI_DESCRIPTOR > mPeiCoreFvLocationPpiList[] =3D {+ {+ EFI_PEI_PPI_DESCRIPTOR_PPI,+ > &gEfiPeiCoreFvLocationPpiGuid,+ &mPeiCoreFvLocationPpi+ }+};+ > EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformPpi[] =3D > { { EFI_PEI_PPI_DESCRIPTOR_PPI,@@ -129,6 +142,8 @@ > SecPlatformMain ( > ) { EFI_PEI_PPI_DESCRIPTOR *PpiList;+ UINT8 > TopOfTemporaryRamPpiIndex;+ UINT8 > *CopyDestinationPointer; DEBUG ((DEBUG_INFO, "FSP Wrapper > BootFirmwareVolumeBase - 0x%x\n", > SecCoreData->BootFirmwareVolumeBase)); DEBUG ((DEBUG_INFO, "FSP > Wrapper BootFirmwareVolumeSize - 0x%x\n", > SecCoreData->BootFirmwareVolumeSize));@@ -150,13 +165,22 @@ > SecPlatformMain ( > // Use middle of Heap as temp buffer, it will be copied by caller. /= / Do > not use Stack, because it will cause wrong calculation on stack by PeiCor= e > //- PpiList =3D (VOID *)((UINTN)SecCoreData->PeiTemporaryRamBase + > (UINTN)SecCoreData->PeiTemporaryRamSize/2);- CopyMem (PpiList, > mPeiSecPlatformPpi, sizeof(mPeiSecPlatformPpi));-+ PpiList =3D (VOID > *)((UINTN) SecCoreData->PeiTemporaryRamBase + (UINTN) > SecCoreData->PeiTemporaryRamSize/2);+ CopyDestinationPointer =3D (UINT8 > *) PpiList;+ TopOfTemporaryRamPpiIndex =3D 0;+ if ((PcdGet8 > (PcdFspModeSelection) =3D=3D 0) && PcdGetBool > (PcdFspDispatchModeUseFspPeiMain)) {+ //+ // In Dispatch mode, > wrapper should provide PeiCoreFvLocationPpi.+ //+ CopyMem > (CopyDestinationPointer, mPeiCoreFvLocationPpiList, sizeof > (mPeiCoreFvLocationPpiList));+ TopOfTemporaryRamPpiIndex =3D 1;+ > CopyDestinationPointer +=3D sizeof (mPeiCoreFvLocationPpiList);+ }+ > CopyMem (CopyDestinationPointer, mPeiSecPlatformPpi, > sizeof(mPeiSecPlatformPpi)); // // Patch TopOfTemporaryRamPpi //- > PpiList[0].Ppi =3D (VOID *)((UINTN)SecCoreData->TemporaryRamBase + > SecCoreData->TemporaryRamSize);+ > PpiList[TopOfTemporaryRamPpiIndex].Ppi =3D (VOID *)((UINTN) > SecCoreData->TemporaryRamBase + SecCoreData->TemporaryRamSize); > return PpiList; }diff --git > a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor > mSecLib/SecFspWrapperPlatformSecLib.inf > b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor > mSecLib/SecFspWrapperPlatformSecLib.inf > index 3f5a63f273..02c720c73d 100644 > --- > a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor > mSecLib/SecFspWrapperPlatformSecLib.inf > +++ > b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlat > +++ formSecLib/SecFspWrapperPlatformSecLib.inf > @@ -72,18 +72,20 @@ > BoardInitLib SecBoardInitLib TestPointCheckLib+ > PeiServicesTablePointerLib [Ppis] gEfiSecPlatformInformationPpiGuid > ## CONSUMES gPeiSecPerformancePpiGuid ## > CONSUMES gTopOfTemporaryRamPpiGuid ## PRODUCES > gEfiPeiFirmwareVolumeInfoPpiGuid ## PRODUCES+ > gFspTempRamExitPpiGuid ## CONSUMES [Pcd] > gUefiCpuPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize > ## CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress > ## CONSUMES gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize > ## CONSUMES- > gMinPlatformPkgTokenSpaceGuid.PcdSecSerialPortDebugEnable ## > CONSUMES+ > gMinPlatformPkgTokenSpaceGuid.PcdSecSerialPortDebugEnable > ## CONSUMES [FixedPcd] > gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress > ## CONSUMES@@ -91,3 +93,6 @@ > gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset > ## CONSUMES > gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress > ## CONSUMES > gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize > ## CONSUMES+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress > ## CONSUMES+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection > ## CONSUMES+ > gMinPlatformPkgTokenSpaceGuid.PcdFspDispatchModeUseFspPeiMain > ## CONSUMESdiff --git > a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor > mSecLib/SecTempRamDone.c > b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor > mSecLib/SecTempRamDone.c > index cde8a80a4e..922e4ec204 100644 > --- > a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor > mSecLib/SecTempRamDone.c > +++ > b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlat > +++ formSecLib/SecTempRamDone.c > @@ -1,7 +1,7 @@ > /** @file Provide SecTemporaryRamDone function. -Copyright (c) 2017, > Intel Corporation. All rights reserved.
+Copyright (c) 2017 - 2019, In= tel > Corporation. All rights reserved.
SPDX-License-Identifier: > BSD-2-Clause-Patent **/@@ -9,6 +9,7 @@ SPDX-License-Identifier: > BSD-2-Clause-Patent > #include #include +#include > #include #include > @@ -17,6 +18,7 @@ SPDX-License-Identifier: > BSD-2-Clause-Patent #include #include > #include +#include > /** This interface disables > temporary memory in SEC Phase.@@ -29,17 +31,41 @@ > SecPlatformDisableTemporaryMemory ( > { EFI_STATUS Status; VOID > *TempRamExitParam;+ CONST EFI_PEI_SERVICES **PeiServices;+ > FSP_TEMP_RAM_EXIT_PPI *TempRamExitPpi;++ DEBUG > ((DEBUG_INFO, "SecPlatformDisableTemporaryMemory enter\n")); - > DEBUG((DEBUG_INFO, "SecPlatformDisableTemporaryMemory enter\n"));- > Status =3D BoardInitBeforeTempRamExit (); ASSERT_EFI_ERROR (Status); - > TempRamExitParam =3D UpdateTempRamExitParam ();- Status =3D > CallTempRamExit (TempRamExitParam);- DEBUG((DEBUG_INFO, > "TempRamExit status: 0x%x\n", Status));- ASSERT_EFI_ERROR(Status);- + > if (PcdGet8 (PcdFspModeSelection) =3D=3D 1) {+ //+ // FSP API mode+ > //+ TempRamExitParam =3D UpdateTempRamExitParam ();+ Status =3D > CallTempRamExit (TempRamExitParam);+ DEBUG ((DEBUG_INFO, > "TempRamExit status: 0x%x\n", Status));+ ASSERT_EFI_ERROR > (Status);+ } else {+ //+ // FSP Dispatch mode+ //+ > PeiServices =3D GetPeiServicesTablePointer ();+ Status =3D > (*PeiServices)->LocatePpi (+ PeiServices,+ > &gFspTempRamExitPpiGuid,+ 0,+ > NULL,+ (VOID **) > &TempRamExitPpi+ );+ > ASSERT_EFI_ERROR (Status);+ if (EFI_ERROR (Status)) {+ > return;+ }+ TempRamExitPpi->TempRamExit (NULL);+ }+ Status =3D > BoardInitAfterTempRamExit (); ASSERT_EFI_ERROR (Status); diff --git > a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec > b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec > index a851021c0b..856c17f737 100644 > --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec > +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec > @@ -69,8 +69,6 @@ SetCacheMtrrLib|Include/Library/SetCacheMtrrLib.h > [PcdsFixedAtBuild, PcdsPatchableInModule] > -gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode|FALSE|BOOLEA > N|0x80000008- > gMinPlatformPkgTokenSpaceGuid.PcdFspMaxUpdSize|0x00000000|UINT32|0 > x80000000 > gMinPlatformPkgTokenSpaceGuid.PcdFspReservedSizeOnStackTop|0x0000004 > 0|UINT32|0x80000001 > gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0x00000000|UINT32 > |0x80000002@@ -272,6 +270,32 @@ > gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0|UINT32|0x900000 > 19 > # > gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4|UINT8|0xF00000A0 + ## > FSP Boot Mode Selector+ # FALSE: The board is not a FSP wrapper (FSP > binary not used)+ # TRUE: The board is a FSP wrapper (FSP binary is > used)+ #+ > gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode|FALSE|BOOLEA > N|0x80000008++ ## FSP Dispatch Mode: Use the PEI Main Binary Included > in FSP-M+ # FALSE: The PEI Main included in FvPreMemory is used to > dispatch all PEIMs+ # (both inside FSP and outside FSP).+ # > Pros:+ # * PEI Main is re-built from source and is always the > latest version+ # * Platform code can link any desired > LibraryClass to PEI Main+ # (Ex: Custom DebugLib instance, > SerialPortLib, etc.)+ # Cons:+ # * The PEI Main being > used to execute FSP PEIMs is not the PEI Main+ # that the > FSP PEIMs were tested with, adding risk of breakage.+ # * Two > copies of PEI Main will exist in the final binary,+ # #1 in > FSP-M, #2 in FvPreMemory. The copy in FSP-M is never+ # > executed, wasting space.+ #+ # TRUE: The PEI Main included in > FSP is used to dispatch all PEIMs+ # (both inside FSP and outside > FSP). PEI Main will not be included in+ # FvPreMemory. This is th= e > default and is the recommended choice.+ #+ > gMinPlatformPkgTokenSpaceGuid.PcdFspDispatchModeUseFspPeiMain|TRUE > |BOOLEAN|0xF00000A8+ [PcdsFeatureFlag] > gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit > |FALSE|BOOLEAN|0xF00000A1-- > 2.23.0.windows.1