From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mx.groups.io with SMTP id smtpd.web12.2638.1574399799489170304 for ; Thu, 21 Nov 2019 21:16:39 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.126, mailfrom: chasel.chiu@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Nov 2019 21:16:38 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,228,1571727600"; d="scan'208";a="381975564" Received: from pgsmsx112.gar.corp.intel.com ([10.108.55.201]) by orsmga005.jf.intel.com with ESMTP; 21 Nov 2019 21:16:38 -0800 Received: from pgsmsx111.gar.corp.intel.com ([169.254.2.24]) by PGSMSX112.gar.corp.intel.com ([10.108.55.201]) with mapi id 14.03.0439.000; Fri, 22 Nov 2019 13:16:36 +0800 From: "Chiu, Chasel" To: "Desimone, Nathaniel L" , "devel@edk2.groups.io" CC: "Kubacki, Michael A" Subject: Re: [edk2-platforms] [PATCH V2 07/14] WhiskeylakeOpenBoardPkg: Add SiliconInitLib APIs to BoardInitLib Thread-Topic: [edk2-platforms] [PATCH V2 07/14] WhiskeylakeOpenBoardPkg: Add SiliconInitLib APIs to BoardInitLib Thread-Index: AQHVoEn+u67FLr0beUSmBTQ4+HfntKeWp2kA Date: Fri, 22 Nov 2019 05:16:35 +0000 Message-ID: <3C3EFB470A303B4AB093197B6777CCEC505AB8AE@PGSMSX111.gar.corp.intel.com> References: <20191121085853.2626-1-nathaniel.l.desimone@intel.com> <20191121085853.2626-8-nathaniel.l.desimone@intel.com> In-Reply-To: <20191121085853.2626-8-nathaniel.l.desimone@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNjRiM2Q1NWQtMWVhMy00ZDIxLTkwODgtNjJhODMzNzZjOGY1IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiNXFpRnAxeHlZdjNhSnh1ZjZEc01lMElDYmFKOHdQYjRvRVVxWmJqbkt0UUd1YW1zYTN3aVBkY25SWlJGSzVzRyJ9 x-ctpclassification: CTP_NT x-originating-ip: [172.30.20.205] MIME-Version: 1.0 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Chasel Chiu > -----Original Message----- > From: Desimone, Nathaniel L > Sent: Thursday, November 21, 2019 4:59 PM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Kubacki, Michael A > > Subject: [edk2-platforms] [PATCH V2 07/14] WhiskeylakeOpenBoardPkg: Add > SiliconInitLib APIs to BoardInitLib >=20 > Cc: Chasel Chiu > Cc: Michael Kubacki > Signed-off-by: Nate DeSimone > --- > .../BoardInitLib/PeiBoardInitPostMemLib.inf | 1 + > .../BoardInitLib/PeiBoardInitPreMemLib.inf | 1 + > .../PeiMultiBoardInitPostMemLib.inf | 1 + > .../PeiMultiBoardInitPreMemLib.inf | 2 +- > .../PeiWhiskeylakeURvpInitPostMemLib.c | 6 +- > .../PeiWhiskeylakeURvpInitPreMemLib.c | 89 ++----------------- > .../BoardInitLib/WhiskeylakeURvpInit.h | 1 + > .../WhiskeylakeURvp/OpenBoardPkg.dsc | 5 ++ > 8 files changed, 24 insertions(+), 82 deletions(-) >=20 > diff --git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiBoardInitPostMemLib.inf > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiBoardInitPostMemLib.inf > index 9bf4d127c5..affc5c56ad 100644 > --- > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiBoardInitPostMemLib.inf > +++ > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiBoardInitPostMemLib.inf > @@ -26,6 +26,7 @@ > HdaVerbTableLib >=20 > MemoryAllocationLib >=20 > PcdLib >=20 > + SiliconInitLib >=20 >=20 >=20 > [Packages] >=20 > MinPlatformPkg/MinPlatformPkg.dec >=20 > diff --git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiBoardInitPreMemLib.inf > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiBoardInitPreMemLib.inf > index 4ab80f9eb3..40e20285e0 100644 > --- > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiBoardInitPreMemLib.inf > +++ > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiBoardInitPreMemLib.inf > @@ -23,6 +23,7 @@ > BaseMemoryLib >=20 > MemoryAllocationLib >=20 > PcdLib >=20 > + SiliconInitLib >=20 >=20 >=20 > [Packages] >=20 > MinPlatformPkg/MinPlatformPkg.dec >=20 > diff --git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiMultiBoardInitPostMemLib.inf > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiMultiBoardInitPostMemLib.inf > index c043e32638..21dc2f70c0 100644 > --- > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiMultiBoardInitPostMemLib.inf > +++ > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiMultiBoardInitPostMemLib.inf > @@ -30,6 +30,7 @@ > PeiPlatformHookLib >=20 > PeiPolicyInitLib >=20 > PchInfoLib >=20 > + SiliconInitLib >=20 >=20 >=20 > [Packages] >=20 > MinPlatformPkg/MinPlatformPkg.dec >=20 > diff --git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiMultiBoardInitPreMemLib.inf > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiMultiBoardInitPreMemLib.inf > index cd0315377a..7389f1dfcd 100644 > --- > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiMultiBoardInitPreMemLib.inf > +++ > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiMultiBoardInitPreMemLib.inf > @@ -31,6 +31,7 @@ > PeiPlatformHookLib >=20 > PeiPolicyInitLib >=20 > PlatformHookLib >=20 > + SiliconInitLib >=20 > StallPpiLib >=20 >=20 >=20 > [Packages] >=20 > @@ -57,7 +58,6 @@ >=20 >=20 > [Guids] >=20 > gPchGeneralPreMemConfigGuid ## CONSUMES >=20 > - gTcoWdtHobGuid ## CONSUMES >=20 >=20 >=20 > [Pcd] >=20 > gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdLpcSioConfigDefaultPort >=20 > diff --git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiWhiskeylakeURvpInitPostMemLib.c > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiWhiskeylakeURvpInitPostMemLib.c > index 9413620a4a..248a6657d5 100644 > --- > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiWhiskeylakeURvpInitPostMemLib.c > +++ > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiWhiskeylakeURvpInitPostMemLib.c > @@ -430,6 +430,10 @@ WhiskeylakeURvpBoardInitBeforeSiliconInit ( > // >=20 > Status =3D UpdateChipsetInitPtr(); >=20 >=20 >=20 > + /// >=20 > + /// Do Late PCH init >=20 > + /// >=20 > + LateSiliconInit (); >=20 > + >=20 > return EFI_SUCCESS; >=20 > } >=20 > - >=20 > diff --git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiWhiskeylakeURvpInitPreMemLib.c > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiWhiskeylakeURvpInitPreMemLib.c > index 0124888244..055d731651 100644 > --- > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiWhiskeylakeURvpInitPreMemLib.c > +++ > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/PeiWhiskeylakeURvpInitPreMemLib.c > @@ -45,7 +45,6 @@ > #include >=20 > #include >=20 > #include >=20 > -#include >=20 > #include >=20 >=20 >=20 > /// >=20 > @@ -232,50 +231,8 @@ BoardMiscInitPreMem( > return EFI_SUCCESS; >=20 > } >=20 >=20 >=20 > -//@todo it should be moved to Si Pkg. >=20 > -/** >=20 > -Early Platform PCH initialization >=20 > -**/ >=20 > -VOID >=20 > -EarlyPlatformPchInit( >=20 > - VOID >=20 > -) >=20 > -{ >=20 > - UINT8 Data8; >=20 > - UINT8 TcoRebootHappened; >=20 > - TCO_WDT_HOB *TcoWdtHobPtr; >=20 > - EFI_STATUS Status; >=20 > - >=20 > - /// >=20 > - /// Read the Second TO status bit >=20 > - /// >=20 > - Data8 =3D IoRead8(PcdGet16(PcdTcoBaseAddress) + R_TCO_IO_TCO2_STS); >=20 > - if ((Data8 & B_TCO_IO_TCO2_STS_SECOND_TO) =3D=3D > B_TCO_IO_TCO2_STS_SECOND_TO) { >=20 > - TcoRebootHappened =3D 1; >=20 > - DEBUG((DEBUG_INFO, "PlatformInitPreMem - TCO Second TO status bit > is set. This might be a TCO reboot\n")); >=20 > - } >=20 > - else { >=20 > - TcoRebootHappened =3D 0; >=20 > - } >=20 > - >=20 > - /// >=20 > - /// Create HOB >=20 > - /// >=20 > - Status =3D PeiServicesCreateHob(EFI_HOB_TYPE_GUID_EXTENSION, > sizeof(TCO_WDT_HOB), (VOID **)&TcoWdtHobPtr); >=20 > - if (!EFI_ERROR(Status)) { >=20 > - TcoWdtHobPtr->Header.Name =3D gTcoWdtHobGuid; >=20 > - TcoWdtHobPtr->TcoRebootHappened =3D TcoRebootHappened; >=20 > - } >=20 > - >=20 > - /// >=20 > - /// Clear the Second TO status bit >=20 > - /// >=20 > - IoWrite8(PcdGet16(PcdTcoBaseAddress) + R_TCO_IO_TCO2_STS, > B_TCO_IO_TCO2_STS_SECOND_TO); >=20 > -} >=20 > - >=20 > /** >=20 > Board configuration initialization in the pre-memory boot phase. >=20 > - >=20 > **/ >=20 > VOID >=20 > BoardConfigInitPreMem ( >=20 > @@ -341,7 +298,6 @@ PlatformInitPreMemCallBack( > ) >=20 > { >=20 > EFI_STATUS Status; >=20 > - UINT16 ABase; >=20 > UINT8 FwConfig; >=20 >=20 >=20 > // >=20 > @@ -378,16 +334,8 @@ PlatformInitPreMemCallBack( > /// >=20 > /// Configure GPIO and SIO >=20 > /// >=20 > - Status =3D BoardInitPreMem(); >=20 > - ASSERT_EFI_ERROR(Status); >=20 > - >=20 > - ABase =3D PmcGetAcpiBase(); >=20 > - >=20 > - /// >=20 > - /// Clear all pending SMI. On S3 clear power button enable so it will = not > generate an SMI. >=20 > - /// >=20 > - IoWrite16(ABase + R_ACPI_IO_PM1_EN, 0); >=20 > - IoWrite32(ABase + R_ACPI_IO_GPE0_EN_127_96, 0); >=20 > + Status =3D BoardInitPreMem (); >=20 > + ASSERT_EFI_ERROR (Status); >=20 >=20 >=20 > /// >=20 > /// Install Pre Memory PPIs >=20 > @@ -550,12 +498,6 @@ WhiskeylakeURvpInitPreMem ( > Status =3D InstallStallPpi(); >=20 > ASSERT_EFI_ERROR(Status); >=20 >=20 >=20 > - ///@todo it should be moved to Si Pkg. >=20 > - /// >=20 > - /// Do Early PCH init >=20 > - /// >=20 > - EarlyPlatformPchInit(); >=20 > - >=20 > // >=20 > // Install PCH RESET PPI and EFI RESET2 PeiService >=20 > // >=20 > @@ -588,6 +530,11 @@ WhiskeylakeURvpBoardInitBeforeMemoryInit ( > VOID >=20 > ) >=20 > { >=20 > + /// >=20 > + /// Do basic PCH init >=20 > + /// >=20 > + SiliconInit (); >=20 > + >=20 > WhiskeylakeURvpInitPreMem (); >=20 >=20 >=20 > return EFI_SUCCESS; >=20 > @@ -600,27 +547,9 @@ WhiskeylakeURvpBoardDebugInit ( > ) >=20 > { >=20 > /// >=20 > - /// LPC I/O Configuration >=20 > + /// Do Early PCH init >=20 > /// >=20 > - PchLpcIoDecodeRangesSet ( >=20 > - (V_LPC_CFG_IOD_LPT_378 << N_LPC_CFG_IOD_LPT) | >=20 > - (V_LPC_CFG_IOD_COMB_3E8 << N_LPC_CFG_IOD_COMB) | >=20 > - (V_LPC_CFG_IOD_COMA_3F8 << N_LPC_CFG_IOD_COMA) >=20 > - ); >=20 > - >=20 > - PchLpcIoEnableDecodingSet ( >=20 > - B_LPC_CFG_IOE_ME2 | >=20 > - B_LPC_CFG_IOE_SE | >=20 > - B_LPC_CFG_IOE_ME1 | >=20 > - B_LPC_CFG_IOE_KE | >=20 > - B_LPC_CFG_IOE_HGE | >=20 > - B_LPC_CFG_IOE_LGE | >=20 > - B_LPC_CFG_IOE_FDE | >=20 > - B_LPC_CFG_IOE_PPE | >=20 > - B_LPC_CFG_IOE_CBE | >=20 > - B_LPC_CFG_IOE_CAE >=20 > - ); >=20 > - >=20 > + EarlySiliconInit (); >=20 > return EFI_SUCCESS; >=20 > } >=20 >=20 >=20 > diff --git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/WhiskeylakeURvpInit.h > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/WhiskeylakeURvpInit.h > index 325bcb41df..d3a709b2a9 100644 > --- > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/WhiskeylakeURvpInit.h > +++ > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/Boar > dInitLib/WhiskeylakeURvpInit.h > @@ -15,6 +15,7 @@ > #include >=20 > #include >=20 > #include >=20 > +#include >=20 > #include >=20 > #include >=20 >=20 >=20 > diff --git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardP > kg.dsc > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardP > kg.dsc > index cdaf47b6f7..3cd0478021 100644 > --- > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardP > kg.dsc > +++ > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardP > kg.dsc > @@ -154,6 +154,11 @@ >=20 > TimerLib|$(PLATFORM_BOARD_PACKAGE)/Library/AcpiTimerLib/BaseAcpiTim > erLib.inf >=20 >=20 >=20 > [LibraryClasses.common.PEIM] >=20 > + ####################################### >=20 > + # Silicon Initialization Package >=20 > + ####################################### >=20 > + > SiliconInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconInitLib/PeiSilico= nIn > itLib.inf >=20 > + >=20 > ####################################### >=20 > # Platform Package >=20 > ####################################### >=20 > -- > 2.24.0.windows.2