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From: "Chiu, Chasel" <chasel.chiu@intel.com>
To: "Kubacki, Michael A" <michael.a.kubacki@intel.com>,
	"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Desimone, Nathaniel L" <nathaniel.l.desimone@intel.com>
Subject: Re: [edk2-platforms][PATCH V3 1/1] WhiskeylakeOpenBoardPkg: Update PCDs to enable stack sharing
Date: Wed, 18 Dec 2019 01:59:46 +0000	[thread overview]
Message-ID: <3C3EFB470A303B4AB093197B6777CCEC505D3262@PGSMSX111.gar.corp.intel.com> (raw)
In-Reply-To: <20191217225134.40000-1-michael.a.kubacki@intel.com>

Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>

> -----Original Message-----
> From: Kubacki, Michael A <michael.a.kubacki@intel.com>
> Sent: Wednesday, December 18, 2019 6:52 AM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone@intel.com>
> Subject: [edk2-platforms][PATCH V3 1/1] WhiskeylakeOpenBoardPkg: Update
> PCDs to enable stack sharing
> 
> From: "Agyeman, Prince" <prince.agyeman@intel.com>
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2409
> 
> Updated WhiskeylakeURvp PCDs to enable FSP/BL stack sharing.
> 
> This fixes the boot failure seen with the latest Coffee Lake (CFL) FSP binary (v
> 7.0.68.41).
> 
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Michael Kubacki <michael.a.kubacki@intel.com>
> Co-authored-by: Michael Kubacki <michael.a.kubacki@intel.com>
> Signed-off-by: Prince Agyeman <prince.agyeman@intel.com>
> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
> ---
> 
> Notes:
>     1. Michael Kubacki is taking over patch ownership since Prince
>        is out of office.
> 
>     V3 Change:
>       - Changed the value of PcdPeiTemporaryRamStackSize to 0x30000
>         to exceed the minimum stack size specified in the Coffee Lake
>         FSP Integration Guide (160KB / 0x28000) with some padding.
> 
>     V2 Change:
>       - The value of PcdPeiTemporaryRamStackSize was changed from
> 0x40000
>         to 0x28000 to exactly meet the minimum stack size specified in
>         the Coffee Lake FSP Integration Guide. Note that the memory
>         initialization code in the FSP previously exceeded the available
>         stack size.
> 
> 
> Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg
> Pcd.dsc | 11 +++++------
>  1 file changed, 5 insertions(+), 6 deletions(-)
> 
> diff --git
> a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardP
> kgPcd.dsc
> b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardP
> kgPcd.dsc
> index 906f7b7ade..1ae51d9d5e 100644
> ---
> a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardP
> kgPcd.dsc
> +++
> b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardP
> k
> +++ gPcd.dsc
> @@ -54,15 +54,14 @@
>    gSiPkgTokenSpaceGuid.PcdTsegSize|0x1000000
> 
>    #
> -  # FSP API mode does not share stack with the boot loader,
> -  # so FSP needs more temporary memory for FSP heap + stack size.
> +  # When sharing stack with boot loader, FSP only needs small temp ram
> + for heap
>    #
> -  gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize|0x26000
> +  gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize|0x10000
> +
>    #
> -  # FSP API mode does not need to enlarge the boot loader stack size
> -  # since the stacks are separate.
> +  # Boot loader stack size has to be big enough to executing FSP
>    #
> -  gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x20000
> +  gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x30000
> 
>    gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000
> 
> gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000
> --
> 2.16.2.windows.1


      parent reply	other threads:[~2019-12-18  1:59 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-17 22:51 [edk2-platforms][PATCH V3 1/1] WhiskeylakeOpenBoardPkg: Update PCDs to enable stack sharing Kubacki, Michael A
2019-12-17 23:10 ` Nate DeSimone
2019-12-18  1:59 ` Chiu, Chasel [this message]

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