From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.151; helo=mga17.intel.com; envelope-from=zhichao.gao@intel.com; receiver=edk2-devel@lists.01.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 3E6FB21C91274 for ; Mon, 25 Mar 2019 00:09:09 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Mar 2019 00:09:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,256,1549958400"; d="scan'208";a="330395789" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by fmsmga006.fm.intel.com with ESMTP; 25 Mar 2019 00:09:09 -0700 Received: from fmsmsx102.amr.corp.intel.com (10.18.124.200) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 25 Mar 2019 00:09:09 -0700 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by FMSMSX102.amr.corp.intel.com (10.18.124.200) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 25 Mar 2019 00:09:08 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.158]) by shsmsx102.ccr.corp.intel.com ([169.254.2.163]) with mapi id 14.03.0415.000; Mon, 25 Mar 2019 15:09:06 +0800 From: "Gao, Zhichao" To: "Gao, Liming" , "edk2-devel@lists.01.org" CC: "Wang, Jian J" , "Wu, Hao A" , "Ni, Ray" , "Zeng, Star" , "Ard Biesheuvel" Thread-Topic: [PATCH V2 1/2] MdeModulePkg/CapsuleRuntimeDxe: IA32 add cache flush function Thread-Index: AQHU4thHSbscmyVYUEucnucjxmv+mqYb6/Sw Date: Mon, 25 Mar 2019 07:09:05 +0000 Message-ID: <3CE959C139B4C44DBEA1810E3AA6F9000B7B186C@SHSMSX101.ccr.corp.intel.com> References: <20190322030718.17676-1-zhichao.gao@intel.com> <20190322030718.17676-2-zhichao.gao@intel.com> <4A89E2EF3DFEDB4C8BFDE51014F606A14E40AF95@SHSMSX104.ccr.corp.intel.com> In-Reply-To: <4A89E2EF3DFEDB4C8BFDE51014F606A14E40AF95@SHSMSX104.ccr.corp.intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZDg4Y2MwNWItZmQ1Zi00MjQ5LWIwZmYtMTk0YzRjZGY3Zjk4IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiZHN1SlUyMWYzQXJjSzhlNW5OYnFLVVBCU3VoblU4c1AyTkRQSW04UElnMVwvQVpOR0NOdWxwXC92UlJ3MzJ2d1BlIn0= x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH V2 1/2] MdeModulePkg/CapsuleRuntimeDxe: IA32 add cache flush function X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 25 Mar 2019 07:09:10 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Liming, Both IA32 and X64 ARCH need flush function. My fault to use IA32 to repres= ent the X86 and X64 ARCH. I will clarify it in the commit message later. Thanks, Zhichao > -----Original Message----- > From: Gao, Liming > Sent: Monday, March 25, 2019 2:59 PM > To: Gao, Zhichao ; edk2-devel@lists.01.org > Cc: Wang, Jian J ; Wu, Hao A ; > Ni, Ray ; Zeng, Star ; Ard > Biesheuvel > Subject: RE: [PATCH V2 1/2] MdeModulePkg/CapsuleRuntimeDxe: IA32 add > cache flush function >=20 > Zhichao: > Could you help clarify the commit message? Does IA32 and X64 Arch > implementation need flush function or not? >=20 > >The IA32 ARCH need cache flush function during capsule update. > >Both arm ARCH and IA32 do not need flush cache function, >=20 > Thanks > Liming > >-----Original Message----- > >From: Gao, Zhichao > >Sent: Friday, March 22, 2019 11:07 AM > >To: edk2-devel@lists.01.org > >Cc: Wang, Jian J ; Wu, Hao A > >; Ni, Ray ; Zeng, Star > >; Gao, Liming ; Ard > >Biesheuvel > >Subject: [PATCH V2 1/2] MdeModulePkg/CapsuleRuntimeDxe: IA32 add > cache > >flush function > > > >BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1462 > > > >The IA32 ARCH need cache flush function during capsule update. > >Both arm ARCH and IA32 do not need flush cache function, so merge the > >CapsuleCacheWriteBack() to one file. And add a null version for EBC. > > > >Contributed-under: TianoCore Contribution Agreement 1.1 > >Signed-off-by: Zhichao Gao > >Cc: Jian J Wang > >Cc: Hao Wu > >Cc: Ray Ni > >Cc: Star Zeng > >Cc: Liming Gao > >Cc: Ard Biesheuvel > >--- > > .../Universal/CapsuleRuntimeDxe/Arm/CapsuleReset.c | 35 +----------- > > .../Universal/CapsuleRuntimeDxe/CapsuleCache.c | 63 > >++++++++++++++++++++++ > > .../Universal/CapsuleRuntimeDxe/CapsuleCacheNull.c | 38 > +++++++++++++ > > .../Universal/CapsuleRuntimeDxe/CapsuleReset.c | 16 +----- > > .../CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf | 20 ++++--- > > 5 files changed, 115 insertions(+), 57 deletions(-) create mode > >100644 MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCache.c > > create mode 100644 > >MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCacheNull.c > > > >diff --git > >a/MdeModulePkg/Universal/CapsuleRuntimeDxe/Arm/CapsuleReset.c > >b/MdeModulePkg/Universal/CapsuleRuntimeDxe/Arm/CapsuleReset.c > >index d79d2fc693..ec630ab7a8 100644 > >--- a/MdeModulePkg/Universal/CapsuleRuntimeDxe/Arm/CapsuleReset.c > >+++ > b/MdeModulePkg/Universal/CapsuleRuntimeDxe/Arm/CapsuleReset.c > >@@ -3,6 +3,7 @@ > > PersistAcrossReset capsules > > > > Copyright (c) 2018, Linaro, Ltd. All rights reserved.
> >+ Copyright (c) 2019, Intel Corporation. All rights reserved.
> > > > This program and the accompanying materials are licensed and made > >available > > under the terms and conditions of the BSD License which accompanies > >this @@ -16,8 +17,6 @@ > > > > #include "CapsuleService.h" > > > >-#include > >- > > /** > > Whether the platform supports capsules that persist across reset. Not= e > that > > some platforms only support such capsules at boot time. > >@@ -41,35 +40,3 @@ IsPersistAcrossResetCapsuleSupported ( > > return FeaturePcdGet (PcdSupportUpdateCapsuleReset) > && !EfiAtRuntime > >(); } > > > >-/** > >- Writes Back a range of data cache lines covering a set of capsules in > memory. > >- > >- Writes Back the data cache lines specified by ScatterGatherList. > >- > >- @param ScatterGatherList Physical address of the data structure that > >- describes a set of capsules in memory > >- > >-**/ > >-VOID > >-CapsuleCacheWriteBack ( > >- IN EFI_PHYSICAL_ADDRESS ScatterGatherList > >- ) > >-{ > >- EFI_CAPSULE_BLOCK_DESCRIPTOR *Desc; > >- > >- Desc =3D (EFI_CAPSULE_BLOCK_DESCRIPTOR *)(UINTN)ScatterGatherList; > >- do { > >- WriteBackDataCacheRange (Desc, sizeof *Desc); > >- > >- if (Desc->Length > 0) { > >- WriteBackDataCacheRange ((VOID *)(UINTN)Desc->Union.DataBlock, > >- Desc->Length > >- ); > >- Desc++; > >- } else if (Desc->Union.ContinuationPointer > 0) { > >- Desc =3D (EFI_CAPSULE_BLOCK_DESCRIPTOR *)(UINTN)Desc- > >>Union.ContinuationPointer; > >- } > >- } while (Desc->Length > 0 || Desc->Union.ContinuationPointer > 0); > >- > >- WriteBackDataCacheRange (Desc, sizeof *Desc); -} diff --git > >a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCache.c > >b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCache.c > >new file mode 100644 > >index 0000000000..ab81296a65 > >--- /dev/null > >+++ b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCache.c > >@@ -0,0 +1,63 @@ > >+/** @file > >+ Flush the cache is required for most architectures while do capsule > >+ update. It is not support at Runtime. > >+ > >+ Copyright (c) 2018, Linaro, Ltd. All rights reserved.
Copyright > >+ (c) 2019, Intel Corporation. All rights reserved.
> >+ > >+ This program and the accompanying materials are licensed and made > >available > >+ under the terms and conditions of the BSD License which accompanies > >+ this distribution. The full text of the license may be found at > >+ http://opensource.org/licenses/bsd-license.php > >+ > >+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > >BASIS, > >+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > >EXPRESS OR IMPLIED. > >+ > >+**/ > >+ > >+#include "CapsuleService.h" > >+ > >+#include > >+ > >+/** > >+ Writes Back a range of data cache lines covering a set of capsules in > memory. > >+ > >+ Writes Back the data cache lines specified by ScatterGatherList. > >+ > >+ @param ScatterGatherList Physical address of the data structure that > >+ describes a set of capsules in memory > >+ > >+**/ > >+VOID > >+CapsuleCacheWriteBack ( > >+ IN EFI_PHYSICAL_ADDRESS ScatterGatherList > >+ ) > >+{ > >+ EFI_CAPSULE_BLOCK_DESCRIPTOR *Desc; > >+ > >+ if (!EfiAtRuntime ()) { > >+ Desc =3D (EFI_CAPSULE_BLOCK_DESCRIPTOR *)(UINTN)ScatterGatherList; > >+ do { > >+ WriteBackDataCacheRange ( > >+ (VOID *)(UINTN)Desc, > >+ (UINTN)sizeof (*Desc) > >+ ); > >+ > >+ if (Desc->Length > 0) { > >+ WriteBackDataCacheRange ( > >+ (VOID *)(UINTN)Desc->Union.DataBlock, > >+ (UINTN)Desc->Length > >+ ); > >+ Desc++; > >+ } else if (Desc->Union.ContinuationPointer > 0) { > >+ Desc =3D (EFI_CAPSULE_BLOCK_DESCRIPTOR *)(UINTN)Desc- > >>Union.ContinuationPointer; > >+ } > >+ } while (Desc->Length > 0 || Desc->Union.ContinuationPointer > 0); > >+ > >+ WriteBackDataCacheRange ( > >+ (VOID *)(UINTN)Desc, > >+ (UINTN)sizeof (*Desc) > >+ ); > >+ } > >+} > >+ > >diff --git > >a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCacheNull.c > >b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCacheNull.c > >new file mode 100644 > >index 0000000000..cfb9bb1bf1 > >--- /dev/null > >+++ b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCacheNull.c > >@@ -0,0 +1,38 @@ > >+/** @file > >+ Null function version of cache function. > >+ > >+ Copyright (c) 2018, Linaro, Ltd. All rights reserved.
Copyright > >+ (c) 2019, Intel Corporation. All rights reserved.
> >+ > >+ This program and the accompanying materials are licensed and made > >available > >+ under the terms and conditions of the BSD License which accompanies > >+ this distribution. The full text of the license may be found at > >+ http://opensource.org/licenses/bsd-license.php > >+ > >+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > >BASIS, > >+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > >EXPRESS OR IMPLIED. > >+ > >+**/ > >+ > >+#include "CapsuleService.h" > >+ > >+#include > >+ > >+/** > >+ Writes Back a range of data cache lines covering a set of capsules in > memory. > >+ > >+ Writes Back the data cache lines specified by ScatterGatherList. > >+ > >+ Null version, do nothing. > >+ > >+ @param ScatterGatherList Physical address of the data structure that > >+ describes a set of capsules in memory > >+ > >+**/ > >+VOID > >+CapsuleCacheWriteBack ( > >+ IN EFI_PHYSICAL_ADDRESS ScatterGatherList > >+ ) > >+{ > >+} > >+ > >diff --git a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleReset.c > >b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleReset.c > >index 353f6f2090..8990cf2a35 100644 > >--- a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleReset.c > >+++ b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleReset.c > >@@ -3,6 +3,7 @@ > > PersistAcrossReset capsules > > > > Copyright (c) 2018, Linaro, Ltd. All rights reserved.
> >+ Copyright (c) 2019, Intel Corporation. All rights reserved.
> > > > This program and the accompanying materials are licensed and made > >available > > under the terms and conditions of the BSD License which accompanies > >this @@ -32,18 +33,3 @@ IsPersistAcrossResetCapsuleSupported ( > > return FeaturePcdGet (PcdSupportUpdateCapsuleReset); } > > > >-/** > >- Writes Back a range of data cache lines covering a set of capsules in > memory. > >- > >- Writes Back the data cache lines specified by ScatterGatherList. > >- > >- @param ScatterGatherList Physical address of the data structure that > >- describes a set of capsules in memory > >- > >-**/ > >-VOID > >-CapsuleCacheWriteBack ( > >- IN EFI_PHYSICAL_ADDRESS ScatterGatherList > >- ) > >-{ > >-} > >diff --git > >a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf > >b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf > >index ad7af5fe62..a0cb32a06f 100644 > >--- > a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf > >+++ > >b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf > >@@ -4,7 +4,7 @@ > > # It installs the Capsule Architectural Protocol defined in PI1.0a to > >signify # the capsule runtime services are ready. > > # > >-# Copyright (c) 2006 - 2018, Intel Corporation. All rights > >reserved.
> >+# Copyright (c) 2006 - 2019, Intel Corporation. All rights > >+reserved.
> > # This program and the accompanying materials # are licensed and > >made available under the terms and conditions of the BSD License # > >which accompanies this distribution. The full text of the license may > >be found at @@ -36,16 +36,22 @@ > > > > [Sources.Ia32, Sources.EBC, Sources.ARM, Sources.AARCH64] > > SaveLongModeContext.c > >- CapsuleReset.c > > > >-[Sources.X64] > >- X64/SaveLongModeContext.c > >+[Sources.Ia32, Sources.X64, Sources.ARM, Sources.AARCH64] > >+ CapsuleCache.c > >+ > >+[Sources.Ia32, Sources.X64, Sources.EBC] > > CapsuleReset.c > > > > [Sources.ARM, Sources.AARCH64] > >- SaveLongModeContext.c > > Arm/CapsuleReset.c > > > >+[Sources.EBC] > >+ CapsuleCacheNull.c > >+ > >+[Sources.X64] > >+ X64/SaveLongModeContext.c > >+ > > [Packages] > > MdePkg/MdePkg.dec > > MdeModulePkg/MdeModulePkg.dec > >@@ -61,14 +67,12 @@ > > BaseLib > > PrintLib > > BaseMemoryLib > >+ CacheMaintenanceLib > > > > [LibraryClasses.X64] > > UefiLib > > BaseMemoryLib > > > >-[LibraryClasses.ARM, LibraryClasses.AARCH64] > >- CacheMaintenanceLib > >- > > [Guids] > > ## SOMETIMES_PRODUCES ## Variable:L"CapsuleUpdateData" # > (Process > >across reset capsule image) for capsule updated data > > ## SOMETIMES_PRODUCES ## Variable:L"CapsuleLongModeBuffer" # > The > >long mode buffer used by IA32 Capsule PEIM to call X64 CapsuleCoalesce > >code to handle >4GB capsule blocks > >-- > >2.16.2.windows.1