From 796092bd81390a7f398ca923c509838d36d4b97d Mon Sep 17 00:00:00 2001
From: Laszlo Ersek <lersek@redhat.com>
Date: Fri, 10 Nov 2017 14:56:09 +0100
Subject: [PATCH] OvmfPkg/PlatformPei: manage MtrrLib scratch space manually

This is an untested prototype, as an alternative to growing the temp
SEC/PEI stack. Refer to:

- https://bugzilla.tianocore.org/show_bug.cgi?id=747
- http://mid.mail-archive.com/9474d983-b1c1-b83b-34ef-10bb84586ef6@redhat.com

This patch increases the PEIFV usage by 16KB:

> -PEIFV [39%Full] 917504 total, 365576 used, 551928 free
> +PEIFV [41%Full] 917504 total, 380552 used, 536952 free

while the difference for FVMAIN_COMPACT is just 320 bytes:

> -FVMAIN_COMPACT [43%Full] 3440640 total, 1508752 used, 1931888 free
> +FVMAIN_COMPACT [43%Full] 3440640 total, 1508432 used, 1932208 free

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
---
 OvmfPkg/PlatformPei/Platform.h  |  4 ++++
 OvmfPkg/PlatformPei/MemDetect.c | 42 ++++++++++++++++++++++++++++++++++-------
 OvmfPkg/PlatformPei/Platform.c  |  2 ++
 OvmfPkg/PlatformPei/Xen.c       | 26 ++++++++++++++++++++++++-
 4 files changed, 66 insertions(+), 8 deletions(-)

diff --git a/OvmfPkg/PlatformPei/Platform.h b/OvmfPkg/PlatformPei/Platform.h
index f942e61bb4f9..513a2e2373e6 100644
--- a/OvmfPkg/PlatformPei/Platform.h
+++ b/OvmfPkg/PlatformPei/Platform.h
@@ -17,6 +17,8 @@
 
 #include <IndustryStandard/E820.h>
 
+#define MTRR_LIB_SCRATCH_BUFFER_SIZE SIZE_16KB
+
 VOID
 AddIoMemoryBaseSizeHob (
   EFI_PHYSICAL_ADDRESS        MemoryBase,
@@ -115,4 +117,6 @@ extern UINT32 mMaxCpuCount;
 
 extern UINT16 mHostBridgeDevId;
 
+extern UINT8 mMtrrLibScratchBuffer[MTRR_LIB_SCRATCH_BUFFER_SIZE];
+
 #endif // _PLATFORM_PEI_H_INCLUDED_
diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c
index 2b2f3e4bec55..1d09dc44b69b 100644
--- a/OvmfPkg/PlatformPei/MemDetect.c
+++ b/OvmfPkg/PlatformPei/MemDetect.c
@@ -595,6 +595,8 @@ QemuInitializeRam (
   UINT64                      LowerMemorySize;
   UINT64                      UpperMemorySize;
   MTRR_SETTINGS               MtrrSettings;
+  MTRR_MEMORY_RANGE           Ranges[2];
+  UINTN                       MtrrLibScratchBufferSize;
   EFI_STATUS                  Status;
 
   DEBUG ((EFI_D_INFO, "%a called\n", __FUNCTION__));
@@ -682,22 +684,48 @@ QemuInitializeRam (
     SetMem (&MtrrSettings.Fixed, sizeof MtrrSettings.Fixed, 0x06);
     ZeroMem (&MtrrSettings.Variables, sizeof MtrrSettings.Variables);
     MtrrSettings.MtrrDefType |= BIT11 | BIT10 | 6;
-    MtrrSetAllMtrrs (&MtrrSettings);
 
     //
     // Set memory range from 640KB to 1MB to uncacheable
     //
-    Status = MtrrSetMemoryAttribute (BASE_512KB + BASE_128KB,
-               BASE_1MB - (BASE_512KB + BASE_128KB), CacheUncacheable);
-    ASSERT_EFI_ERROR (Status);
+    Ranges[0].BaseAddress = BASE_512KB + BASE_128KB;
+    Ranges[0].Length      = BASE_1MB - Ranges[0].BaseAddress;
+    Ranges[0].Type        = CacheUncacheable;
 
     //
     // Set memory range from the "top of lower RAM" (RAM below 4GB) to 4GB as
     // uncacheable
     //
-    Status = MtrrSetMemoryAttribute (LowerMemorySize,
-               SIZE_4GB - LowerMemorySize, CacheUncacheable);
-    ASSERT_EFI_ERROR (Status);
+    Ranges[1].BaseAddress = LowerMemorySize;
+    Ranges[1].Length      = SIZE_4GB - LowerMemorySize;
+    Ranges[1].Type        = CacheUncacheable;
+
+    //
+    // Apply Ranges to MtrrSettings.
+    //
+    MtrrLibScratchBufferSize = sizeof mMtrrLibScratchBuffer;
+    Status = MtrrSetMemoryAttributesInMtrrSettings (
+               &MtrrSettings,
+               mMtrrLibScratchBuffer,
+               &MtrrLibScratchBufferSize,
+               Ranges,
+               ARRAY_SIZE (Ranges)
+               );
+    if (EFI_ERROR (Status)) {
+      DEBUG ((
+        DEBUG_ERROR,
+        "%a: MtrrSetMemoryAttributesInMtrrSettings(): %r (ScratchSize=%Lu)\n",
+        __FUNCTION__,
+        Status,
+        (UINT64)MtrrLibScratchBufferSize
+        ));
+      ASSERT (FALSE);
+    }
+
+    //
+    // Program the hardware with MtrrSettings.
+    //
+    MtrrSetAllMtrrs (&MtrrSettings);
   }
 }
 
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index 544ac547bf5f..db16e6756fda 100644
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -71,6 +71,8 @@ BOOLEAN mS3Supported = FALSE;
 
 UINT32 mMaxCpuCount;
 
+UINT8 mMtrrLibScratchBuffer[MTRR_LIB_SCRATCH_BUFFER_SIZE];
+
 VOID
 AddIoMemoryBaseSizeHob (
   EFI_PHYSICAL_ADDRESS        MemoryBase,
diff --git a/OvmfPkg/PlatformPei/Xen.c b/OvmfPkg/PlatformPei/Xen.c
index ab38f97a67aa..f06c258d55c0 100644
--- a/OvmfPkg/PlatformPei/Xen.c
+++ b/OvmfPkg/PlatformPei/Xen.c
@@ -181,6 +181,9 @@ XenPublishRamRegions (
     UINT32 Loop;
 
     for (Loop = 0; Loop < E820EntriesCount; Loop++) {
+      MTRR_MEMORY_RANGE Range;
+      UINTN             MtrrLibScratchBufferSize;
+
       Entry = E820Map + Loop;
 
       //
@@ -192,7 +195,28 @@ XenPublishRamRegions (
 
       AddMemoryBaseSizeHob (Entry->BaseAddr, Entry->Length);
 
-      MtrrSetMemoryAttribute (Entry->BaseAddr, Entry->Length, CacheWriteBack);
+      Range.BaseAddress        = Entry->BaseAddr;
+      Range.Length             = Entry->Length;
+      Range.Type               = CacheWriteBack;
+      MtrrLibScratchBufferSize = sizeof mMtrrLibScratchBuffer;
+
+      Status = MtrrSetMemoryAttributesInMtrrSettings (
+                 NULL,                      // MtrrSetting
+                 mMtrrLibScratchBuffer,
+                 &MtrrLibScratchBufferSize,
+                 &Range,
+                 1
+                 );
+      if (EFI_ERROR (Status)) {
+        DEBUG ((
+          DEBUG_WARN,
+          ("%a: MtrrSetMemoryAttributesInMtrrSettings(): %r "
+           "(ScratchSize=%Lu)\n"),
+          __FUNCTION__,
+          Status,
+          (UINT64)MtrrLibScratchBufferSize
+          ));
+      }
     }
   }
 }
-- 
2.14.1.3.gb7cf6e02401b