From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mx.groups.io with SMTP id smtpd.web12.10811.1639400329822569312 for ; Mon, 13 Dec 2021 04:59:14 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@intel.com header.s=intel header.b=QRY+bq+1; spf=pass (domain: intel.com, ip: 134.134.136.126, mailfrom: min.m.xu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1639400354; x=1670936354; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=80FpCLu6trgcPn+qp2lLvsL8AX3kdMUf2IukGeV/62o=; b=QRY+bq+1+eCIgc9WHFhn1Zr6Nx5hZ4AgiAKTyiYcS1MCA+0ci80OjTmK EvEHzgofcVZI+P9LQyNoJ6ajGzwtgvSdoAkGqp8WNrcN2mgTFIfAWut5e uYdGIJoO4kt/m06++PUwjztOtWUbWVuJe1otXWoF1gBVsDVI1nPcZHe9O NA1xVsHyC/Cdzt4HS0Gzx/gkX5KKDV7/1cE+W08NlwvO0rQ+ADo7M/5Bg 6uXaam8o6Yg895fHR8MD22UEXiwSX9VD8PF7qBpLJICvUbDKX3wlXkrR5 MBcndTY/TT6jhGIwd5HykHpJw0UdDKrewmh2vvgQ5FIRkDl7j1K234zEm A==; X-IronPort-AV: E=McAfee;i="6200,9189,10196"; a="225584927" X-IronPort-AV: E=Sophos;i="5.88,202,1635231600"; d="scan'208";a="225584927" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Dec 2021 04:59:14 -0800 X-IronPort-AV: E=Sophos;i="5.88,202,1635231600"; d="scan'208";a="517738884" Received: from mxu9-mobl1.ccr.corp.intel.com ([10.249.173.142]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Dec 2021 04:59:11 -0800 From: "Min Xu" To: devel@edk2.groups.io Cc: Min Xu , Jian J Wang , Hao A Wu , Brijesh Singh , Erdem Aktas , James Bottomley , Jiewen Yao , Tom Lendacky , Gerd Hoffmann Subject: [PATCH V4 20/31] MdeModulePkg: Add PcdTdxSharedBitMask Date: Mon, 13 Dec 2021 20:56:51 +0800 Message-Id: <3cd00d5f5a4b66645f49bba35924711d92fa45eb.1639399598.git.min.m.xu@intel.com> X-Mailer: git-send-email 2.29.2.windows.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 Guest Physical Address (GPA) space in Td guest is divided into private and shared sub-spaces, determined by the SHARED bit of GPA. This PCD holds the shared bit mask. Its default value is 0 and it will be set in PlatformPei driver if it is of Td guest. Cc: Jian J Wang Cc: Hao A Wu Cc: Brijesh Singh Cc: Erdem Aktas Cc: James Bottomley Cc: Jiewen Yao Cc: Tom Lendacky Cc: Gerd Hoffmann Signed-off-by: Min Xu --- MdeModulePkg/MdeModulePkg.dec | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec index 453f2a74b11d..e90a7f38708c 100644 --- a/MdeModulePkg/MdeModulePkg.dec +++ b/MdeModulePkg/MdeModulePkg.dec @@ -2143,6 +2143,10 @@ # @Prompt The flag which indicates if IA32_EFER is allowed to be changed. gEfiMdeModulePkgTokenSpaceGuid.PcdIa32EferChangeAllowed|TRUE|BOOLEAN|0x00030009 + ## This PCD holds the shared bit mask for page table entries when Tdx is enabled. + # @Prompt The shared bit mask when Intel Tdx is enabled. + gEfiMdeModulePkgTokenSpaceGuid.PcdTdxSharedBitMask|0x0|UINT64|0x0003000a + [PcdsDynamicEx] ## This dynamic PCD enables the default variable setting. # Its value is the default store ID value. The default value is zero as Standard default. -- 2.29.2.windows.2