Re: [edk2-devel] [PATCH ovmf v4 1/5] MdePkg/Register/Amd: Define all bits from MSR_SEV_STATUS_REGISTER

["Lendacky, Thomas via groups.io" <thomas.lendacky=amd.com@groups.io>]

On 6/4/24 21:09, Alexey Kardashevskiy wrote:
> For now we need DebugSwap but others are likely to be needed too.
> 
> Cc: Tom Lendacky <thomas.lendacky@amd.com>
> Cc: Liming Gao <gaoliming@byosoft.com.cn>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Zhiguang Liu <zhiguang.liu@intel.com>
> Signed-off-by: Alexey Kardashevskiy <aik@amd.com>

Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>

> ---
> Changes:
> v4:
> * added more from April/2024 APM
> ---
>   MdePkg/Include/Register/Amd/Fam17Msr.h | 95 +++++++++++++++++++-
>   1 file changed, 91 insertions(+), 4 deletions(-)
> 
> diff --git a/MdePkg/Include/Register/Amd/Fam17Msr.h b/MdePkg/Include/Register/Amd/Fam17Msr.h
> index f2d5ccb39dc7..286b337f70fa 100644
> --- a/MdePkg/Include/Register/Amd/Fam17Msr.h
> +++ b/MdePkg/Include/Register/Amd/Fam17Msr.h
> @@ -126,19 +126,106 @@ typedef union {
>       ///
>       /// [Bit 0] Secure Encrypted Virtualization (Sev) is enabled
>       ///
> -    UINT32    SevBit    : 1;
> +    UINT32    SevBit              : 1;
>   
>       ///
>       /// [Bit 1] Secure Encrypted Virtualization Encrypted State (SevEs) is enabled
>       ///
> -    UINT32    SevEsBit  : 1;
> +    UINT32    SevEsBit            : 1;
>   
>       ///
>       /// [Bit 2] Secure Nested Paging (SevSnp) is enabled
>       ///
> -    UINT32    SevSnpBit : 1;
> +    UINT32    SevSnpBit           : 1;
>   
> -    UINT32    Reserved2 : 29;
> +    ///
> +    /// [Bit 3] Virtual TOM feature is enabled in SEV_FEATURES[1]
> +    ///
> +    UINT32    vTOM                : 1;
> +
> +    ///
> +    /// [Bit 4] ReflectVC feature is enabled in SEV_FEATURES[2]
> +    ///
> +    UINT32    ReflectVC           : 1;
> +
> +    ///
> +    /// [Bit 5] Restricted Injection feature is enabled in SEV_FEATURES[3]
> +    ///
> +    UINT32    RestrictedInjection : 1;
> +
> +    ///
> +    /// [Bit 6] Alternate Injection feature is enabled in SEV_FEATURES[4]
> +    ///
> +    UINT32    AlternateInjection  : 1;
> +
> +    ///
> +    /// [Bit 7] Debug Virtualization feature is enabled in SEV_FEATURES[5]
> +    ///
> +    UINT32    DebugVirtualization : 1;
> +
> +    ///
> +    /// [Bit 8]  PreventHostIBS feature is enabled in SEV_FEATURES[6]
> +    ///
> +    UINT32    PreventHostIBS      : 1;
> +
> +    ///
> +    /// [Bit 9] BTB isolation feature is enabled in SEV_FEATURES[7]
> +    ///
> +    UINT32    SNPBTBIsolation     : 1;
> +
> +    ///
> +    /// [Bit 10] VMPL SSS feature is enabled in SEV_FEATURES[8]
> +    ///
> +    UINT32    VmplSSS             : 1;
> +
> +    ///
> +    /// [Bit 11] Secure TSC feature is enabled in SEV_FEATURES[9]
> +    ///
> +    UINT32    SecureTsc           : 1;
> +
> +    ///
> +    /// [Bit 12] VMGEXIT Parameter feature is enabled in SEV_FEATURES[10]
> +    ///
> +    UINT32    VmgexitParameter    : 1;
> +
> +    ///
> +    /// [Bit 13] PMC Virtualization feature is enabled in SEV_FEATURES[11]
> +    ///
> +    UINT32    PmcVirtualization   : 1;
> +
> +    ///
> +    /// [Bit 14] IBS Virtualization feature is enabled in SEV_FEATURES[12]
> +    ///
> +    UINT32    IbsVirtualization   : 1;
> +
> +    ///
> +    /// [Bit 15]
> +    ///
> +    UINT32    Reserved1           : 1;
> +
> +    ///
> +    /// [Bit 16] VMSA Register Protection feature is enabled in SEV_FEATURES[14]
> +    ///
> +    UINT32    VmsaRegProt         : 1;
> +
> +    ///
> +    /// [Bit 17] SMT Protection feature is enabled in SEV_FEATURES[15]
> +    ///
> +    UINT32    SmtProtection       : 1;
> +    ///
> +    ///
> +    /// [Bit 18] Secure AVIC feature is enabled in SEV_FEATURES[16]
> +    ///
> +    UINT32    SecureAVIC          : 1;
> +
> +    UINT32    Reserved2           : 4;
> +
> +    ///
> +    /// [Bit 23] IBPB on Entry feature is enabled in SEV_FEATURES[21]
> +    ///
> +    UINT32    IbpbOnEntry         : 1;
> +
> +    UINT32    Reserved3           : 8;
>     } Bits;
>     ///
>     /// All bit fields as a 32-bit value


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