From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by mx.groups.io with SMTP id smtpd.web11.132088.1672034773195318651 for ; Sun, 25 Dec 2022 22:06:13 -0800 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=ZqeIuYNx; spf=pass (domain: intel.com, ip: 134.134.136.65, mailfrom: ashraf.ali.s@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1672034773; x=1703570773; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=dAIXiej+RuhwsY7jbdh5RFFUvM7y8BxxfzR+xM7+5nM=; b=ZqeIuYNxOndhi6UTGIg0jI7hNRBWARjq4h2EGcqY3NY0qQ+G5ip/dg0P JCZHhXEW4QC0XN+OSNeMFbA/IVYUN8rZ0NHRSDwxn7VpqbtGYgEo4igGB k2B2cITqnfjU9jdtkj+EUcvHa61ySBJhW3/d6ziLBF3mdfVe9M00ln56p /M78ZGj1bD5we9oxiyC1qqQcEMoD/5oL1+lgDRWth55tr75dBETPV+h+i cIVZhHDSqgCYmYIjzgpU7xNCErrb4A2G/M8GsoBYAGMV9CcsFsJ4GsQPf 7ctw4JAQr7fJmDfnUKUosbkFP1lCp4ucdhmkMItsMvkrIf1bWxatVxKQY Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10571"; a="322503774" X-IronPort-AV: E=Sophos;i="5.96,274,1665471600"; d="scan'208";a="322503774" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Dec 2022 22:06:12 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10571"; a="685089760" X-IronPort-AV: E=Sophos;i="5.96,274,1665471600"; d="scan'208";a="685089760" Received: from basfe004.gar.corp.intel.com ([10.66.129.57]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Dec 2022 22:06:09 -0800 From: "Ashraf Ali S" To: devel@edk2.groups.io Cc: Ashraf Ali S , Ray Ni , Rangasai V Chaganty , Isaac Oram , Chasel Chiu , Nate DeSimone , Liming Gao , Eric Dong Subject: [PATCH v2] FIX MinPlatformPkg PCIE Base typecasting error. Date: Mon, 26 Dec 2022 11:35:53 +0530 Message-Id: <3f8e35db6103443d095d33ed2efde6f8449de2cf.1672034725.git.ashraf.ali.s@intel.com> X-Mailer: git-send-email 2.33.0.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit PCIE Base Address is 64bit PCD and the Mem Limit UINT64. so typecasting to 32bit is not needed. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4068 Signed-off-by: Ashraf Ali S Cc: Ray Ni Cc: Rangasai V Chaganty Cc: Isaac Oram Cc: Chasel Chiu Cc: Nate DeSimone Cc: Isaac Oram Cc: Liming Gao Cc: Eric Dong --- .../Pci/Library/PciHostBridgeLibSimple/PciHostBridgeLibSimple.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciHostBridgeLibSimple.c b/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciHostBridgeLibSimple.c index 0e3fee28b5..e38975eee5 100644 --- a/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciHostBridgeLibSimple.c +++ b/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciHostBridgeLibSimple.c @@ -90,7 +90,7 @@ PciHostBridgeGetRootBridges ( if (PcdGet32(PcdPciReservedMemLimit) != 0) { mRootBridgeTemplate.Mem.Limit = PcdGet32 (PcdPciReservedMemLimit); } else { - mRootBridgeTemplate.Mem.Limit = (UINT32) PcdGet64 (PcdPciExpressBaseAddress) - 1; + mRootBridgeTemplate.Mem.Limit = PcdGet64 (PcdPciExpressBaseAddress) - 1; } mRootBridgeTemplate.MemAbove4G.Base = PcdGet64 (PcdPciReservedMemAbove4GBBase); -- 2.33.0.windows.1