From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: devel@edk2.groups.io, ard.biesheuvel@arm.com
Cc: Pete Batard <pete@akeo.ie>, Jared McNeill <jmcneill@invisible.ca>,
Andrei Warkentin <awarkentin@vmware.com>,
Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>,
Jeremy Linton <jeremy.linton@arm.com>
Subject: Re: [edk2-devel] [PATCH edk2-platforms v4 1/9] Silicon/Broadcom/BcmGenetDxe: whitespace/cosmetic cleanup
Date: Mon, 11 May 2020 23:14:41 +0200 [thread overview]
Message-ID: <4076bc8b-9a1c-eb99-20ac-3f2c788e7dca@redhat.com> (raw)
In-Reply-To: <20200511145527.23453-2-ard.biesheuvel@arm.com>
On 5/11/20 4:55 PM, Ard Biesheuvel wrote:
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
> ---
> Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf | 2 +
> Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h | 38 +-
> Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c | 19 +-
> Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenericPhy.c | 16 +-
> Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c | 744 ++++++++++----------
> Silicon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c | 90 ++-
> 6 files changed, 456 insertions(+), 453 deletions(-)
>
> diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf
> index e74fa02ad209..1f1aeca7dd6b 100644
> --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf
> +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf
> @@ -21,7 +21,9 @@ [Sources]
> ComponentName.c
> DriverBinding.c
> GenericPhy.c
> + GenericPhy.h
> GenetUtil.c
> + GenetUtil.h
> SimpleNetwork.c
>
> [Packages]
> diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h
> index 2e7b78322bcd..b21a284b6221 100644
> --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h
> +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h
> @@ -185,7 +185,7 @@
> #define GENET_TX_SCB_BURST_SIZE (GENET_TX_BASE + 0x1040 + 0x0c)
>
> typedef struct {
> - EFI_PHYSICAL_ADDRESS Pa;
> + EFI_PHYSICAL_ADDRESS PhysAddress;
> VOID * Mapping;
> } GENET_MAP_INFO;
>
> @@ -198,32 +198,32 @@ typedef enum {
> } GENET_PHY_MODE;
>
> typedef struct {
> - UINT32 Signature;
> - EFI_HANDLE ControllerHandle;
> + UINT32 Signature;
> + EFI_HANDLE ControllerHandle;
>
> - EFI_LOCK Lock;
> + EFI_LOCK Lock;
>
> - EFI_SIMPLE_NETWORK_PROTOCOL Snp;
> - EFI_SIMPLE_NETWORK_MODE SnpMode;
> + EFI_SIMPLE_NETWORK_PROTOCOL Snp;
> + EFI_SIMPLE_NETWORK_MODE SnpMode;
>
> - BCM_GENET_PLATFORM_DEVICE_PROTOCOL *Dev;
> + BCM_GENET_PLATFORM_DEVICE_PROTOCOL *Dev;
>
> - GENERIC_PHY_PRIVATE_DATA Phy;
> + GENERIC_PHY_PRIVATE_DATA Phy;
>
> - UINT8 * TxBuffer[GENET_DMA_DESC_COUNT];
> - UINT8 TxQueued;
> - UINT16 TxNext;
> - UINT16 TxConsIndex;
> - UINT16 TxProdIndex;
> + UINT8 *TxBuffer[GENET_DMA_DESC_COUNT];
> + UINT8 TxQueued;
> + UINT16 TxNext;
> + UINT16 TxConsIndex;
> + UINT16 TxProdIndex;
>
> - UINT8 * RxBuffer[GENET_DMA_DESC_COUNT];
> - GENET_MAP_INFO RxBufferMap[GENET_DMA_DESC_COUNT];
> - UINT16 RxConsIndex;
> - UINT16 RxProdIndex;
> + UINT8 *RxBuffer[GENET_DMA_DESC_COUNT];
> + GENET_MAP_INFO RxBufferMap[GENET_DMA_DESC_COUNT];
> + UINT16 RxConsIndex;
> + UINT16 RxProdIndex;
>
> - GENET_PHY_MODE PhyMode;
> + GENET_PHY_MODE PhyMode;
>
> - UINTN RegBase;
> + UINTN RegBase;
> } GENET_PRIVATE_DATA;
>
> extern EFI_COMPONENT_NAME_PROTOCOL gGenetComponentName;
> diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c
> index e3d015dd0820..c23847ba9b52 100644
> --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c
> +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c
> @@ -55,14 +55,12 @@ GenetDriverBindingSupported (
> //
> Status = gBS->OpenProtocol (ControllerHandle,
> &gBcmGenetPlatformDeviceProtocolGuid,
> - (VOID **) &Dev,
> + (VOID **)&Dev,
> This->DriverBindingHandle,
> ControllerHandle,
> EFI_OPEN_PROTOCOL_BY_DRIVER);
> if (EFI_ERROR (Status)) {
> return Status;
> - } else {
> - Status = EFI_SUCCESS;
> }
>
> //
> @@ -73,7 +71,7 @@ GenetDriverBindingSupported (
> This->DriverBindingHandle,
> ControllerHandle);
>
> - return Status;
> + return EFI_SUCCESS;
Considering this is a cosmetic change,
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
> }
>
>
> @@ -111,7 +109,7 @@ GenetDriverBindingStart (
> Genet = AllocateZeroPool (sizeof (GENET_PRIVATE_DATA));
> if (Genet == NULL) {
> DEBUG ((DEBUG_ERROR,
> - "GenetDriverBindingStart: Couldn't allocate private data\n"));
> + "%a: Couldn't allocate private data\n", __FUNCTION__));
> return EFI_OUT_OF_RESOURCES;
> }
>
> @@ -123,14 +121,14 @@ GenetDriverBindingStart (
> EFI_OPEN_PROTOCOL_BY_DRIVER);
> if (EFI_ERROR (Status)) {
> DEBUG ((DEBUG_ERROR,
> - "GenetDriverBindingStart: Couldn't open protocol: %r\n", Status));
> + "%a: Couldn't open protocol: %r\n", __FUNCTION__, Status));
> goto FreeDevice;
> }
>
> Status = GenetDmaAlloc (Genet);
> if (EFI_ERROR (Status)) {
> DEBUG ((DEBUG_ERROR,
> - "GenetDriverBindingStart: Couldn't allocate DMA buffers: %r\n", Status));
> + "%a: Couldn't allocate DMA buffers: %r\n", __FUNCTION__, Status));
> goto FreeDevice;
> }
>
> @@ -180,8 +178,7 @@ GenetDriverBindingStart (
>
> if (EFI_ERROR (Status)) {
> DEBUG ((DEBUG_ERROR,
> - "GenetDriverBindingStart: Couldn't install protocol interfaces: %r\n",
> - Status));
> + "%a: Couldn't install protocol interfaces: %r\n", __FUNCTION__, Status));
> gBS->CloseProtocol (ControllerHandle,
> &gBcmGenetPlatformDeviceProtocolGuid,
> This->DriverBindingHandle,
> @@ -190,10 +187,10 @@ GenetDriverBindingStart (
> }
>
> Genet->ControllerHandle = ControllerHandle;
> - return Status;
> + return EFI_SUCCESS;
>
> FreeDevice:
> - DEBUG ((DEBUG_WARN, "GenetDriverBindingStart: Returning %r\n", Status));
> + DEBUG ((DEBUG_WARN, "%a: Returning %r\n", __FUNCTION__, Status));
> FreePool (Genet);
> return Status;
> }
> diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenericPhy.c b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenericPhy.c
> index a3c709891bc9..cd2788adc52c 100644
> --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenericPhy.c
> +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenericPhy.c
> @@ -115,8 +115,8 @@ GenericPhyDetect (
> if (Id1 != 0xFFFF && Id2 != 0xFFFF) {
> Phy->PhyAddr = PhyAddr;
> DEBUG ((DEBUG_INFO,
> - "GenericPhyDetect: PHY detected at address 0x%02X (PHYIDR1=0x%04X, PHYIDR2=0x%04X)\n",
> - PhyAddr, Id1, Id2));
> + "%a: PHY detected at address 0x%02X (PHYIDR1=0x%04X, PHYIDR2=0x%04X)\n",
> + __FUNCTION__, PhyAddr, Id1, Id2));
> return EFI_SUCCESS;
> }
> }
> @@ -348,8 +348,8 @@ GenericPhyGetConfig (
> *Duplex = (An & GENERIC_PHY_ANAR_10BASET_FDX) ? PHY_DUPLEX_FULL : PHY_DUPLEX_HALF;
> }
>
> - DEBUG ((DEBUG_INFO, "GenericPhyGetConfig: Link speed %d Mbps, %a-duplex\n",
> - *Speed, *Duplex == PHY_DUPLEX_FULL ? "full" : "half"));
> + DEBUG ((DEBUG_INFO, "%a: Link speed %d Mbps, %a-duplex\n",
> + __FUNCTION__, *Speed, *Duplex == PHY_DUPLEX_FULL ? "full" : "half"));
>
> return EFI_SUCCESS;
> }
> @@ -367,8 +367,8 @@ GenericPhyGetConfig (
> EFI_STATUS
> EFIAPI
> GenericPhyUpdateConfig (
> - IN GENERIC_PHY_PRIVATE_DATA *Phy
> - )
> + IN GENERIC_PHY_PRIVATE_DATA *Phy
> + )
> {
> EFI_STATUS Status;
> GENERIC_PHY_SPEED Speed;
> @@ -380,7 +380,7 @@ GenericPhyUpdateConfig (
>
> if (Phy->LinkUp != LinkUp) {
> if (LinkUp) {
> - DEBUG ((DEBUG_VERBOSE, "GenericPhyUpdateConfig: Link is up\n"));
> + DEBUG ((DEBUG_VERBOSE, "%a: Link is up\n", __FUNCTION__));
>
> Status = GenericPhyGetConfig (Phy, &Speed, &Duplex);
> if (EFI_ERROR (Status)) {
> @@ -389,7 +389,7 @@ GenericPhyUpdateConfig (
>
> GenericPhyConfigure (Phy, Speed, Duplex);
> } else {
> - DEBUG ((DEBUG_VERBOSE, "GenericPhyUpdateConfig: Link is down\n"));
> + DEBUG ((DEBUG_VERBOSE, "%a: Link is down\n", __FUNCTION__));
> }
> }
>
> diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c
> index d471b1cadadc..7ae9acec4c78 100644
> --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c
> +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c
> @@ -31,13 +31,13 @@
> STATIC
> UINT32
> GenetMmioRead (
> - IN GENET_PRIVATE_DATA *Genet,
> - IN UINT32 Offset
> - )
> + IN GENET_PRIVATE_DATA *Genet,
> + IN UINT32 Offset
> + )
> {
> - ASSERT((Offset & 3) == 0);
> + ASSERT ((Offset & 3) == 0);
>
> - return MmioRead32 (Genet->RegBase + Offset);
> + return MmioRead32 (Genet->RegBase + Offset);
> }
>
> /**
> @@ -53,15 +53,15 @@ GenetMmioRead (
> STATIC
> VOID
> GenetMmioWrite (
> - IN GENET_PRIVATE_DATA *Genet,
> - IN UINT32 Offset,
> - IN UINT32 Data
> - )
> + IN GENET_PRIVATE_DATA *Genet,
> + IN UINT32 Offset,
> + IN UINT32 Data
> + )
> {
> - ASSERT((Offset & 3) == 0);
> + ASSERT ((Offset & 3) == 0);
>
> - ArmDataSynchronizationBarrier ();
> - MmioWrite32 (Genet->RegBase + Offset, Data);
> + ArmDataSynchronizationBarrier ();
> + MmioWrite32 (Genet->RegBase + Offset, Data);
> }
>
> /**
> @@ -79,37 +79,38 @@ GenetMmioWrite (
> EFI_STATUS
> EFIAPI
> GenetPhyRead (
> - IN VOID *Priv,
> - IN UINT8 PhyAddr,
> - IN UINT8 Reg,
> - OUT UINT16 *Data
> - )
> + IN VOID *Priv,
> + IN UINT8 PhyAddr,
> + IN UINT8 Reg,
> + OUT UINT16 *Data
> + )
> {
> - GENET_PRIVATE_DATA *Genet = Priv;
> - UINTN Retry;
> - UINT32 Value;
> + GENET_PRIVATE_DATA *Genet = Priv;
> + UINTN Retry;
> + UINT32 Value;
>
> - Value = GENET_MDIO_READ |
> - GENET_MDIO_START_BUSY |
> - __SHIFTIN(PhyAddr, GENET_MDIO_PMD) |
> - __SHIFTIN(Reg, GENET_MDIO_REG);
> - GenetMmioWrite (Genet, GENET_MDIO_CMD, Value);
> + Value = GENET_MDIO_READ |
> + GENET_MDIO_START_BUSY |
> + __SHIFTIN(PhyAddr, GENET_MDIO_PMD) |
> + __SHIFTIN(Reg, GENET_MDIO_REG);
> + GenetMmioWrite (Genet, GENET_MDIO_CMD, Value);
>
> - for (Retry = GENET_PHY_RETRY; Retry > 0; Retry--) {
> - Value = GenetMmioRead (Genet, GENET_MDIO_CMD);
> - if ((Value & GENET_MDIO_START_BUSY) == 0) {
> - *Data = Value & 0xffff;
> - break;
> - }
> - gBS->Stall (10);
> + for (Retry = GENET_PHY_RETRY; Retry > 0; Retry--) {
> + Value = GenetMmioRead (Genet, GENET_MDIO_CMD);
> + if ((Value & GENET_MDIO_START_BUSY) == 0) {
> + *Data = Value & 0xffff;
> + break;
> }
> + gBS->Stall (10);
> + }
>
> - if (Retry == 0) {
> - DEBUG ((DEBUG_ERROR, "GenetPhyRead: Timeout reading PhyAddr %d, Reg %d\n", PhyAddr, Reg));
> - return EFI_DEVICE_ERROR;
> - }
> + if (Retry == 0) {
> + DEBUG ((DEBUG_ERROR,
> + "%a: Timeout reading PhyAddr %d, Reg %d\n", __FUNCTION__, PhyAddr, Reg));
> + return EFI_DEVICE_ERROR;
> + }
>
> - return EFI_SUCCESS;
> + return EFI_SUCCESS;
> }
>
> /**
> @@ -127,36 +128,37 @@ GenetPhyRead (
> EFI_STATUS
> EFIAPI
> GenetPhyWrite (
> - IN VOID *Priv,
> - IN UINT8 PhyAddr,
> - IN UINT8 Reg,
> - IN UINT16 Data
> - )
> + IN VOID *Priv,
> + IN UINT8 PhyAddr,
> + IN UINT8 Reg,
> + IN UINT16 Data
> + )
> {
> - GENET_PRIVATE_DATA *Genet = Priv;
> - UINTN Retry;
> - UINT32 Value;
> + GENET_PRIVATE_DATA *Genet = Priv;
> + UINTN Retry;
> + UINT32 Value;
>
> - Value = GENET_MDIO_WRITE |
> - GENET_MDIO_START_BUSY |
> - __SHIFTIN(PhyAddr, GENET_MDIO_PMD) |
> - __SHIFTIN(Reg, GENET_MDIO_REG);
> - GenetMmioWrite (Genet, GENET_MDIO_CMD, Value | Data);
> + Value = GENET_MDIO_WRITE |
> + GENET_MDIO_START_BUSY |
> + __SHIFTIN(PhyAddr, GENET_MDIO_PMD) |
> + __SHIFTIN(Reg, GENET_MDIO_REG);
> + GenetMmioWrite (Genet, GENET_MDIO_CMD, Value | Data);
>
> - for (Retry = GENET_PHY_RETRY; Retry > 0; Retry--) {
> - Value = GenetMmioRead (Genet, GENET_MDIO_CMD);
> - if ((Value & GENET_MDIO_START_BUSY) == 0) {
> - break;
> - }
> - gBS->Stall (10);
> + for (Retry = GENET_PHY_RETRY; Retry > 0; Retry--) {
> + Value = GenetMmioRead (Genet, GENET_MDIO_CMD);
> + if ((Value & GENET_MDIO_START_BUSY) == 0) {
> + break;
> }
> + gBS->Stall (10);
> + }
>
> - if (Retry == 0) {
> - DEBUG ((DEBUG_ERROR, "GenetPhyRead: Timeout writing PhyAddr %d, Reg %d\n", PhyAddr, Reg));
> - return EFI_DEVICE_ERROR;
> - }
> + if (Retry == 0) {
> + DEBUG ((DEBUG_ERROR,
> + "%a: Timeout writing PhyAddr %d, Reg %d\n", __FUNCTION__, PhyAddr, Reg));
> + return EFI_DEVICE_ERROR;
> + }
>
> - return EFI_SUCCESS;
> + return EFI_SUCCESS;
> }
>
> /**
> @@ -170,44 +172,44 @@ GenetPhyWrite (
> VOID
> EFIAPI
> GenetPhyConfigure (
> - IN VOID *Priv,
> - IN GENERIC_PHY_SPEED Speed,
> - IN GENERIC_PHY_DUPLEX Duplex
> - )
> + IN VOID *Priv,
> + IN GENERIC_PHY_SPEED Speed,
> + IN GENERIC_PHY_DUPLEX Duplex
> + )
> {
> - GENET_PRIVATE_DATA *Genet = Priv;
> - UINT32 Value;
> + GENET_PRIVATE_DATA *Genet = Priv;
> + UINT32 Value;
>
> - Value = GenetMmioRead (Genet, GENET_EXT_RGMII_OOB_CTRL);
> - Value &= ~GENET_EXT_RGMII_OOB_OOB_DISABLE;
> - Value |= GENET_EXT_RGMII_OOB_RGMII_LINK;
> - Value |= GENET_EXT_RGMII_OOB_RGMII_MODE_EN;
> - if (Genet->PhyMode == GENET_PHY_MODE_RGMII) {
> - Value |= GENET_EXT_RGMII_OOB_ID_MODE_DISABLE;
> - } else {
> - Value &= ~GENET_EXT_RGMII_OOB_ID_MODE_DISABLE;
> - }
> - GenetMmioWrite (Genet, GENET_EXT_RGMII_OOB_CTRL, Value);
> + Value = GenetMmioRead (Genet, GENET_EXT_RGMII_OOB_CTRL);
> + Value &= ~GENET_EXT_RGMII_OOB_OOB_DISABLE;
> + Value |= GENET_EXT_RGMII_OOB_RGMII_LINK;
> + Value |= GENET_EXT_RGMII_OOB_RGMII_MODE_EN;
> + if (Genet->PhyMode == GENET_PHY_MODE_RGMII) {
> + Value |= GENET_EXT_RGMII_OOB_ID_MODE_DISABLE;
> + } else {
> + Value &= ~GENET_EXT_RGMII_OOB_ID_MODE_DISABLE;
> + }
> + GenetMmioWrite (Genet, GENET_EXT_RGMII_OOB_CTRL, Value);
>
> - Value = GenetMmioRead (Genet, GENET_UMAC_CMD);
> - Value &= ~GENET_UMAC_CMD_SPEED;
> - switch (Speed) {
> - case PHY_SPEED_1000:
> - Value |= __SHIFTIN(GENET_UMAC_CMD_SPEED_1000, GENET_UMAC_CMD_SPEED);
> - break;
> - case PHY_SPEED_100:
> - Value |= __SHIFTIN(GENET_UMAC_CMD_SPEED_100, GENET_UMAC_CMD_SPEED);
> - break;
> - default:
> - Value |= __SHIFTIN(GENET_UMAC_CMD_SPEED_10, GENET_UMAC_CMD_SPEED);
> - break;
> - }
> - if (Duplex == PHY_DUPLEX_FULL) {
> - Value &= ~GENET_UMAC_CMD_HD_EN;
> - } else {
> - Value |= GENET_UMAC_CMD_HD_EN;
> - }
> - GenetMmioWrite (Genet, GENET_UMAC_CMD, Value);
> + Value = GenetMmioRead (Genet, GENET_UMAC_CMD);
> + Value &= ~GENET_UMAC_CMD_SPEED;
> + switch (Speed) {
> + case PHY_SPEED_1000:
> + Value |= __SHIFTIN(GENET_UMAC_CMD_SPEED_1000, GENET_UMAC_CMD_SPEED);
> + break;
> + case PHY_SPEED_100:
> + Value |= __SHIFTIN(GENET_UMAC_CMD_SPEED_100, GENET_UMAC_CMD_SPEED);
> + break;
> + default:
> + Value |= __SHIFTIN(GENET_UMAC_CMD_SPEED_10, GENET_UMAC_CMD_SPEED);
> + break;
> + }
> + if (Duplex == PHY_DUPLEX_FULL) {
> + Value &= ~GENET_UMAC_CMD_HD_EN;
> + } else {
> + Value |= GENET_UMAC_CMD_HD_EN;
> + }
> + GenetMmioWrite (Genet, GENET_UMAC_CMD, Value);
> }
>
> /**
> @@ -231,12 +233,12 @@ GenetPhyResetAction (
> BRGPHY_AUXCTL_SHADOW_MISC | BRGPHY_AUXCTL_SHADOW_MISC
> << BRGPHY_AUXCTL_MISC_READ_SHIFT);
> if (EFI_ERROR (Status)) {
> - return Status;
> + return Status;
> }
>
> Status = GenetPhyRead (Priv, Genet->Phy.PhyAddr, BRGPHY_MII_AUXCTL, &Value);
> if (EFI_ERROR (Status)) {
> - return Status;
> + return Status;
> }
>
> Value &= BRGPHY_AUXCTL_MISC_DATA_MASK;
> @@ -252,18 +254,18 @@ GenetPhyResetAction (
> BRGPHY_AUXCTL_MISC_WRITE_EN | BRGPHY_AUXCTL_SHADOW_MISC |
> Value);
> if (EFI_ERROR (Status)) {
> - return Status;
> + return Status;
> }
>
> Status = GenetPhyWrite (Priv, Genet->Phy.PhyAddr, BRGPHY_MII_SHADOW_1C,
> - BRGPHY_SHADOW_1C_CLK_CTRL);
> + BRGPHY_SHADOW_1C_CLK_CTRL);
> if (EFI_ERROR (Status)) {
> - return Status;
> + return Status;
> }
>
> Status = GenetPhyRead (Priv, Genet->Phy.PhyAddr, BRGPHY_MII_SHADOW_1C, &Value);
> if (EFI_ERROR (Status)) {
> - return Status;
> + return Status;
> }
>
> Value &= BRGPHY_SHADOW_1C_DATA_MASK;
> @@ -279,7 +281,7 @@ GenetPhyResetAction (
> BRGPHY_SHADOW_1C_WRITE_EN | BRGPHY_SHADOW_1C_CLK_CTRL |
> Value);
> if (EFI_ERROR (Status)) {
> - return Status;
> + return Status;
> }
>
> return EFI_SUCCESS;
> @@ -293,38 +295,40 @@ GenetPhyResetAction (
> **/
> VOID
> GenetReset (
> - IN GENET_PRIVATE_DATA *Genet
> - )
> + IN GENET_PRIVATE_DATA *Genet
> + )
> {
> - UINT32 Value;
> + UINT32 Value;
>
> - Value = GenetMmioRead (Genet, GENET_SYS_RBUF_FLUSH_CTRL);
> - Value |= GENET_SYS_RBUF_FLUSH_RESET;
> - GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, Value);
> - gBS->Stall (10);
> + Value = GenetMmioRead (Genet, GENET_SYS_RBUF_FLUSH_CTRL);
> + Value |= GENET_SYS_RBUF_FLUSH_RESET;
> + GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, Value);
> + gBS->Stall (10);
>
> - Value &= ~GENET_SYS_RBUF_FLUSH_RESET;
> - GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, Value);
> - gBS->Stall (10);
> + Value &= ~GENET_SYS_RBUF_FLUSH_RESET;
> + GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, Value);
> + gBS->Stall (10);
>
> - GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, 0);
> - gBS->Stall (10);
> + GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, 0);
> + gBS->Stall (10);
>
> - GenetMmioWrite (Genet, GENET_UMAC_CMD, 0);
> - GenetMmioWrite (Genet, GENET_UMAC_CMD, GENET_UMAC_CMD_LCL_LOOP_EN | GENET_UMAC_CMD_SW_RESET);
> - gBS->Stall (10);
> - GenetMmioWrite (Genet, GENET_UMAC_CMD, 0);
> + GenetMmioWrite (Genet, GENET_UMAC_CMD, 0);
> + GenetMmioWrite (Genet, GENET_UMAC_CMD,
> + GENET_UMAC_CMD_LCL_LOOP_EN | GENET_UMAC_CMD_SW_RESET);
> + gBS->Stall (10);
> + GenetMmioWrite (Genet, GENET_UMAC_CMD, 0);
>
> - GenetMmioWrite (Genet, GENET_UMAC_MIB_CTRL, GENET_UMAC_MIB_RESET_RUNT | GENET_UMAC_MIB_RESET_RX | GENET_UMAC_MIB_RESET_TX);
> - GenetMmioWrite (Genet, GENET_UMAC_MIB_CTRL, 0);
> + GenetMmioWrite (Genet, GENET_UMAC_MIB_CTRL,
> + GENET_UMAC_MIB_RESET_RUNT | GENET_UMAC_MIB_RESET_RX | GENET_UMAC_MIB_RESET_TX);
> + GenetMmioWrite (Genet, GENET_UMAC_MIB_CTRL, 0);
>
> - GenetMmioWrite (Genet, GENET_UMAC_MAX_FRAME_LEN, 1536);
> + GenetMmioWrite (Genet, GENET_UMAC_MAX_FRAME_LEN, 1536);
>
> - Value = GenetMmioRead (Genet, GENET_RBUF_CTRL);
> - Value |= GENET_RBUF_ALIGN_2B;
> - GenetMmioWrite (Genet, GENET_RBUF_CTRL, Value);
> + Value = GenetMmioRead (Genet, GENET_RBUF_CTRL);
> + Value |= GENET_RBUF_ALIGN_2B;
> + GenetMmioWrite (Genet, GENET_RBUF_CTRL, Value);
>
> - GenetMmioWrite (Genet, GENET_RBUF_TBUF_SIZE_CTRL, 1);
> + GenetMmioWrite (Genet, GENET_RBUF_TBUF_SIZE_CTRL, 1);
> }
>
> /**
> @@ -337,20 +341,20 @@ GenetReset (
> VOID
> EFIAPI
> GenetSetMacAddress (
> - IN GENET_PRIVATE_DATA *Genet,
> - IN EFI_MAC_ADDRESS *MacAddr
> - )
> + IN GENET_PRIVATE_DATA *Genet,
> + IN EFI_MAC_ADDRESS *MacAddr
> + )
> {
> - UINT32 Value;
> + UINT32 Value;
>
> - Value = MacAddr->Addr[3] |
> - MacAddr->Addr[2] << 8 |
> - MacAddr->Addr[1] << 16 |
> - MacAddr->Addr[0] << 24;
> - GenetMmioWrite (Genet, GENET_UMAC_MAC0, Value);
> - Value = MacAddr->Addr[5] |
> - MacAddr->Addr[4] << 8;
> - GenetMmioWrite (Genet, GENET_UMAC_MAC1, Value);
> + Value = MacAddr->Addr[3] |
> + MacAddr->Addr[2] << 8 |
> + MacAddr->Addr[1] << 16 |
> + MacAddr->Addr[0] << 24;
> + GenetMmioWrite (Genet, GENET_UMAC_MAC0, Value);
> + Value = MacAddr->Addr[5] |
> + MacAddr->Addr[4] << 8;
> + GenetMmioWrite (Genet, GENET_UMAC_MAC1, Value);
> }
>
> /**
> @@ -362,24 +366,24 @@ GenetSetMacAddress (
> **/
> VOID
> GenetSetPhyMode (
> - IN GENET_PRIVATE_DATA *Genet,
> - IN GENET_PHY_MODE PhyMode
> - )
> + IN GENET_PRIVATE_DATA *Genet,
> + IN GENET_PHY_MODE PhyMode
> + )
> {
> - UINT32 Value;
> + UINT32 Value;
>
> - switch (PhyMode) {
> - case GENET_PHY_MODE_RGMII:
> - case GENET_PHY_MODE_RGMII_RXID:
> - case GENET_PHY_MODE_RGMII_TXID:
> - case GENET_PHY_MODE_RGMII_ID:
> - Value = GENET_SYS_PORT_MODE_EXT_GPHY;
> - break;
> - default:
> - Value = 0;
> - break;
> - }
> - GenetMmioWrite (Genet, GENET_SYS_PORT_CTRL, Value);
> + switch (PhyMode) {
> + case GENET_PHY_MODE_RGMII:
> + case GENET_PHY_MODE_RGMII_RXID:
> + case GENET_PHY_MODE_RGMII_TXID:
> + case GENET_PHY_MODE_RGMII_ID:
> + Value = GENET_SYS_PORT_MODE_EXT_GPHY;
> + break;
> + default:
> + Value = 0;
> + break;
> + }
> + GenetMmioWrite (Genet, GENET_SYS_PORT_CTRL, Value);
> }
>
> /**
> @@ -390,31 +394,32 @@ GenetSetPhyMode (
> **/
> VOID
> GenetEnableTxRx (
> - IN GENET_PRIVATE_DATA *Genet
> - )
> + IN GENET_PRIVATE_DATA *Genet
> + )
> {
> - UINT32 Value;
> - UINT8 Qid = GENET_DMA_DEFAULT_QUEUE;
> + UINT32 Value;
> + UINT8 Qid = GENET_DMA_DEFAULT_QUEUE;
>
> - // Start TX DMA on default queue
> - Value = GenetMmioRead (Genet, GENET_TX_DMA_CTRL);
> - Value |= GENET_TX_DMA_CTRL_EN;
> - Value |= GENET_TX_DMA_CTRL_RBUF_EN(Qid);
> - GenetMmioWrite (Genet, GENET_TX_DMA_CTRL, Value);
> + // Start TX DMA on default queue
> + Value = GenetMmioRead (Genet, GENET_TX_DMA_CTRL);
> + Value |= GENET_TX_DMA_CTRL_EN;
> + Value |= GENET_TX_DMA_CTRL_RBUF_EN (Qid);
> + GenetMmioWrite (Genet, GENET_TX_DMA_CTRL, Value);
>
> - // Start RX DMA on default queue
> - Value = GenetMmioRead (Genet, GENET_RX_DMA_CTRL);
> - Value |= GENET_RX_DMA_CTRL_EN;
> - Value |= GENET_RX_DMA_CTRL_RBUF_EN(Qid);
> - GenetMmioWrite (Genet, GENET_RX_DMA_CTRL, Value);
> + // Start RX DMA on default queue
> + Value = GenetMmioRead (Genet, GENET_RX_DMA_CTRL);
> + Value |= GENET_RX_DMA_CTRL_EN;
> + Value |= GENET_RX_DMA_CTRL_RBUF_EN (Qid);
> + GenetMmioWrite (Genet, GENET_RX_DMA_CTRL, Value);
>
> - // Enable transmitter and receiver
> - Value = GenetMmioRead (Genet, GENET_UMAC_CMD);
> - Value |= GENET_UMAC_CMD_TXEN | GENET_UMAC_CMD_RXEN;
> - GenetMmioWrite (Genet, GENET_UMAC_CMD, Value);
> + // Enable transmitter and receiver
> + Value = GenetMmioRead (Genet, GENET_UMAC_CMD);
> + Value |= GENET_UMAC_CMD_TXEN | GENET_UMAC_CMD_RXEN;
> + GenetMmioWrite (Genet, GENET_UMAC_CMD, Value);
>
> - // Enable interrupts
> - GenetMmioWrite (Genet, GENET_INTRL2_CPU_CLEAR_MASK, GENET_IRQ_TXDMA_DONE | GENET_IRQ_RXDMA_DONE);
> + // Enable interrupts
> + GenetMmioWrite (Genet, GENET_INTRL2_CPU_CLEAR_MASK,
> + GENET_IRQ_TXDMA_DONE | GENET_IRQ_RXDMA_DONE);
> }
>
> /**
> @@ -425,42 +430,42 @@ GenetEnableTxRx (
> **/
> VOID
> GenetDisableTxRx (
> - IN GENET_PRIVATE_DATA *Genet
> - )
> + IN GENET_PRIVATE_DATA *Genet
> + )
> {
> - UINT32 Value;
> - UINT8 Qid = GENET_DMA_DEFAULT_QUEUE;
> + UINT32 Value;
> + UINT8 Qid = GENET_DMA_DEFAULT_QUEUE;
>
> - // Disable interrupts
> - GenetMmioWrite (Genet, GENET_INTRL2_CPU_SET_MASK, 0xFFFFFFFF);
> - GenetMmioWrite (Genet, GENET_INTRL2_CPU_CLEAR, 0xFFFFFFFF);
> + // Disable interrupts
> + GenetMmioWrite (Genet, GENET_INTRL2_CPU_SET_MASK, 0xFFFFFFFF);
> + GenetMmioWrite (Genet, GENET_INTRL2_CPU_CLEAR, 0xFFFFFFFF);
>
> - // Disable receiver
> - Value = GenetMmioRead (Genet, GENET_UMAC_CMD);
> - Value &= ~GENET_UMAC_CMD_RXEN;
> - GenetMmioWrite (Genet, GENET_UMAC_CMD, Value);
> + // Disable receiver
> + Value = GenetMmioRead (Genet, GENET_UMAC_CMD);
> + Value &= ~GENET_UMAC_CMD_RXEN;
> + GenetMmioWrite (Genet, GENET_UMAC_CMD, Value);
>
> - // Stop RX DMA
> - Value = GenetMmioRead (Genet, GENET_RX_DMA_CTRL);
> - Value &= ~GENET_RX_DMA_CTRL_EN;
> - Value &= ~GENET_RX_DMA_CTRL_RBUF_EN(Qid);
> - GenetMmioWrite (Genet, GENET_RX_DMA_CTRL, Value);
> + // Stop RX DMA
> + Value = GenetMmioRead (Genet, GENET_RX_DMA_CTRL);
> + Value &= ~GENET_RX_DMA_CTRL_EN;
> + Value &= ~GENET_RX_DMA_CTRL_RBUF_EN (Qid);
> + GenetMmioWrite (Genet, GENET_RX_DMA_CTRL, Value);
>
> - // Stop TX DMA
> - Value = GenetMmioRead (Genet, GENET_TX_DMA_CTRL);
> - Value &= ~GENET_TX_DMA_CTRL_EN;
> - Value &= ~GENET_TX_DMA_CTRL_RBUF_EN(Qid);
> - GenetMmioWrite (Genet, GENET_TX_DMA_CTRL, Value);
> + // Stop TX DMA
> + Value = GenetMmioRead (Genet, GENET_TX_DMA_CTRL);
> + Value &= ~GENET_TX_DMA_CTRL_EN;
> + Value &= ~GENET_TX_DMA_CTRL_RBUF_EN (Qid);
> + GenetMmioWrite (Genet, GENET_TX_DMA_CTRL, Value);
>
> - // Flush data in the TX FIFO
> - GenetMmioWrite (Genet, GENET_UMAC_TX_FLUSH, 1);
> - gBS->Stall (10);
> - GenetMmioWrite (Genet, GENET_UMAC_TX_FLUSH, 0);
> + // Flush data in the TX FIFO
> + GenetMmioWrite (Genet, GENET_UMAC_TX_FLUSH, 1);
> + gBS->Stall (10);
> + GenetMmioWrite (Genet, GENET_UMAC_TX_FLUSH, 0);
>
> - // Disable transmitter
> - Value = GenetMmioRead (Genet, GENET_UMAC_CMD);
> - Value &= ~GENET_UMAC_CMD_TXEN;
> - GenetMmioWrite (Genet, GENET_UMAC_CMD, Value);
> + // Disable transmitter
> + Value = GenetMmioRead (Genet, GENET_UMAC_CMD);
> + Value &= ~GENET_UMAC_CMD_TXEN;
> + GenetMmioWrite (Genet, GENET_UMAC_CMD, Value);
> }
>
> /**
> @@ -472,19 +477,19 @@ GenetDisableTxRx (
> **/
> VOID
> GenetSetPromisc (
> - IN GENET_PRIVATE_DATA *Genet,
> - IN BOOLEAN Enable
> - )
> + IN GENET_PRIVATE_DATA *Genet,
> + IN BOOLEAN Enable
> + )
> {
> - UINT32 Value;
> + UINT32 Value;
>
> - Value = GenetMmioRead (Genet, GENET_UMAC_CMD);
> - if (Enable) {
> - Value |= GENET_UMAC_CMD_PROMISC;
> - } else {
> - Value &= ~GENET_UMAC_CMD_PROMISC;
> - }
> - GenetMmioWrite (Genet, GENET_UMAC_CMD, Value);
> + Value = GenetMmioRead (Genet, GENET_UMAC_CMD);
> + if (Enable) {
> + Value |= GENET_UMAC_CMD_PROMISC;
> + } else {
> + Value &= ~GENET_UMAC_CMD_PROMISC;
> + }
> + GenetMmioWrite (Genet, GENET_UMAC_CMD, Value);
> }
>
> /**
> @@ -495,63 +500,63 @@ GenetSetPromisc (
> **/
> VOID
> GenetDmaInitRings (
> - IN GENET_PRIVATE_DATA *Genet
> - )
> + IN GENET_PRIVATE_DATA *Genet
> + )
> {
> - UINT8 Qid = GENET_DMA_DEFAULT_QUEUE;
> + UINT8 Qid = GENET_DMA_DEFAULT_QUEUE;
>
> - Genet->TxQueued = 0;
> - Genet->TxNext = 0;
> - Genet->TxConsIndex = 0;
> - Genet->TxProdIndex = 0;
> + Genet->TxQueued = 0;
> + Genet->TxNext = 0;
> + Genet->TxConsIndex = 0;
> + Genet->TxProdIndex = 0;
>
> - Genet->RxConsIndex = 0;
> - Genet->RxProdIndex = 0;
> + Genet->RxConsIndex = 0;
> + Genet->RxProdIndex = 0;
>
> - // Configure TX queue
> - GenetMmioWrite (Genet, GENET_TX_SCB_BURST_SIZE, 0x08);
> - GenetMmioWrite (Genet, GENET_TX_DMA_READ_PTR_LO(Qid), 0);
> - GenetMmioWrite (Genet, GENET_TX_DMA_READ_PTR_HI(Qid), 0);
> - GenetMmioWrite (Genet, GENET_TX_DMA_CONS_INDEX(Qid), 0);
> - GenetMmioWrite (Genet, GENET_TX_DMA_PROD_INDEX(Qid), 0);
> - GenetMmioWrite (Genet, GENET_TX_DMA_RING_BUF_SIZE(Qid),
> - __SHIFTIN(GENET_DMA_DESC_COUNT, GENET_TX_DMA_RING_BUF_SIZE_DESC_COUNT) |
> - __SHIFTIN(GENET_MAX_PACKET_SIZE, GENET_TX_DMA_RING_BUF_SIZE_BUF_LENGTH));
> - GenetMmioWrite (Genet, GENET_TX_DMA_START_ADDR_LO(Qid), 0);
> - GenetMmioWrite (Genet, GENET_TX_DMA_START_ADDR_HI(Qid), 0);
> - GenetMmioWrite (Genet, GENET_TX_DMA_END_ADDR_LO(Qid),
> - GENET_DMA_DESC_COUNT * GENET_DMA_DESC_SIZE / 4 - 1);
> - GenetMmioWrite (Genet, GENET_TX_DMA_END_ADDR_HI(Qid), 0);
> - GenetMmioWrite (Genet, GENET_TX_DMA_MBUF_DONE_THRES(Qid), 1);
> - GenetMmioWrite (Genet, GENET_TX_DMA_FLOW_PERIOD(Qid), 0);
> - GenetMmioWrite (Genet, GENET_TX_DMA_WRITE_PTR_LO(Qid), 0);
> - GenetMmioWrite (Genet, GENET_TX_DMA_WRITE_PTR_HI(Qid), 0);
> + // Configure TX queue
> + GenetMmioWrite (Genet, GENET_TX_SCB_BURST_SIZE, 0x08);
> + GenetMmioWrite (Genet, GENET_TX_DMA_READ_PTR_LO (Qid), 0);
> + GenetMmioWrite (Genet, GENET_TX_DMA_READ_PTR_HI (Qid), 0);
> + GenetMmioWrite (Genet, GENET_TX_DMA_CONS_INDEX (Qid), 0);
> + GenetMmioWrite (Genet, GENET_TX_DMA_PROD_INDEX (Qid), 0);
> + GenetMmioWrite (Genet, GENET_TX_DMA_RING_BUF_SIZE (Qid),
> + __SHIFTIN(GENET_DMA_DESC_COUNT, GENET_TX_DMA_RING_BUF_SIZE_DESC_COUNT) |
> + __SHIFTIN(GENET_MAX_PACKET_SIZE, GENET_TX_DMA_RING_BUF_SIZE_BUF_LENGTH));
> + GenetMmioWrite (Genet, GENET_TX_DMA_START_ADDR_LO (Qid), 0);
> + GenetMmioWrite (Genet, GENET_TX_DMA_START_ADDR_HI (Qid), 0);
> + GenetMmioWrite (Genet, GENET_TX_DMA_END_ADDR_LO (Qid),
> + GENET_DMA_DESC_COUNT * GENET_DMA_DESC_SIZE / 4 - 1);
> + GenetMmioWrite (Genet, GENET_TX_DMA_END_ADDR_HI (Qid), 0);
> + GenetMmioWrite (Genet, GENET_TX_DMA_MBUF_DONE_THRES (Qid), 1);
> + GenetMmioWrite (Genet, GENET_TX_DMA_FLOW_PERIOD (Qid), 0);
> + GenetMmioWrite (Genet, GENET_TX_DMA_WRITE_PTR_LO (Qid), 0);
> + GenetMmioWrite (Genet, GENET_TX_DMA_WRITE_PTR_HI (Qid), 0);
>
> - // Enable TX queue
> - GenetMmioWrite (Genet, GENET_TX_DMA_RING_CFG, (1U << Qid));
> + // Enable TX queue
> + GenetMmioWrite (Genet, GENET_TX_DMA_RING_CFG, (1U << Qid));
>
> - // Configure RX queue
> - GenetMmioWrite (Genet, GENET_RX_SCB_BURST_SIZE, 0x08);
> - GenetMmioWrite (Genet, GENET_RX_DMA_WRITE_PTR_LO(Qid), 0);
> - GenetMmioWrite (Genet, GENET_RX_DMA_WRITE_PTR_HI(Qid), 0);
> - GenetMmioWrite (Genet, GENET_RX_DMA_PROD_INDEX(Qid), 0);
> - GenetMmioWrite (Genet, GENET_RX_DMA_CONS_INDEX(Qid), 0);
> - GenetMmioWrite (Genet, GENET_RX_DMA_RING_BUF_SIZE(Qid),
> - __SHIFTIN(GENET_DMA_DESC_COUNT, GENET_RX_DMA_RING_BUF_SIZE_DESC_COUNT) |
> - __SHIFTIN(GENET_MAX_PACKET_SIZE, GENET_RX_DMA_RING_BUF_SIZE_BUF_LENGTH));
> - GenetMmioWrite (Genet, GENET_RX_DMA_START_ADDR_LO(Qid), 0);
> - GenetMmioWrite (Genet, GENET_RX_DMA_START_ADDR_HI(Qid), 0);
> - GenetMmioWrite (Genet, GENET_RX_DMA_END_ADDR_LO(Qid),
> - GENET_DMA_DESC_COUNT * GENET_DMA_DESC_SIZE / 4 - 1);
> - GenetMmioWrite (Genet, GENET_RX_DMA_END_ADDR_HI(Qid), 0);
> - GenetMmioWrite (Genet, GENET_RX_DMA_XON_XOFF_THRES(Qid),
> - __SHIFTIN(5, GENET_RX_DMA_XON_XOFF_THRES_LO) |
> - __SHIFTIN(GENET_DMA_DESC_COUNT >> 4, GENET_RX_DMA_XON_XOFF_THRES_HI));
> - GenetMmioWrite (Genet, GENET_RX_DMA_READ_PTR_LO(Qid), 0);
> - GenetMmioWrite (Genet, GENET_RX_DMA_READ_PTR_HI(Qid), 0);
> + // Configure RX queue
> + GenetMmioWrite (Genet, GENET_RX_SCB_BURST_SIZE, 0x08);
> + GenetMmioWrite (Genet, GENET_RX_DMA_WRITE_PTR_LO (Qid), 0);
> + GenetMmioWrite (Genet, GENET_RX_DMA_WRITE_PTR_HI (Qid), 0);
> + GenetMmioWrite (Genet, GENET_RX_DMA_PROD_INDEX (Qid), 0);
> + GenetMmioWrite (Genet, GENET_RX_DMA_CONS_INDEX (Qid), 0);
> + GenetMmioWrite (Genet, GENET_RX_DMA_RING_BUF_SIZE (Qid),
> + __SHIFTIN(GENET_DMA_DESC_COUNT, GENET_RX_DMA_RING_BUF_SIZE_DESC_COUNT) |
> + __SHIFTIN(GENET_MAX_PACKET_SIZE, GENET_RX_DMA_RING_BUF_SIZE_BUF_LENGTH));
> + GenetMmioWrite (Genet, GENET_RX_DMA_START_ADDR_LO (Qid), 0);
> + GenetMmioWrite (Genet, GENET_RX_DMA_START_ADDR_HI (Qid), 0);
> + GenetMmioWrite (Genet, GENET_RX_DMA_END_ADDR_LO (Qid),
> + GENET_DMA_DESC_COUNT * GENET_DMA_DESC_SIZE / 4 - 1);
> + GenetMmioWrite (Genet, GENET_RX_DMA_END_ADDR_HI (Qid), 0);
> + GenetMmioWrite (Genet, GENET_RX_DMA_XON_XOFF_THRES (Qid),
> + __SHIFTIN(5, GENET_RX_DMA_XON_XOFF_THRES_LO) |
> + __SHIFTIN(GENET_DMA_DESC_COUNT >> 4, GENET_RX_DMA_XON_XOFF_THRES_HI));
> + GenetMmioWrite (Genet, GENET_RX_DMA_READ_PTR_LO (Qid), 0);
> + GenetMmioWrite (Genet, GENET_RX_DMA_READ_PTR_HI (Qid), 0);
>
> - // Enable RX queue
> - GenetMmioWrite (Genet, GENET_RX_DMA_RING_CFG, (1U << Qid));
> + // Enable RX queue
> + GenetMmioWrite (Genet, GENET_RX_DMA_RING_CFG, (1U << Qid));
> }
>
> /**
> @@ -564,22 +569,22 @@ GenetDmaInitRings (
> **/
> EFI_STATUS
> GenetDmaAlloc (
> - IN GENET_PRIVATE_DATA *Genet
> - )
> + IN GENET_PRIVATE_DATA *Genet
> + )
> {
> - EFI_STATUS Status;
> - UINTN n;
> + EFI_STATUS Status;
> + UINTN Idx;
>
> - for (n = 0; n < GENET_DMA_DESC_COUNT; n++) {
> - Status = DmaAllocateBuffer (EfiBootServicesData, EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE), (VOID **)&Genet->RxBuffer[n]);
> - if (EFI_ERROR (Status)) {
> - DEBUG ((DEBUG_ERROR, "GenetDmaAlloc: Failed to allocate RX buffer: %r\n", Status));
> - GenetDmaFree (Genet);
> - return Status;
> - }
> + for (Idx = 0; Idx < GENET_DMA_DESC_COUNT; Idx++) {
> + Status = DmaAllocateBuffer (EfiBootServicesData, EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE), (VOID **)&Genet->RxBuffer[Idx]);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "%a: Failed to allocate RX buffer: %r\n", __FUNCTION__, Status));
> + GenetDmaFree (Genet);
> + return Status;
> }
> + }
>
> - return EFI_SUCCESS;
> + return EFI_SUCCESS;
> }
>
> /**
> @@ -594,33 +599,34 @@ GenetDmaAlloc (
> **/
> EFI_STATUS
> GenetDmaMapRxDescriptor (
> - IN GENET_PRIVATE_DATA * Genet,
> - IN UINT8 DescIndex
> - )
> + IN GENET_PRIVATE_DATA * Genet,
> + IN UINT8 DescIndex
> + )
> {
> - EFI_STATUS Status;
> - UINTN DmaNumberOfBytes;
> + EFI_STATUS Status;
> + UINTN DmaNumberOfBytes;
>
> - ASSERT (Genet->RxBufferMap[DescIndex].Mapping == NULL);
> - ASSERT (Genet->RxBuffer[DescIndex] != NULL);
> + ASSERT (Genet->RxBufferMap[DescIndex].Mapping == NULL);
> + ASSERT (Genet->RxBuffer[DescIndex] != NULL);
>
> - DmaNumberOfBytes = GENET_MAX_PACKET_SIZE;
> - Status = DmaMap (MapOperationBusMasterWrite,
> - (VOID *)Genet->RxBuffer[DescIndex],
> - &DmaNumberOfBytes,
> - &Genet->RxBufferMap[DescIndex].Pa,
> - &Genet->RxBufferMap[DescIndex].Mapping);
> - if (EFI_ERROR (Status)) {
> - DEBUG ((DEBUG_ERROR, "GenetDmaMapRxDescriptor: Failed to map RX buffer: %r\n", Status));
> - return Status;
> - }
> + DmaNumberOfBytes = GENET_MAX_PACKET_SIZE;
> + Status = DmaMap (MapOperationBusMasterWrite,
> + (VOID *)Genet->RxBuffer[DescIndex],
> + &DmaNumberOfBytes,
> + &Genet->RxBufferMap[DescIndex].PhysAddress,
> + &Genet->RxBufferMap[DescIndex].Mapping);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "%a: Failed to map RX buffer: %r\n",
> + __FUNCTION__, Status));
> + return Status;
> + }
>
> - //DEBUG ((DEBUG_INFO, "GenetDmaMapRxDescriptor: Desc 0x%X mapped to 0x%X\n", DescIndex, Genet->RxBufferMap[DescIndex].Pa));
> + GenetMmioWrite (Genet, GENET_RX_DESC_ADDRESS_LO (DescIndex),
> + Genet->RxBufferMap[DescIndex].PhysAddress & 0xFFFFFFFF);
> + GenetMmioWrite (Genet, GENET_RX_DESC_ADDRESS_HI (DescIndex),
> + (Genet->RxBufferMap[DescIndex].PhysAddress >> 32) & 0xFFFFFFFF);
>
> - GenetMmioWrite (Genet, GENET_RX_DESC_ADDRESS_LO (DescIndex), Genet->RxBufferMap[DescIndex].Pa & 0xFFFFFFFF);
> - GenetMmioWrite (Genet, GENET_RX_DESC_ADDRESS_HI (DescIndex), (Genet->RxBufferMap[DescIndex].Pa >> 32) & 0xFFFFFFFF);
> -
> - return EFI_SUCCESS;
> + return EFI_SUCCESS;
> }
>
> /**
> @@ -632,14 +638,14 @@ GenetDmaMapRxDescriptor (
> **/
> VOID
> GenetDmaUnmapRxDescriptor (
> - IN GENET_PRIVATE_DATA * Genet,
> - IN UINT8 DescIndex
> - )
> + IN GENET_PRIVATE_DATA * Genet,
> + IN UINT8 DescIndex
> + )
> {
> - if (Genet->RxBufferMap[DescIndex].Mapping != NULL) {
> - DmaUnmap (Genet->RxBufferMap[DescIndex].Mapping);
> - Genet->RxBufferMap[DescIndex].Mapping = NULL;
> - }
> + if (Genet->RxBufferMap[DescIndex].Mapping != NULL) {
> + DmaUnmap (Genet->RxBufferMap[DescIndex].Mapping);
> + Genet->RxBufferMap[DescIndex].Mapping = NULL;
> + }
> }
>
> /**
> @@ -651,19 +657,20 @@ GenetDmaUnmapRxDescriptor (
> **/
> VOID
> GenetDmaFree (
> - IN GENET_PRIVATE_DATA *Genet
> - )
> + IN GENET_PRIVATE_DATA *Genet
> + )
> {
> - UINTN n;
> + UINTN Idx;
>
> - for (n = 0; n < GENET_DMA_DESC_COUNT; n++) {
> - GenetDmaUnmapRxDescriptor (Genet, n);
> + for (Idx = 0; Idx < GENET_DMA_DESC_COUNT; Idx++) {
> + GenetDmaUnmapRxDescriptor (Genet, Idx);
>
> - if (Genet->RxBuffer[n] != NULL) {
> - DmaFreeBuffer (EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE), Genet->RxBuffer[n]);
> - Genet->RxBuffer[n] = NULL;
> - }
> + if (Genet->RxBuffer[Idx] != NULL) {
> + DmaFreeBuffer (EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE),
> + Genet->RxBuffer[Idx]);
> + Genet->RxBuffer[Idx] = NULL;
> }
> + }
> }
>
> /**
> @@ -677,26 +684,29 @@ GenetDmaFree (
> **/
> VOID
> GenetDmaTriggerTx (
> - IN GENET_PRIVATE_DATA * Genet,
> - IN UINT8 DescIndex,
> - IN EFI_PHYSICAL_ADDRESS PhysAddr,
> - IN UINTN NumberOfBytes
> - )
> + IN GENET_PRIVATE_DATA * Genet,
> + IN UINT8 DescIndex,
> + IN EFI_PHYSICAL_ADDRESS PhysAddr,
> + IN UINTN NumberOfBytes
> + )
> {
> - UINT32 DescStatus;
> - UINT8 Qid = GENET_DMA_DEFAULT_QUEUE;
> + UINT32 DescStatus;
> + UINT8 Qid = GENET_DMA_DEFAULT_QUEUE;
>
> - DescStatus = GENET_TX_DESC_STATUS_SOP |
> - GENET_TX_DESC_STATUS_EOP |
> - GENET_TX_DESC_STATUS_CRC |
> - GENET_TX_DESC_STATUS_QTAG |
> - __SHIFTIN(NumberOfBytes, GENET_TX_DESC_STATUS_BUFLEN);
> + DescStatus = GENET_TX_DESC_STATUS_SOP |
> + GENET_TX_DESC_STATUS_EOP |
> + GENET_TX_DESC_STATUS_CRC |
> + GENET_TX_DESC_STATUS_QTAG |
> + __SHIFTIN(NumberOfBytes, GENET_TX_DESC_STATUS_BUFLEN);
>
> - GenetMmioWrite (Genet, GENET_TX_DESC_ADDRESS_LO(DescIndex), PhysAddr & 0xFFFFFFFF);
> - GenetMmioWrite (Genet, GENET_TX_DESC_ADDRESS_HI(DescIndex), (PhysAddr >> 32) & 0xFFFFFFFF);
> - GenetMmioWrite (Genet, GENET_TX_DESC_STATUS(DescIndex), DescStatus);
> + GenetMmioWrite (Genet, GENET_TX_DESC_ADDRESS_LO (DescIndex),
> + PhysAddr & 0xFFFFFFFF);
> + GenetMmioWrite (Genet, GENET_TX_DESC_ADDRESS_HI (DescIndex),
> + (PhysAddr >> 32) & 0xFFFFFFFF);
> + GenetMmioWrite (Genet, GENET_TX_DESC_STATUS (DescIndex), DescStatus);
>
> - GenetMmioWrite (Genet, GENET_TX_DMA_PROD_INDEX (Qid), (DescIndex + 1) & 0xFFFF);
> + GenetMmioWrite (Genet, GENET_TX_DMA_PROD_INDEX (Qid),
> + (DescIndex + 1) & 0xFFFF);
> }
>
> /**
> @@ -708,24 +718,24 @@ GenetDmaTriggerTx (
> **/
> VOID
> GenetTxIntr (
> - IN GENET_PRIVATE_DATA *Genet,
> - OUT VOID **TxBuf
> - )
> + IN GENET_PRIVATE_DATA *Genet,
> + OUT VOID **TxBuf
> + )
> {
> - UINT32 ConsIndex, Total;
> - UINT8 Qid = GENET_DMA_DEFAULT_QUEUE;
> + UINT32 ConsIndex, Total;
> + UINT8 Qid = GENET_DMA_DEFAULT_QUEUE;
>
> - ConsIndex = GenetMmioRead (Genet, GENET_TX_DMA_CONS_INDEX (Qid)) & 0xFFFF;
> + ConsIndex = GenetMmioRead (Genet, GENET_TX_DMA_CONS_INDEX (Qid)) & 0xFFFF;
>
> - Total = (ConsIndex - Genet->TxConsIndex) & 0xFFFF;
> - if (Genet->TxQueued > 0 && Total > 0) {
> - *TxBuf = Genet->TxBuffer[Genet->TxNext];
> - Genet->TxQueued--;
> - Genet->TxNext = (Genet->TxNext + 1) % GENET_DMA_DESC_COUNT;
> - Genet->TxConsIndex++;
> - } else {
> - *TxBuf = NULL;
> - }
> + Total = (ConsIndex - Genet->TxConsIndex) & 0xFFFF;
> + if (Genet->TxQueued > 0 && Total > 0) {
> + *TxBuf = Genet->TxBuffer[Genet->TxNext];
> + Genet->TxQueued--;
> + Genet->TxNext = (Genet->TxNext + 1) % GENET_DMA_DESC_COUNT;
> + Genet->TxConsIndex++;
> + } else {
> + *TxBuf = NULL;
> + }
> }
>
> /**
> @@ -742,32 +752,30 @@ GenetTxIntr (
> **/
> EFI_STATUS
> GenetRxIntr (
> - IN GENET_PRIVATE_DATA *Genet,
> - OUT UINT8 *DescIndex,
> - OUT UINTN *FrameLength
> - )
> + IN GENET_PRIVATE_DATA *Genet,
> + OUT UINT8 *DescIndex,
> + OUT UINTN *FrameLength
> + )
> {
> - EFI_STATUS Status;
> - UINT32 ProdIndex, Total;
> - UINT32 DescStatus;
> - UINT8 Qid = GENET_DMA_DEFAULT_QUEUE;
> + EFI_STATUS Status;
> + UINT32 ProdIndex, Total;
> + UINT32 DescStatus;
> + UINT8 Qid = GENET_DMA_DEFAULT_QUEUE;
>
> - ProdIndex = GenetMmioRead (Genet, GENET_RX_DMA_PROD_INDEX (Qid)) & 0xFFFF;
> + ProdIndex = GenetMmioRead (Genet, GENET_RX_DMA_PROD_INDEX (Qid)) & 0xFFFF;
>
> - Total = (ProdIndex - Genet->RxConsIndex) & 0xFFFF;
> - if (Total > 0) {
> - *DescIndex = Genet->RxConsIndex % GENET_DMA_DESC_COUNT;
> - DescStatus = GenetMmioRead (Genet, GENET_RX_DESC_STATUS (*DescIndex));
> - *FrameLength = __SHIFTOUT (DescStatus, GENET_RX_DESC_STATUS_BUFLEN);
> + Total = (ProdIndex - Genet->RxConsIndex) & 0xFFFF;
> + if (Total > 0) {
> + *DescIndex = Genet->RxConsIndex % GENET_DMA_DESC_COUNT;
> + DescStatus = GenetMmioRead (Genet, GENET_RX_DESC_STATUS (*DescIndex));
> + *FrameLength = __SHIFTOUT (DescStatus, GENET_RX_DESC_STATUS_BUFLEN);
>
> - //DEBUG ((DEBUG_INFO, "GenetRxIntr: DescIndex=0x%X FrameLength=0x%X\n", *DescIndex, *FrameLength));
> + Genet->RxConsIndex = (Genet->RxConsIndex + 1) & 0xFFFF;
> + GenetMmioWrite (Genet, GENET_RX_DMA_CONS_INDEX (Qid), Genet->RxConsIndex);
> + Status = EFI_SUCCESS;
> + } else {
> + Status = EFI_NOT_READY;
> + }
>
> - Genet->RxConsIndex = (Genet->RxConsIndex + 1) & 0xFFFF;
> - GenetMmioWrite (Genet, GENET_RX_DMA_CONS_INDEX (Qid), Genet->RxConsIndex);
> - Status = EFI_SUCCESS;
> - } else {
> - Status = EFI_NOT_READY;
> - }
> -
> - return Status;
> + return Status;
> }
> diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c
> index bf28448445d1..951495127ce9 100644
> --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c
> +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c
> @@ -31,7 +31,7 @@ GenetSimpleNetworkStart (
> IN EFI_SIMPLE_NETWORK_PROTOCOL *This
> )
> {
> - GENET_PRIVATE_DATA *Genet;
> + GENET_PRIVATE_DATA *Genet;
>
> if (This == NULL) {
> return EFI_INVALID_PARAMETER;
> @@ -67,7 +67,7 @@ GenetSimpleNetworkStop (
> IN EFI_SIMPLE_NETWORK_PROTOCOL *This
> )
> {
> - GENET_PRIVATE_DATA *Genet;
> + GENET_PRIVATE_DATA *Genet;
>
> if (This == NULL) {
> return EFI_INVALID_PARAMETER;
> @@ -194,8 +194,8 @@ GenetSimpleNetworkReset (
> IN BOOLEAN ExtendedVerification
> )
> {
> - GENET_PRIVATE_DATA *Genet;
> - EFI_STATUS Status;
> + GENET_PRIVATE_DATA *Genet;
> + EFI_STATUS Status;
>
> if (This == NULL) {
> return EFI_INVALID_PARAMETER;
> @@ -299,7 +299,7 @@ GenetSimpleNetworkReceiveFilters (
> IN EFI_MAC_ADDRESS *MCastFilter OPTIONAL
> )
> {
> - GENET_PRIVATE_DATA *Genet;
> + GENET_PRIVATE_DATA *Genet;
>
> if (This == NULL) {
> return EFI_INVALID_PARAMETER;
> @@ -347,7 +347,7 @@ GenetSimpleNetworkStationAddress (
> IN EFI_MAC_ADDRESS *New OPTIONAL
> )
> {
> - GENET_PRIVATE_DATA *Genet;
> + GENET_PRIVATE_DATA *Genet;
>
> if (This == NULL || This->Mode == NULL) {
> return EFI_INVALID_PARAMETER;
> @@ -480,8 +480,8 @@ GenetSimpleNetworkGetStatus (
> OUT VOID **TxBuf OPTIONAL
> )
> {
> - GENET_PRIVATE_DATA *Genet;
> - EFI_STATUS Status;
> + GENET_PRIVATE_DATA *Genet;
> + EFI_STATUS Status;
>
> if (This == NULL) {
> return EFI_INVALID_PARAMETER;
> @@ -555,17 +555,17 @@ GenetSimpleNetworkTransmit (
> IN UINT16 *Protocol OPTIONAL
> )
> {
> - GENET_PRIVATE_DATA *Genet;
> - EFI_STATUS Status;
> - UINT8 *Frame = Buffer;
> - UINT8 Desc;
> - PHYSICAL_ADDRESS DmaDeviceAddress;
> - UINTN DmaNumberOfBytes;
> - VOID *DmaMapping;
> + GENET_PRIVATE_DATA *Genet;
> + EFI_STATUS Status;
> + UINT8 *Frame = Buffer;
> + UINT8 Desc;
> + PHYSICAL_ADDRESS DmaDeviceAddress;
> + UINTN DmaNumberOfBytes;
> + VOID *DmaMapping;
>
> if (This == NULL || Buffer == NULL) {
> - DEBUG ((DEBUG_ERROR,
> - "GenetSimpleNetworkTransmit: Invalid parameter (missing handle or buffer)\n"));
> + DEBUG ((DEBUG_ERROR, "%a: Invalid parameter (missing handle or buffer)\n",
> + __FUNCTION__));
> return EFI_INVALID_PARAMETER;
> }
>
> @@ -587,32 +587,33 @@ GenetSimpleNetworkTransmit (
> if (HeaderSize != 0) {
> if (HeaderSize != Genet->SnpMode.MediaHeaderSize) {
> DEBUG ((DEBUG_ERROR,
> - "GenetSimpleNetworkTransmit: Invalid parameter (header size mismatch; HeaderSize 0x%X, SnpMode.MediaHeaderSize 0x%X))\n", HeaderSize, Genet->SnpMode.MediaHeaderSize));
> + "%a: Invalid parameter (header size mismatch; HeaderSize 0x%X, SnpMode.MediaHeaderSize 0x%X))\n",
> + __FUNCTION__, HeaderSize, Genet->SnpMode.MediaHeaderSize));
> return EFI_INVALID_PARAMETER;
> }
> if (DestAddr == NULL || Protocol == NULL) {
> DEBUG ((DEBUG_ERROR,
> - "GenetSimpleNetworkTransmit: Invalid parameter (dest addr or protocol missing)\n"));
> + "%a: Invalid parameter (dest addr or protocol missing)\n",
> + __FUNCTION__));
> return EFI_INVALID_PARAMETER;
> }
> }
>
> if (BufferSize < Genet->SnpMode.MediaHeaderSize) {
> - DEBUG ((DEBUG_ERROR, "GenetSimpleNetworkTransmit: Buffer too small\n"));
> + DEBUG ((DEBUG_ERROR, "%a: Buffer too small\n", __FUNCTION__));
> return EFI_BUFFER_TOO_SMALL;
> }
>
> Status = EfiAcquireLockOrFail (&Genet->Lock);
> if (EFI_ERROR (Status)) {
> - DEBUG ((DEBUG_ERROR,
> - "GenetSimpleNetworkTransmit: Couldn't get lock: %r\n", Status));
> + DEBUG ((DEBUG_ERROR, "%a: Couldn't get lock: %r\n", __FUNCTION__, Status));
> return EFI_ACCESS_DENIED;
> }
>
> if (Genet->TxQueued == GENET_DMA_DESC_COUNT - 1) {
> EfiReleaseLock (&Genet->Lock);
>
> - DEBUG ((DEBUG_ERROR, "GenetSimpleNetworkTransmit: Queue full\n"));
> + DEBUG ((DEBUG_ERROR, "%a: Queue full\n", __FUNCTION__));
> return EFI_NOT_READY;
> }
>
> @@ -634,8 +635,7 @@ GenetSimpleNetworkTransmit (
> &DmaDeviceAddress,
> &DmaMapping);
> if (EFI_ERROR (Status)) {
> - DEBUG ((DEBUG_ERROR,
> - "GenetSimpleNetworkTransmit: DmaMap failed: %r\n", Status));
> + DEBUG ((DEBUG_ERROR, "%a: DmaMap failed: %r\n", __FUNCTION__, Status));
> EfiReleaseLock (&Genet->Lock);
> return Status;
> }
> @@ -703,8 +703,8 @@ GenetSimpleNetworkReceive (
> UINTN FrameLength;
>
> if (This == NULL || Buffer == NULL) {
> - DEBUG ((DEBUG_ERROR,
> - "GenetSimpleNetworkReceive: Invalid parameter (missing handle or buffer)\n"));
> + DEBUG ((DEBUG_ERROR, "%a: Invalid parameter (missing handle or buffer)\n",
> + __FUNCTION__));
> return EFI_INVALID_PARAMETER;
> }
>
> @@ -718,8 +718,7 @@ GenetSimpleNetworkReceive (
>
> Status = EfiAcquireLockOrFail (&Genet->Lock);
> if (EFI_ERROR (Status)) {
> - DEBUG ((DEBUG_ERROR,
> - "GenetSimpleNetworkReceive: Couldn't get lock: %r\n", Status));
> + DEBUG ((DEBUG_ERROR, "%a: Couldn't get lock: %r\n", __FUNCTION__, Status));
> return EFI_ACCESS_DENIED;
> }
>
> @@ -742,12 +741,12 @@ GenetSimpleNetworkReceive (
>
> if (*BufferSize < FrameLength) {
> DEBUG ((DEBUG_ERROR,
> - "GenetSimpleNetworkReceive: Buffer size (0x%X) is too small for frame (0x%X)\n",
> - *BufferSize, FrameLength));
> + "%a: Buffer size (0x%X) is too small for frame (0x%X)\n",
> + __FUNCTION__, *BufferSize, FrameLength));
> Status = GenetDmaMapRxDescriptor (Genet, DescIndex);
> if (EFI_ERROR (Status)) {
> - DEBUG ((DEBUG_ERROR,
> - "GenetSimpleNetworkReceive: Failed to remap RX descriptor!\n"));
> + DEBUG ((DEBUG_ERROR, "%a: Failed to remap RX descriptor!\n",
> + __FUNCTION__));
> }
> EfiReleaseLock (&Genet->Lock);
> return EFI_BUFFER_TOO_SMALL;
> @@ -771,16 +770,14 @@ GenetSimpleNetworkReceive (
>
> Status = EFI_SUCCESS;
> } else {
> - DEBUG ((DEBUG_ERROR,
> - "GenetSimpleNetworkReceive: Short packet (FrameLength 0x%X)",
> - FrameLength));
> + DEBUG ((DEBUG_ERROR, "%a: Short packet (FrameLength 0x%X)",
> + __FUNCTION__, FrameLength));
> Status = EFI_NOT_READY;
> }
>
> Status = GenetDmaMapRxDescriptor (Genet, DescIndex);
> if (EFI_ERROR (Status)) {
> - DEBUG ((DEBUG_ERROR,
> - "GenetSimpleNetworkReceive: Failed to remap RX descriptor!\n"));
> + DEBUG ((DEBUG_ERROR, "%a: Failed to remap RX descriptor!\n", __FUNCTION__));
> }
>
> EfiReleaseLock (&Genet->Lock);
> @@ -791,12 +788,12 @@ GenetSimpleNetworkReceive (
> This function converts a multicast IP address to a multicast HW MAC address
> for all packet transactions.
>
> - @param [in] pSimpleNetwork Protocol instance pointer
> - @param [in] bIPv6 Set to TRUE if the multicast IP address is IPv6 [RFC2460].
> + @param [in] SimpleNetwork Protocol instance pointer
> + @param [in] IPv6 Set to TRUE if the multicast IP address is IPv6 [RFC2460].
> Set to FALSE if the multicast IP address is IPv4 [RFC 791].
> - @param [in] pIP The multicast IP address that is to be converted to a
> + @param [in] IP The multicast IP address that is to be converted to a
> multicast HW MAC address.
> - @param [in] pMAC The multicast HW MAC address that is to be generated from IP.
> + @param [in] MAC The multicast HW MAC address that is to be generated from IP.
>
> @retval EFI_SUCCESS This operation was successful.
> @retval EFI_NOT_STARTED The network interface was not started.
> @@ -810,10 +807,10 @@ STATIC
> EFI_STATUS
> EFIAPI
> GenetSimpleNetworkMCastIPtoMAC (
> - IN EFI_SIMPLE_NETWORK_PROTOCOL *pSimpleNetwork,
> - IN BOOLEAN bIPv6,
> - IN EFI_IP_ADDRESS *pIP,
> - OUT EFI_MAC_ADDRESS *pMAC
> + IN EFI_SIMPLE_NETWORK_PROTOCOL *SimpleNetwork,
> + IN BOOLEAN IPv6,
> + IN EFI_IP_ADDRESS *IP,
> + OUT EFI_MAC_ADDRESS *MAC
> )
> {
> return EFI_UNSUPPORTED;
> @@ -822,7 +819,6 @@ GenetSimpleNetworkMCastIPtoMAC (
> ///
> /// Simple Network Protocol instance
> ///
> -GLOBAL_REMOVE_IF_UNREFERENCED
> CONST EFI_SIMPLE_NETWORK_PROTOCOL gGenetSimpleNetworkTemplate = {
> EFI_SIMPLE_NETWORK_PROTOCOL_REVISION, // Revision
> GenetSimpleNetworkStart, // Start
>
next prev parent reply other threads:[~2020-05-11 21:14 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-11 14:55 [PATCH edk2-platforms v4 0/9] BCM genet fixes Ard Biesheuvel
2020-05-11 14:55 ` [PATCH edk2-platforms v4 1/9] Silicon/Broadcom/BcmGenetDxe: whitespace/cosmetic cleanup Ard Biesheuvel
2020-05-11 16:36 ` Samer El-Haj-Mahmoud
2020-05-11 21:14 ` Philippe Mathieu-Daudé [this message]
2020-05-11 14:55 ` [PATCH edk2-platforms v4 2/9] Silicon/Broadcom/BcmGenetDxe: add support for broadcast filtering Ard Biesheuvel
2020-05-11 16:44 ` Andrei Warkentin
2020-05-11 20:34 ` Jeremy Linton
2020-05-11 21:21 ` Ard Biesheuvel
2020-05-11 14:55 ` [PATCH edk2-platforms v4 3/9] Silicon/Broadcom/BcmGenetDxe: fix multicast/broadcast handling Ard Biesheuvel
2020-05-11 14:55 ` [PATCH edk2-platforms v4 4/9] Silicon/Broadcom/BcmGenetDxe: avoid uncached memory for streaming DMA Ard Biesheuvel
2020-05-11 16:42 ` Andrei Warkentin
2020-05-11 16:53 ` Ard Biesheuvel
2020-05-11 14:55 ` [PATCH edk2-platforms v4 5/9] Silicon/Broadcom/BcmGenetDxe: shut down devices on ExitBootServices() Ard Biesheuvel
2020-05-11 16:32 ` Andrei Warkentin
2020-05-11 14:55 ` [PATCH edk2-platforms v4 6/9] Silicon/Broadcom/BcmGenetDxe: keep TX buffer mapped during DMA transfer Ard Biesheuvel
2020-05-11 16:19 ` Andrei Warkentin
2020-05-11 14:55 ` [PATCH edk2-platforms v4 7/9] Silicon/Broadcom/BcmGenetDxe: use MemoryFence() for MMIO write ordering Ard Biesheuvel
2020-05-11 16:55 ` [edk2-devel] " Andrei Warkentin
2020-05-11 21:11 ` Philippe Mathieu-Daudé
2020-05-11 14:55 ` [PATCH edk2-platforms v4 8/9] Silicon/Broadcom/BcmGenetDxe: add unload support Ard Biesheuvel
2020-05-11 16:17 ` Andrei Warkentin
2020-05-11 14:55 ` [PATCH edk2-platforms v4 9/9] Platform/RaspberryPi4: remove ASIX 88772b driver Ard Biesheuvel
2020-05-11 16:06 ` Andrei Warkentin
2020-05-11 16:24 ` Samer El-Haj-Mahmoud
2020-05-11 23:20 ` [PATCH edk2-platforms v4 0/9] BCM genet fixes Jeremy Linton
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