From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.43; helo=mga05.intel.com; envelope-from=ruiyu.ni@intel.com; receiver=edk2-devel@lists.01.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 9926B22468015 for ; Mon, 19 Mar 2018 02:32:57 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Mar 2018 02:39:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.48,329,1517904000"; d="scan'208";a="212847202" Received: from ray-dev.ccr.corp.intel.com (HELO [10.239.9.4]) ([10.239.9.4]) by fmsmga005.fm.intel.com with ESMTP; 19 Mar 2018 02:39:24 -0700 To: Hao Wu , edk2-devel@lists.01.org Cc: Jiewen Yao , Jian J Wang , Star Zeng , Eric Dong References: <20180319071509.16380-1-hao.a.wu@intel.com> From: "Ni, Ruiyu" Message-ID: <40773d45-2900-c6ad-f42a-7f5207076e52@Intel.com> Date: Mon, 19 Mar 2018 17:39:23 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 MIME-Version: 1.0 In-Reply-To: <20180319071509.16380-1-hao.a.wu@intel.com> Subject: Re: [PATCH] MdeModulePkg/DxeMain: Fix BSP interrupts reenabled in ExitBootServices X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 19 Mar 2018 09:32:58 -0000 Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit On 3/19/2018 3:15 PM, Hao Wu wrote: > Within function CoreExitBootServices(), this commit will move the call > of: > > MemoryProtectionExitBootServicesCallback(); > > before: > > SaveAndSetDebugTimerInterrupt (FALSE); > and > gCpu->DisableInterrupt (gCpu); > > The reason is that, within MemoryProtectionExitBootServicesCallback(), > APIs like RaiseTpl and RestoreTpl maybe called. An example will be: > > DebugLib (using PeiDxeDebugLibReportStatusCode instance) > | > v > ReportStatusCodeLib (using DxeReportStatusCodeLib instance) > | > v > Raise/RestoreTpl > > The call of Raise/RestoreTpl APIs will re-enable BSP interrupts. Hence, > this commit refine the calling sequence to ensure BSP interrupts before > leaving CoreExitBootServices(). > > Cc: Ruiyu Ni > Cc: Jiewen Yao > Cc: Jian J Wang > Cc: Star Zeng > Cc: Eric Dong > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Hao Wu > --- > MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c b/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c > index 62a597edaf..07c7403462 100644 > --- a/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c > +++ b/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c > @@ -1,7 +1,7 @@ > /** @file > DXE Core Main Entry Point > > -Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
> +Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
> This program and the accompanying materials > are licensed and made available under the terms and conditions of the BSD License > which accompanies this distribution. The full text of the license may be found at > @@ -805,6 +805,8 @@ CoreExitBootServices ( > (EFI_SOFTWARE_EFI_BOOT_SERVICE | EFI_SW_BS_PC_EXIT_BOOT_SERVICES) > ); > > + MemoryProtectionExitBootServicesCallback(); > + > // > // Disable interrupt of Debug timer. > // > @@ -815,8 +817,6 @@ CoreExitBootServices ( > // > gCpu->DisableInterrupt (gCpu); > > - MemoryProtectionExitBootServicesCallback(); > - > // > // Clear the non-runtime values of the EFI System Table > // > Reviewed-by: Ruiyu Ni -- Thanks, Ray