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* [edk2-devel] [PATCH] SG2042Pkg/Sec:Modify Calculation LowestMemSize
@ 2024-03-25  2:09 WangYang
  2024-03-28 13:46 ` Jingyu Li via groups.io
  2024-04-03  3:48 ` Sunil V L
  0 siblings, 2 replies; 7+ messages in thread
From: WangYang @ 2024-03-25  2:09 UTC (permalink / raw)
  To: sunilvl, caiyuqing_hz, devel; +Cc: Yang Wang, USER0FISH, dahogn, meng-cz

Adapting memory addresses may not start from 0x0,
for example, the starting memory address starts
from 0x8000_0000.

I understand: LowestMemBase is the lowest DDR
address in the system.

UefiMemoryBase = LowestMemBase +
CodeSize(opensbi+UEFI);

LowestMemSize -= CodeSize(UefiMemoryBase -
LowestMemBase)

Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: USER0FISH <libing1202@outlook.com>
Cc: caiyuqing379 <caiyuqing_hz@outlook.com>
Cc: dahogn <dahogn@hotmail.com>
Cc: meng-cz <mengcz1126@gmail.com>

Signed-off-by: Yang Wang <wangyang@bosc.ac.cn>
---
 Silicon/Sophgo/SG2042Pkg/Sec/Memory.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Silicon/Sophgo/SG2042Pkg/Sec/Memory.c b/Silicon/Sophgo/SG2042Pkg/Sec/Memory.c
index df49a17695..a160278eaa 100644
--- a/Silicon/Sophgo/SG2042Pkg/Sec/Memory.c
+++ b/Silicon/Sophgo/SG2042Pkg/Sec/Memory.c
@@ -301,8 +301,8 @@ MemoryPeimInitialization (
   }
 
   if (UefiMemoryBase > LowestMemBase) {
+    LowestMemSize -= (UefiMemoryBase - LowestMemBase);
     LowestMemBase = UefiMemoryBase;
-    LowestMemSize -= UefiMemoryBase;
   }
 
   DEBUG ((
-- 
2.34.1



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* Re: [edk2-devel] [PATCH] SG2042Pkg/Sec:Modify Calculation LowestMemSize
  2024-03-25  2:09 [edk2-devel] [PATCH] SG2042Pkg/Sec:Modify Calculation LowestMemSize WangYang
@ 2024-03-28 13:46 ` Jingyu Li via groups.io
  2024-04-02 10:30   ` WangYang
  2024-04-03  3:48 ` Sunil V L
  1 sibling, 1 reply; 7+ messages in thread
From: Jingyu Li via groups.io @ 2024-03-28 13:46 UTC (permalink / raw)
  To: WangYang, devel

[-- Attachment #1: Type: text/plain, Size: 502 bytes --]

I have verified the above patch on the SG2042 platform. I agree with your understanding of the LowestMemBase.

Best Regards,
Jingyu


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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [edk2-devel] [PATCH] SG2042Pkg/Sec:Modify Calculation LowestMemSize
  2024-03-28 13:46 ` Jingyu Li via groups.io
@ 2024-04-02 10:30   ` WangYang
  0 siblings, 0 replies; 7+ messages in thread
From: WangYang @ 2024-04-02 10:30 UTC (permalink / raw)
  To: Jingyu Li, sunilvl, devel; +Cc: libing1202, caiyuqing_hz, dahogn, mengcz1126

[-- Attachment #1: Type: text/plain, Size: 828 bytes --]

Hi,Sunil V L

    How about this status.
​


-----原始邮件-----
发件人:"Jingyu Li via groups.io" <jingyu.li01=sophgo.com@groups.io>
发送时间:2024-03-28 21:46:53 (星期四)
收件人: WangYang <wangyang@bosc.ac.cn>, devel@edk2.groups.io
抄送:
主题: Re: [edk2-devel] [PATCH] SG2042Pkg/Sec:Modify Calculation LowestMemSize

I have verified the above patch on the SG2042 platform. I agree with your understanding of the LowestMemBase.


Best Regards,
Jingyu

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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [edk2-devel] [PATCH] SG2042Pkg/Sec:Modify Calculation LowestMemSize
  2024-03-25  2:09 [edk2-devel] [PATCH] SG2042Pkg/Sec:Modify Calculation LowestMemSize WangYang
  2024-03-28 13:46 ` Jingyu Li via groups.io
@ 2024-04-03  3:48 ` Sunil V L
  2024-04-03  6:21   ` Jingyu Li via groups.io
  2024-04-08  3:00   ` WangYang
  1 sibling, 2 replies; 7+ messages in thread
From: Sunil V L @ 2024-04-03  3:48 UTC (permalink / raw)
  To: Yang Wang; +Cc: caiyuqing_hz, devel, USER0FISH, dahogn, meng-cz

On Mon, Mar 25, 2024 at 10:09:28AM +0800, Yang Wang wrote:
> Adapting memory addresses may not start from 0x0,
> for example, the starting memory address starts
> from 0x8000_0000.
> 
> I understand: LowestMemBase is the lowest DDR
> address in the system.
> 
> UefiMemoryBase = LowestMemBase +
> CodeSize(opensbi+UEFI);
> 
> LowestMemSize -= CodeSize(UefiMemoryBase -
> LowestMemBase)
> 
> Cc: Sunil V L <sunilvl@ventanamicro.com>
> Cc: USER0FISH <libing1202@outlook.com>
> Cc: caiyuqing379 <caiyuqing_hz@outlook.com>
> Cc: dahogn <dahogn@hotmail.com>
> Cc: meng-cz <mengcz1126@gmail.com>
> 
> Signed-off-by: Yang Wang <wangyang@bosc.ac.cn>
> ---
>  Silicon/Sophgo/SG2042Pkg/Sec/Memory.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/Silicon/Sophgo/SG2042Pkg/Sec/Memory.c b/Silicon/Sophgo/SG2042Pkg/Sec/Memory.c
> index df49a17695..a160278eaa 100644
> --- a/Silicon/Sophgo/SG2042Pkg/Sec/Memory.c
> +++ b/Silicon/Sophgo/SG2042Pkg/Sec/Memory.c
> @@ -301,8 +301,8 @@ MemoryPeimInitialization (
>    }
>  
>    if (UefiMemoryBase > LowestMemBase) {
> +    LowestMemSize -= (UefiMemoryBase - LowestMemBase);
>      LowestMemBase = UefiMemoryBase;
> -    LowestMemSize -= UefiMemoryBase;
>    }
>  
LGTM.

Jingyu, Do you mind adding RB tag?

Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>

Thanks!


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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [edk2-devel] [PATCH] SG2042Pkg/Sec:Modify Calculation LowestMemSize
  2024-04-03  3:48 ` Sunil V L
@ 2024-04-03  6:21   ` Jingyu Li via groups.io
  2024-04-08  3:00   ` WangYang
  1 sibling, 0 replies; 7+ messages in thread
From: Jingyu Li via groups.io @ 2024-04-03  6:21 UTC (permalink / raw)
  To: Sunil V L, devel

[-- Attachment #1: Type: text/plain, Size: 429 bytes --]

Hi Sunil V L,

Not at all! Thanks!

Best Regards,
Jingyu


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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [edk2-devel] [PATCH] SG2042Pkg/Sec:Modify Calculation LowestMemSize
  2024-04-03  3:48 ` Sunil V L
  2024-04-03  6:21   ` Jingyu Li via groups.io
@ 2024-04-08  3:00   ` WangYang
  2024-04-08  4:28     ` Sunil V L
  1 sibling, 1 reply; 7+ messages in thread
From: WangYang @ 2024-04-08  3:00 UTC (permalink / raw)
  To: Sunil V L, jingyu.li01; +Cc: caiyuqing_hz, devel, USER0FISH, dahogn, meng-cz

Hi, Sunil V L
   Do I still need to send a v2 version of the RB tag with “Jingyu Li <jingyu.li01@sophgo.com>”? 
   Or did you help add RB tag with “Jingyu Li <jingyu.li01@sophgo.com>” during the merger?

Best Regards,
WangYang

> -----原始邮件-----
> 发件人: "Sunil V L" <sunilvl@ventanamicro.com>
> 发送时间: 2024-04-03 11:48:59 (星期三)
> 收件人: "Yang Wang" <wangyang@bosc.ac.cn>
> 抄送: caiyuqing_hz@outlook.com, devel@edk2.groups.io, USER0FISH <libing1202@outlook.com>, dahogn <dahogn@hotmail.com>, meng-cz <mengcz1126@gmail.com>
> 主题: Re: [PATCH] SG2042Pkg/Sec:Modify Calculation LowestMemSize
> 
> On Mon, Mar 25, 2024 at 10:09:28AM +0800, Yang Wang wrote:
> > Adapting memory addresses may not start from 0x0,
> > for example, the starting memory address starts
> > from 0x8000_0000.
> > 
> > I understand: LowestMemBase is the lowest DDR
> > address in the system.
> > 
> > UefiMemoryBase = LowestMemBase +
> > CodeSize(opensbi+UEFI);
> > 
> > LowestMemSize -= CodeSize(UefiMemoryBase -
> > LowestMemBase)
> > 
> > Cc: Sunil V L <sunilvl@ventanamicro.com>
> > Cc: USER0FISH <libing1202@outlook.com>
> > Cc: caiyuqing379 <caiyuqing_hz@outlook.com>
> > Cc: dahogn <dahogn@hotmail.com>
> > Cc: meng-cz <mengcz1126@gmail.com>
> > 
> > Signed-off-by: Yang Wang <wangyang@bosc.ac.cn>
> > ---
> >  Silicon/Sophgo/SG2042Pkg/Sec/Memory.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/Silicon/Sophgo/SG2042Pkg/Sec/Memory.c b/Silicon/Sophgo/SG2042Pkg/Sec/Memory.c
> > index df49a17695..a160278eaa 100644
> > --- a/Silicon/Sophgo/SG2042Pkg/Sec/Memory.c
> > +++ b/Silicon/Sophgo/SG2042Pkg/Sec/Memory.c
> > @@ -301,8 +301,8 @@ MemoryPeimInitialization (
> >    }
> >  
> >    if (UefiMemoryBase > LowestMemBase) {
> > +    LowestMemSize -= (UefiMemoryBase - LowestMemBase);
> >      LowestMemBase = UefiMemoryBase;
> > -    LowestMemSize -= UefiMemoryBase;
> >    }
> >  
> LGTM.
> 
> Jingyu, Do you mind adding RB tag?
> 
> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
> 
> Thanks!


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* Re: [edk2-devel] [PATCH] SG2042Pkg/Sec:Modify Calculation LowestMemSize
  2024-04-08  3:00   ` WangYang
@ 2024-04-08  4:28     ` Sunil V L
  0 siblings, 0 replies; 7+ messages in thread
From: Sunil V L @ 2024-04-08  4:28 UTC (permalink / raw)
  To: devel, wangyang; +Cc: jingyu.li01, caiyuqing_hz, USER0FISH, dahogn, meng-cz

On Mon, Apr 08, 2024 at 11:00:47AM +0800, WangYang wrote:
> Hi, Sunil V L
>    Do I still need to send a v2 version of the RB tag with “Jingyu Li <jingyu.li01@sophgo.com>”? 
>    Or did you help add RB tag with “Jingyu Li <jingyu.li01@sophgo.com>” during the merger?
> 
Never mind. I have updated the RB tags and merged as #134.

Thanks,
Sunil


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end of thread, other threads:[~2024-04-08  4:28 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-03-25  2:09 [edk2-devel] [PATCH] SG2042Pkg/Sec:Modify Calculation LowestMemSize WangYang
2024-03-28 13:46 ` Jingyu Li via groups.io
2024-04-02 10:30   ` WangYang
2024-04-03  3:48 ` Sunil V L
2024-04-03  6:21   ` Jingyu Li via groups.io
2024-04-08  3:00   ` WangYang
2024-04-08  4:28     ` Sunil V L

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