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From: Maurice Ma <maurice.ma@intel.com>
To: edk2-devel@lists.01.org
Cc: Maurice Ma <maurice.ma@intel.com>,
	Prince Agyeman <prince.agyeman@intel.com>
Subject: [PATCH] CorebootPayloadPkg DSC: Change the section alignment option
Date: Wed, 26 Oct 2016 11:38:32 -0700	[thread overview]
Message-ID: <430a5a6d64bf24652bc077d0ca9c72fbd818b13f.1477507057.git.maurice.ma@intel.com> (raw)

The current CorebootPayloadPkg will print the following message
"InsertImageRecord - Section Alignment(0x20) is not 4K" during
boot. It is caused by the section alignment arranged by the linker.
This patch change the alignment to 4K for runtime drivers.

Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
---
 CorebootPayloadPkg/CorebootPayloadPkg.fdf        | 1 +
 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc    | 3 +++
 CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc | 3 +++
 3 files changed, 7 insertions(+)

diff --git a/CorebootPayloadPkg/CorebootPayloadPkg.fdf b/CorebootPayloadPkg/CorebootPayloadPkg.fdf
index d07fd30a103e..aa50db0e5699 100644
--- a/CorebootPayloadPkg/CorebootPayloadPkg.fdf
+++ b/CorebootPayloadPkg/CorebootPayloadPkg.fdf
@@ -60,6 +60,7 @@ INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
 
 [FV.DXEFV]
 BlockSize          = 0x1000
+FvForceRebase      = FALSE
 FvAlignment        = 16
 ERASE_POLARITY     = 1
 MEMORY_MAPPED      = TRUE
diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
index 435743329674..80d769be24e0 100644
--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
+++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
@@ -88,6 +88,9 @@
   INTEL:RELEASE_*_*_CC_FLAGS     = /D MDEPKG_NDEBUG
   MSFT:RELEASE_*_*_CC_FLAGS      = /D MDEPKG_NDEBUG
 
+[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
+  MSFT:*_*_*_DLINK_FLAGS         = /ALIGN:4096
+
 ################################################################################
 #
 # SKU Identification section - list of all SKU IDs supported by this Platform.
diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
index 3ddc81b457ce..dbb8d151d09c 100644
--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
+++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
@@ -90,6 +90,9 @@
   INTEL:RELEASE_*_*_CC_FLAGS     = /D MDEPKG_NDEBUG
   MSFT:RELEASE_*_*_CC_FLAGS      = /D MDEPKG_NDEBUG
 
+[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
+  MSFT:*_*_*_DLINK_FLAGS         = /ALIGN:4096
+
 ################################################################################
 #
 # SKU Identification section - list of all SKU IDs supported by this Platform.
-- 
1.9.5.msysgit.0



                 reply	other threads:[~2016-10-26 18:38 UTC|newest]

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