From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [63.128.21.124]) by mx.groups.io with SMTP id smtpd.web08.2490.1604340381259887794 for ; Mon, 02 Nov 2020 10:06:21 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=CldN0F2u; spf=pass (domain: redhat.com, ip: 63.128.21.124, mailfrom: lersek@redhat.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1604340380; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ojiOJtrkgekx2U0KzNwvE5iqSUrOayPeLEi1gCXdRfk=; b=CldN0F2uR8+M7dzmjoiK/oy8A5m/9gTLdo8cO9m1hqnRBeB7OyNmX1hBxpIMmZmUtd9TxP hEauFhkKoGtWf5tcAc0NWl+rNzMcf6oI4TufY2tbxJUqoZfhfglArXNxNo/3vstXT6Y+BZ 5GyGlFvKrGlm4zknO21BC47uPSPcYOI= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-32-xZpTKP5SOwqTb12CUbUSLA-1; Mon, 02 Nov 2020 13:06:18 -0500 X-MC-Unique: xZpTKP5SOwqTb12CUbUSLA-1 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 05BA6800597; Mon, 2 Nov 2020 18:06:17 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-112-126.ams2.redhat.com [10.36.112.126]) by smtp.corp.redhat.com (Postfix) with ESMTP id A055E5B4D4; Mon, 2 Nov 2020 18:06:15 +0000 (UTC) Subject: Re: [PATCH v3 1/2] UefiCpuPkg/PiSmmCpuDxeSmm: Correct the Cr3 typo To: Sheng Wei , devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Rahul Kumar , Jiewen Yao References: <20201102045330.3540-1-w.sheng@intel.com> <20201102045330.3540-2-w.sheng@intel.com> From: "Laszlo Ersek" Message-ID: <440c5e3f-42af-f98c-214a-04e61de37f5c@redhat.com> Date: Mon, 2 Nov 2020 19:06:14 +0100 MIME-Version: 1.0 In-Reply-To: <20201102045330.3540-2-w.sheng@intel.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=lersek@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit On 11/02/20 05:53, Sheng Wei wrote: > Change the variable name from mInternalGr3 to mInternalCr3. > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3015 > > Change-Id: I6a9df4836d4358405837b1ebbd2d5d4c85e3635f With the "Change-Id" line removed: Reviewed-by: Laszlo Ersek Thanks Laszlo > Signed-off-by: Sheng Wei > Cc: Eric Dong > Cc: Ray Ni > Cc: Laszlo Ersek > Cc: Rahul Kumar > Cc: Jiewen Yao > --- > UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c > index ebfc46ad45..d67f036aea 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c > @@ -32,7 +32,7 @@ PAGE_ATTRIBUTE_TABLE mPageAttributeTable[] = { > {Page1G, SIZE_1GB, PAGING_1G_ADDRESS_MASK_64}, > }; > > -UINTN mInternalGr3; > +UINTN mInternalCr3; > > /** > Set the internal page table base address. > @@ -46,7 +46,7 @@ SetPageTableBase ( > IN UINTN Cr3 > ) > { > - mInternalGr3 = Cr3; > + mInternalCr3 = Cr3; > } > > /** > @@ -59,8 +59,8 @@ GetPageTableBase ( > VOID > ) > { > - if (mInternalGr3 != 0) { > - return mInternalGr3; > + if (mInternalCr3 != 0) { > + return mInternalCr3; > } > return (AsmReadCr3 () & PAGING_4K_ADDRESS_MASK_64); > } > @@ -252,7 +252,7 @@ ConvertPageEntryAttribute ( > if ((Attributes & EFI_MEMORY_RO) != 0) { > if (IsSet) { > NewPageEntry &= ~(UINT64)IA32_PG_RW; > - if (mInternalGr3 != 0) { > + if (mInternalCr3 != 0) { > // Environment setup > // ReadOnly page need set Dirty bit for shadow stack > NewPageEntry |= IA32_PG_D; >