From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A72BE1A1E24 for ; Mon, 17 Oct 2016 02:50:12 -0700 (PDT) Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 077C880F7D; Mon, 17 Oct 2016 09:50:12 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-91.phx2.redhat.com [10.3.116.91]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u9H9oAmv022848; Mon, 17 Oct 2016 05:50:10 -0400 To: Dennis Chen , edk2-devel@ml01.01.org References: <1476694491-29933-1-git-send-email-dennis.chen@arm.com> Cc: nd@arm.com, Ard Biesheuvel , Leif Lindholm From: Laszlo Ersek Message-ID: <4612efdd-ec42-6a85-5f56-971c87f54c6d@redhat.com> Date: Mon, 17 Oct 2016 11:50:09 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 MIME-Version: 1.0 In-Reply-To: <1476694491-29933-1-git-send-email-dennis.chen@arm.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Mon, 17 Oct 2016 09:50:12 +0000 (UTC) Subject: Re: [PATCH] ArmVirtPkg: Drop the nonsense ASSERT() statement X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 17 Oct 2016 09:50:12 -0000 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit On 10/17/16 10:54, Dennis Chen wrote: > Since All the GIC base address variables now are 64-bit, given > that a UNIT64 var cannot exceed MAX_UNIT64, it doesn't make sense > to continue keep them in the codes, so this patch just simply drop > those ASSERT() statements as it should be. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Cc: Ard Biesheuvel > Cc: Leif Lindholm > Cc: Laszlo Ersek > Signed-off-by: Dennis Chen > --- > ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c | 4 ---- > 1 file changed, 4 deletions(-) > > diff --git a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c > index 64afc4d..7a312e5 100644 > --- a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c > +++ b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c > @@ -79,11 +79,9 @@ ArmVirtGicArchLibConstructor ( > > // RegProp[0..1] == { GICD base, GICD size } > DistBase = SwapBytes64 (Reg[0]); > - ASSERT (DistBase < MAX_UINT32); > > // RegProp[2..3] == { GICR base, GICR size } > RedistBase = SwapBytes64 (Reg[2]); > - ASSERT (RedistBase < MAX_UINT32); > > PcdSet64 (PcdGicDistributorBase, DistBase); > PcdSet64 (PcdGicRedistributorsBase, RedistBase); > @@ -117,8 +115,6 @@ ArmVirtGicArchLibConstructor ( > > DistBase = SwapBytes64 (Reg[0]); > CpuBase = SwapBytes64 (Reg[2]); > - ASSERT (DistBase < MAX_UINT32); > - ASSERT (CpuBase < MAX_UINT32); > > PcdSet64 (PcdGicDistributorBase, DistBase); > PcdSet64 (PcdGicInterruptInterfaceBase, CpuBase); > Is this a continuation of your commit 8a1f2378d74390ddfe35c70f68e0c8b03bf84089 Author: Dennis Chen Date: Mon Sep 5 19:38:20 2016 +0800 ArmPkg ArmPlatformPkg ArmVirtPkg: ARM GICv2/v3 Base Address width fix-up ? I think I'll let Ard review this one. :) Thanks Laszlo